3 # ====================================================================
4 # Written by Andy Polyakov <appro@openssl.org> for the OpenSSL
5 # project. The module is, however, dual licensed under OpenSSL and
6 # CRYPTOGAMS licenses depending on where you obtain it. For further
7 # details see http://www.openssl.org/~appro/cryptogams/.
8 # ====================================================================
12 # The module implements "4-bit" GCM GHASH function and underlying
13 # single multiplication operation in GF(2^128). "4-bit" means that it
14 # uses 256 bytes per-key table [+128 bytes shared table]. Performance
15 # results are for streamed GHASH subroutine on UltraSPARC pre-Tx CPU
16 # and are expressed in cycles per processed byte, less is better:
18 # gcc 3.3.x cc 5.2 this assembler
20 # 32-bit build 81.4 43.3 12.6 (+546%/+244%)
21 # 64-bit build 20.2 21.2 12.6 (+60%/+68%)
23 # Here is data collected on UltraSPARC T1 system running Linux:
25 # gcc 4.4.1 this assembler
27 # 32-bit build 566 50 (+1000%)
28 # 64-bit build 56 50 (+12%)
30 # I don't quite understand why difference between 32-bit and 64-bit
31 # compiler-generated code is so big. Compilers *were* instructed to
32 # generate code for UltraSPARC and should have used 64-bit registers
33 # for Z vector (see C code) even in 32-bit build... Oh well, it only
34 # means more impressive improvement coefficients for this assembler
35 # module;-) Loops are aggressively modulo-scheduled in respect to
36 # references to input data and Z.hi updates to achieve 12 cycles
37 # timing. To anchor to something else, sha1-sparcv9.pl spends 11.6
38 # cycles to process one byte on UltraSPARC pre-Tx CPU and ~24 on T1.
42 # Add VIS3 lookup-table-free implementation using polynomial
43 # multiplication xmulx[hi] and extended addition addxc[cc]
44 # instructions. 4.52/7.63x improvement on T3/T4 or in absolute
45 # terms 7.90/2.14 cycles per byte. On T4 multi-process benchmark
46 # saturates at ~15.5x single-process result on 8-core processor,
47 # or ~20.5GBps per 2.85GHz socket.
50 for (@ARGV) { $bits=64 if (/\-m64/ || /\-xarch\=v9/); }
51 if ($bits==64) { $bias=2047; $frame=192; }
52 else { $bias=0; $frame=112; }
55 open STDOUT,">$output";
57 $Zhi="%o0"; # 64-bit values
64 $nhi="%l0"; # small values and pointers
73 $Xi="%i0"; # input argument block
78 $code.=<<___ if ($bits==64);
79 .register %g2,#scratch
80 .register %g3,#scratch
83 .section ".text",#alloc,#execinstr
87 .long `0x0000<<16`,0,`0x1C20<<16`,0,`0x3840<<16`,0,`0x2460<<16`,0
88 .long `0x7080<<16`,0,`0x6CA0<<16`,0,`0x48C0<<16`,0,`0x54E0<<16`,0
89 .long `0xE100<<16`,0,`0xFD20<<16`,0,`0xD940<<16`,0,`0xC560<<16`,0
90 .long `0x9180<<16`,0,`0x8DA0<<16`,0,`0xA9C0<<16`,0,`0xB5E0<<16`,0
91 .type rem_4bit,#object
92 .size rem_4bit,(.-rem_4bit)
105 add %o7,rem_4bit-1b,$rem_4bit
112 ldx [$Htblo+$nlo],$Zlo
113 ldx [$Htbl+$nlo],$Zhi
117 ldx [$Htblo+$nhi],$Tlo
119 ldx [$Htbl+$nhi],$Thi
121 ldx [$rem_4bit+$remi],$rem
137 ldx [$Htblo+$nlo],$Tlo
140 ldx [$Htbl+$nlo],$Thi
143 ldx [$rem_4bit+$remi],$rem
146 ldub [$inp+$cnt],$nlo
153 ldx [$Htblo+$nhi],$Tlo
156 ldx [$Htbl+$nhi],$Thi
158 ldx [$rem_4bit+$remi],$rem
171 ldx [$Htblo+$nlo],$Tlo
174 ldx [$Htbl+$nlo],$Thi
177 ldx [$rem_4bit+$remi],$rem
186 be,pn `$bits==64?"%xcc":"%icc"`,.Ldone
189 ldx [$Htblo+$nhi],$Tlo
192 ldx [$Htbl+$nhi],$Thi
194 ldx [$rem_4bit+$remi],$rem
210 ldx [$Htblo+$nhi],$Tlo
213 ldx [$Htbl+$nhi],$Thi
215 ldx [$rem_4bit+$remi],$rem
227 .type gcm_ghash_4bit,#function
228 .size gcm_ghash_4bit,(.-gcm_ghash_4bit)
235 .globl gcm_gmult_4bit
243 add %o7,rem_4bit-1b,$rem_4bit
248 ldx [$Htblo+$nlo],$Zlo
249 ldx [$Htbl+$nlo],$Zhi
253 ldx [$Htblo+$nhi],$Tlo
255 ldx [$Htbl+$nhi],$Thi
257 ldx [$rem_4bit+$remi],$rem
272 ldx [$Htblo+$nlo],$Tlo
275 ldx [$Htbl+$nlo],$Thi
278 ldx [$rem_4bit+$remi],$rem
287 ldx [$Htblo+$nhi],$Tlo
290 ldx [$Htbl+$nhi],$Thi
292 ldx [$rem_4bit+$remi],$rem
304 ldx [$Htblo+$nlo],$Tlo
307 ldx [$Htbl+$nlo],$Thi
310 ldx [$rem_4bit+$remi],$rem
318 ldx [$Htblo+$nhi],$Tlo
321 ldx [$Htbl+$nhi],$Thi
323 ldx [$rem_4bit+$remi],$rem
335 .type gcm_gmult_4bit,#function
336 .size gcm_gmult_4bit,(.-gcm_gmult_4bit)
340 # Straightforward 128x128-bit multiplication using Karatsuba algorithm
341 # followed by pair of 64-bit reductions [with a shortcut in first one,
342 # which allowed to break dependency between reductions and remove one
343 # multiplication from critical path]. While it might be suboptimal
344 # with regard to sheer number of multiplications, other methods [such
345 # as aggregate reduction] would require more 64-bit registers, which
346 # we don't have in 32-bit application context.
348 ($Xip,$Htable,$inp,$len)=map("%i$_",(0..3));
350 ($Hhl,$Hlo,$Hhi,$Xlo,$Xhi,$xE1,$sqr, $C0,$C1,$C2,$C3,$V)=
351 (map("%o$_",(0..5,7)),map("%g$_",(1..5)));
353 ($shl,$shr)=map("%l$_",(0..7));
355 # For details regarding "twisted H" see ghash-x86.pl.
367 srax $Hhi,63,$C0 ! broadcast carry
368 addcc $Hlo,$Hlo,$Hlo ! H<<=1
374 stx $Hlo,[%i0+8] ! save twisted H
377 sethi %hi(0xA0406080),$V
378 sethi %hi(0x20C0E000),%l0
379 or $V,%lo(0xA0406080),$V
380 or %l0,%lo(0x20C0E000),%l0
382 or %l0,$V,$V ! (0xE0·i)&0xff=0xA040608020C0E000
387 .type gcm_init_vis3,#function
388 .size gcm_init_vis3,.-gcm_init_vis3
390 .globl gcm_gmult_vis3
395 ldx [$Xip+8],$Xlo ! load Xi
397 ldx [$Htable+8],$Hlo ! load twisted H
401 sllx %l7,57,$xE1 ! 57 is not a typo
402 ldx [$Htable+16],$V ! (0xE0·i)&0xff=0xA040608020C0E000
404 xor $Hhi,$Hlo,$Hhl ! Karatsuba pre-processing
406 xor $Xlo,$Xhi,$C2 ! Karatsuba pre-processing
408 xmulxhi $Xlo,$Hlo,$Xlo
410 xmulxhi $Xhi,$Hhi,$C3
414 srlx $V,$sqr,$sqr ! ·0xE0 [implicit &(7<<3)]
416 sllx $sqr,57,$sqr ! ($C0·0xE1)<<1<<56 [implicit &0x7f]
418 xor $C0,$C1,$C1 ! Karatsuba post-processing
420 xor $sqr,$Xlo,$Xlo ! real destination is $C1
426 xmulxhi $C0,$xE1,$Xlo ! ·0xE1<<1<<56
436 stx $C2,[$Xip+8] ! save Xi
441 .type gcm_gmult_vis3,#function
442 .size gcm_gmult_vis3,.-gcm_gmult_vis3
444 .globl gcm_ghash_vis3
449 ldx [$Xip+8],$C2 ! load Xi
451 ldx [$Htable+8],$Hlo ! load twisted H
455 sllx %l7,57,$xE1 ! 57 is not a typo
456 ldx [$Htable+16],$V ! (0xE0·i)&0xff=0xA040608020C0E000
461 prefetch [$inp+63], 20
464 xor $Hhi,$Hlo,$Hhl ! Karatsuba pre-processing
470 ldx [$inp+16],$C1 ! align data
482 prefetch [$inp+63], 20
485 xor $Xlo,$Xhi,$C2 ! Karatsuba pre-processing
487 xmulxhi $Xlo,$Hlo,$Xlo
489 xmulxhi $Xhi,$Hhi,$C3
493 srlx $V,$sqr,$sqr ! ·0xE0 [implicit &(7<<3)]
495 sllx $sqr,57,$sqr ! ($C0·0xE1)<<1<<56 [implicit &0x7f]
497 xor $C0,$C1,$C1 ! Karatsuba post-processing
499 xor $sqr,$Xlo,$Xlo ! real destination is $C1
505 xmulxhi $C0,$xE1,$Xlo ! ·0xE1<<1<<56
516 stx $C2,[$Xip+8] ! save Xi
521 .type gcm_ghash_vis3,#function
522 .size gcm_ghash_vis3,.-gcm_ghash_vis3
526 .asciz "GHASH for SPARCv9/VIS3, CRYPTOGAMS by <appro\@openssl.org>"
531 # Purpose of these subroutines is to explicitly encode VIS instructions,
532 # so that one can compile the module without having to specify VIS
533 # extentions on compiler command line, e.g. -xarch=v9 vs. -xarch=v9a.
534 # Idea is to reserve for option to produce "universal" binary and let
535 # programmer detect if current CPU is VIS capable at run-time.
537 my ($mnemonic,$rs1,$rs2,$rd)=@_;
538 my %bias = ( "g" => 0, "o" => 8, "l" => 16, "i" => 24 );
540 my %visopf = ( "addxc" => 0x011,
543 "xmulxhi" => 0x116 );
545 $ref = "$mnemonic\t$rs1,$rs2,$rd";
547 if ($opf=$visopf{$mnemonic}) {
548 foreach ($rs1,$rs2,$rd) {
549 return $ref if (!/%([goli])([0-9])/);
553 return sprintf ".word\t0x%08x !%s",
554 0x81b00000|$rd<<25|$rs1<<14|$opf<<5|$rs2,
561 foreach (split("\n",$code)) {
562 s/\`([^\`]*)\`/eval $1/ge;
564 s/\b(xmulx[hi]*|addxc[c]{0,2})\s+(%[goli][0-7]),\s*(%[goli][0-7]),\s*(%[goli][0-7])/