2 * Copyright 2019 The OpenSSL Project Authors. All Rights Reserved.
4 * Licensed under the Apache License 2.0 (the "License"). You may not use
5 * this file except in compliance with the License. You can obtain a copy
6 * in the file LICENSE in the source distribution or at
7 * https://www.openssl.org/source/license.html
10 #ifndef HEADER_INTERNAL_CIPHERMODE_PLATFORM_H
11 # define HEADER_INTERNAL_CIPHERMODE_PLATFORM_H
13 # include "openssl/aes.h"
16 int vpaes_set_encrypt_key(const unsigned char *userKey, int bits,
18 int vpaes_set_decrypt_key(const unsigned char *userKey, int bits,
20 void vpaes_encrypt(const unsigned char *in, unsigned char *out,
22 void vpaes_decrypt(const unsigned char *in, unsigned char *out,
24 void vpaes_cbc_encrypt(const unsigned char *in,
27 const AES_KEY *key, unsigned char *ivec, int enc);
28 # endif /* VPAES_ASM */
31 void bsaes_cbc_encrypt(const unsigned char *in, unsigned char *out,
32 size_t length, const AES_KEY *key,
33 unsigned char ivec[16], int enc);
34 void bsaes_ctr32_encrypt_blocks(const unsigned char *in, unsigned char *out,
35 size_t len, const AES_KEY *key,
36 const unsigned char ivec[16]);
37 void bsaes_xts_encrypt(const unsigned char *inp, unsigned char *out,
38 size_t len, const AES_KEY *key1,
39 const AES_KEY *key2, const unsigned char iv[16]);
40 void bsaes_xts_decrypt(const unsigned char *inp, unsigned char *out,
41 size_t len, const AES_KEY *key1,
42 const AES_KEY *key2, const unsigned char iv[16]);
43 # endif /* BSAES_ASM */
46 void AES_ctr32_encrypt(const unsigned char *in, unsigned char *out,
47 size_t blocks, const AES_KEY *key,
48 const unsigned char ivec[AES_BLOCK_SIZE]);
49 # endif /* AES_CTR_ASM */
52 void AES_xts_encrypt(const unsigned char *inp, unsigned char *out, size_t len,
53 const AES_KEY *key1, const AES_KEY *key2,
54 const unsigned char iv[16]);
55 void AES_xts_decrypt(const unsigned char *inp, unsigned char *out, size_t len,
56 const AES_KEY *key1, const AES_KEY *key2,
57 const unsigned char iv[16]);
58 # endif /* AES_XTS_ASM */
60 # if defined(OPENSSL_CPUID_OBJ)
61 # if (defined(__powerpc__) || defined(__ppc__) || defined(_ARCH_PPC))
62 # include "ppc_arch.h"
64 # define VPAES_CAPABLE (OPENSSL_ppccap_P & PPC_ALTIVEC)
66 # define HWAES_CAPABLE (OPENSSL_ppccap_P & PPC_CRYPTO207)
67 # define HWAES_set_encrypt_key aes_p8_set_encrypt_key
68 # define HWAES_set_decrypt_key aes_p8_set_decrypt_key
69 # define HWAES_encrypt aes_p8_encrypt
70 # define HWAES_decrypt aes_p8_decrypt
71 # define HWAES_cbc_encrypt aes_p8_cbc_encrypt
72 # define HWAES_ctr32_encrypt_blocks aes_p8_ctr32_encrypt_blocks
73 # define HWAES_xts_encrypt aes_p8_xts_encrypt
74 # define HWAES_xts_decrypt aes_p8_xts_decrypt
77 # if (defined(__arm__) || defined(__arm) || defined(__aarch64__))
78 # include "arm_arch.h"
79 # if __ARM_MAX_ARCH__>=7
80 # if defined(BSAES_ASM)
81 # define BSAES_CAPABLE (OPENSSL_armcap_P & ARMV7_NEON)
83 # if defined(VPAES_ASM)
84 # define VPAES_CAPABLE (OPENSSL_armcap_P & ARMV7_NEON)
86 # define HWAES_CAPABLE (OPENSSL_armcap_P & ARMV8_AES)
87 # define HWAES_set_encrypt_key aes_v8_set_encrypt_key
88 # define HWAES_set_decrypt_key aes_v8_set_decrypt_key
89 # define HWAES_encrypt aes_v8_encrypt
90 # define HWAES_decrypt aes_v8_decrypt
91 # define HWAES_cbc_encrypt aes_v8_cbc_encrypt
92 # define HWAES_ctr32_encrypt_blocks aes_v8_ctr32_encrypt_blocks
95 # endif /* OPENSSL_CPUID_OBJ */
97 # if defined(AES_ASM) && !defined(I386_ONLY) && ( \
98 ((defined(__i386) || defined(__i386__) || \
99 defined(_M_IX86)) && defined(OPENSSL_IA32_SSE2))|| \
100 defined(__x86_64) || defined(__x86_64__) || \
101 defined(_M_AMD64) || defined(_M_X64) )
104 extern unsigned int OPENSSL_ia32cap_P[];
106 # define AESNI_CAPABLE (OPENSSL_ia32cap_P[1]&(1<<(57-32)))
108 # define VPAES_CAPABLE (OPENSSL_ia32cap_P[1]&(1<<(41-32)))
111 # define BSAES_CAPABLE (OPENSSL_ia32cap_P[1]&(1<<(41-32)))
114 int aesni_set_encrypt_key(const unsigned char *userKey, int bits,
116 int aesni_set_decrypt_key(const unsigned char *userKey, int bits,
119 void aesni_encrypt(const unsigned char *in, unsigned char *out,
121 void aesni_decrypt(const unsigned char *in, unsigned char *out,
124 void aesni_ecb_encrypt(const unsigned char *in,
126 size_t length, const AES_KEY *key, int enc);
127 void aesni_cbc_encrypt(const unsigned char *in,
130 const AES_KEY *key, unsigned char *ivec, int enc);
131 # ifndef OPENSSL_NO_OCB
132 void aesni_ocb_encrypt(const unsigned char *in, unsigned char *out,
133 size_t blocks, const void *key,
134 size_t start_block_num,
135 unsigned char offset_i[16],
136 const unsigned char L_[][16],
137 unsigned char checksum[16]);
138 void aesni_ocb_decrypt(const unsigned char *in, unsigned char *out,
139 size_t blocks, const void *key,
140 size_t start_block_num,
141 unsigned char offset_i[16],
142 const unsigned char L_[][16],
143 unsigned char checksum[16]);
144 # endif /* OPENSSL_NO_OCB */
146 void aesni_ctr32_encrypt_blocks(const unsigned char *in,
149 const void *key, const unsigned char *ivec);
151 void aesni_xts_encrypt(const unsigned char *in,
154 const AES_KEY *key1, const AES_KEY *key2,
155 const unsigned char iv[16]);
157 void aesni_xts_decrypt(const unsigned char *in,
160 const AES_KEY *key1, const AES_KEY *key2,
161 const unsigned char iv[16]);
163 void aesni_ccm64_encrypt_blocks(const unsigned char *in,
167 const unsigned char ivec[16],
168 unsigned char cmac[16]);
170 void aesni_ccm64_decrypt_blocks(const unsigned char *in,
174 const unsigned char ivec[16],
175 unsigned char cmac[16]);
177 # if defined(__x86_64) || defined(__x86_64__) || defined(_M_AMD64) || defined(_M_X64)
178 size_t aesni_gcm_encrypt(const unsigned char *in, unsigned char *out, size_t len,
179 const void *key, unsigned char ivec[16], u64 *Xi);
180 size_t aesni_gcm_decrypt(const unsigned char *in, unsigned char *out, size_t len,
181 const void *key, unsigned char ivec[16], u64 *Xi);
182 void gcm_ghash_avx(u64 Xi[2], const u128 Htable[16], const u8 *in, size_t len);
184 # define AES_GCM_ASM(ctx) (ctx->ctr == aesni_ctr32_encrypt_blocks && \
185 ctx->gcm.ghash == gcm_ghash_avx)
189 # elif defined(AES_ASM) && (defined(__sparc) || defined(__sparc__))
191 /* Fujitsu SPARC64 X support */
192 extern unsigned int OPENSSL_sparcv9cap_P[];
193 # include "sparc_arch.h"
195 # ifndef OPENSSL_NO_CAMELLIA
196 # define SPARC_CMLL_CAPABLE (OPENSSL_sparcv9cap_P[1] & CFR_CAMELLIA)
198 void cmll_t4_set_key(const unsigned char *key, int bits, CAMELLIA_KEY *ks);
199 void cmll_t4_encrypt(const unsigned char *in, unsigned char *out,
200 const CAMELLIA_KEY *key);
201 void cmll_t4_decrypt(const unsigned char *in, unsigned char *out,
202 const CAMELLIA_KEY *key);
204 void cmll128_t4_cbc_encrypt(const unsigned char *in, unsigned char *out,
205 size_t len, const CAMELLIA_KEY *key,
206 unsigned char *ivec);
207 void cmll128_t4_cbc_decrypt(const unsigned char *in, unsigned char *out,
208 size_t len, const CAMELLIA_KEY *key,
209 unsigned char *ivec);
210 void cmll256_t4_cbc_encrypt(const unsigned char *in, unsigned char *out,
211 size_t len, const CAMELLIA_KEY *key,
212 unsigned char *ivec);
213 void cmll256_t4_cbc_decrypt(const unsigned char *in, unsigned char *out,
214 size_t len, const CAMELLIA_KEY *key,
215 unsigned char *ivec);
216 void cmll128_t4_ctr32_encrypt(const unsigned char *in, unsigned char *out,
217 size_t blocks, const CAMELLIA_KEY *key,
218 unsigned char *ivec);
219 void cmll256_t4_ctr32_encrypt(const unsigned char *in, unsigned char *out,
220 size_t blocks, const CAMELLIA_KEY *key,
221 unsigned char *ivec);
222 # endif /* OPENSSL_NO_CAMELLIA */
225 # define SPARC_AES_CAPABLE (OPENSSL_sparcv9cap_P[1] & CFR_AES)
226 # define SPARC_DES_CAPABLE (OPENSSL_sparcv9cap_P[1] & CFR_DES)
227 # define HWAES_CAPABLE (OPENSSL_sparcv9cap_P[0] & SPARCV9_FJAESX)
228 # define HWAES_set_encrypt_key aes_fx_set_encrypt_key
229 # define HWAES_set_decrypt_key aes_fx_set_decrypt_key
230 # define HWAES_encrypt aes_fx_encrypt
231 # define HWAES_decrypt aes_fx_decrypt
232 # define HWAES_cbc_encrypt aes_fx_cbc_encrypt
233 # define HWAES_ctr32_encrypt_blocks aes_fx_ctr32_encrypt_blocks
235 void aes_t4_set_encrypt_key(const unsigned char *key, int bits, AES_KEY *ks);
236 void aes_t4_set_decrypt_key(const unsigned char *key, int bits, AES_KEY *ks);
237 void aes_t4_encrypt(const unsigned char *in, unsigned char *out,
239 void aes_t4_decrypt(const unsigned char *in, unsigned char *out,
241 void des_t4_key_expand(const void *key, DES_key_schedule *ks);
242 void des_t4_ede3_cbc_encrypt(const void *inp, void *out, size_t len,
243 const DES_key_schedule ks[3], unsigned char iv[8]);
244 void des_t4_ede3_cbc_decrypt(const void *inp, void *out, size_t len,
245 const DES_key_schedule ks[3], unsigned char iv[8]);
248 * Key-length specific subroutines were chosen for following reason.
249 * Each SPARC T4 core can execute up to 8 threads which share core's
250 * resources. Loading as much key material to registers allows to
251 * minimize references to shared memory interface, as well as amount
252 * of instructions in inner loops [much needed on T4]. But then having
253 * non-key-length specific routines would require conditional branches
254 * either in inner loops or on subroutines' entries. Former is hardly
255 * acceptable, while latter means code size increase to size occupied
256 * by multiple key-length specific subroutines, so why fight?
258 void aes128_t4_cbc_encrypt(const unsigned char *in, unsigned char *out,
259 size_t len, const AES_KEY *key,
260 unsigned char *ivec);
261 void aes128_t4_cbc_decrypt(const unsigned char *in, unsigned char *out,
262 size_t len, const AES_KEY *key,
263 unsigned char *ivec);
264 void aes192_t4_cbc_encrypt(const unsigned char *in, unsigned char *out,
265 size_t len, const AES_KEY *key,
266 unsigned char *ivec);
267 void aes192_t4_cbc_decrypt(const unsigned char *in, unsigned char *out,
268 size_t len, const AES_KEY *key,
269 unsigned char *ivec);
270 void aes256_t4_cbc_encrypt(const unsigned char *in, unsigned char *out,
271 size_t len, const AES_KEY *key,
272 unsigned char *ivec);
273 void aes256_t4_cbc_decrypt(const unsigned char *in, unsigned char *out,
274 size_t len, const AES_KEY *key,
275 unsigned char *ivec);
276 void aes128_t4_ctr32_encrypt(const unsigned char *in, unsigned char *out,
277 size_t blocks, const AES_KEY *key,
278 unsigned char *ivec);
279 void aes192_t4_ctr32_encrypt(const unsigned char *in, unsigned char *out,
280 size_t blocks, const AES_KEY *key,
281 unsigned char *ivec);
282 void aes256_t4_ctr32_encrypt(const unsigned char *in, unsigned char *out,
283 size_t blocks, const AES_KEY *key,
284 unsigned char *ivec);
285 void aes128_t4_xts_encrypt(const unsigned char *in, unsigned char *out,
286 size_t blocks, const AES_KEY *key1,
287 const AES_KEY *key2, const unsigned char *ivec);
288 void aes128_t4_xts_decrypt(const unsigned char *in, unsigned char *out,
289 size_t blocks, const AES_KEY *key1,
290 const AES_KEY *key2, const unsigned char *ivec);
291 void aes256_t4_xts_encrypt(const unsigned char *in, unsigned char *out,
292 size_t blocks, const AES_KEY *key1,
293 const AES_KEY *key2, const unsigned char *ivec);
294 void aes256_t4_xts_decrypt(const unsigned char *in, unsigned char *out,
295 size_t blocks, const AES_KEY *key1,
296 const AES_KEY *key2, const unsigned char *ivec);
298 # elif defined(OPENSSL_CPUID_OBJ) && defined(__s390__)
299 /* IBM S390X support */
300 # include "s390x_arch.h"
303 /* Convert key size to function code: [16,24,32] -> [18,19,20]. */
304 # define S390X_AES_FC(keylen) (S390X_AES_128 + ((((keylen) << 3) - 128) >> 6))
306 /* Most modes of operation need km for partial block processing. */
307 # define S390X_aes_128_CAPABLE (OPENSSL_s390xcap_P.km[0] & \
308 S390X_CAPBIT(S390X_AES_128))
309 # define S390X_aes_192_CAPABLE (OPENSSL_s390xcap_P.km[0] & \
310 S390X_CAPBIT(S390X_AES_192))
311 # define S390X_aes_256_CAPABLE (OPENSSL_s390xcap_P.km[0] & \
312 S390X_CAPBIT(S390X_AES_256))
314 # define S390X_aes_128_cbc_CAPABLE 1 /* checked by callee */
315 # define S390X_aes_192_cbc_CAPABLE 1
316 # define S390X_aes_256_cbc_CAPABLE 1
318 # define S390X_aes_128_ecb_CAPABLE S390X_aes_128_CAPABLE
319 # define S390X_aes_192_ecb_CAPABLE S390X_aes_192_CAPABLE
320 # define S390X_aes_256_ecb_CAPABLE S390X_aes_256_CAPABLE
322 # define S390X_aes_128_ofb_CAPABLE (S390X_aes_128_CAPABLE && \
323 (OPENSSL_s390xcap_P.kmo[0] & \
324 S390X_CAPBIT(S390X_AES_128)))
325 # define S390X_aes_192_ofb_CAPABLE (S390X_aes_192_CAPABLE && \
326 (OPENSSL_s390xcap_P.kmo[0] & \
327 S390X_CAPBIT(S390X_AES_192)))
328 # define S390X_aes_256_ofb_CAPABLE (S390X_aes_256_CAPABLE && \
329 (OPENSSL_s390xcap_P.kmo[0] & \
330 S390X_CAPBIT(S390X_AES_256)))
332 # define S390X_aes_128_cfb_CAPABLE (S390X_aes_128_CAPABLE && \
333 (OPENSSL_s390xcap_P.kmf[0] & \
334 S390X_CAPBIT(S390X_AES_128)))
335 # define S390X_aes_192_cfb_CAPABLE (S390X_aes_192_CAPABLE && \
336 (OPENSSL_s390xcap_P.kmf[0] & \
337 S390X_CAPBIT(S390X_AES_192)))
338 # define S390X_aes_256_cfb_CAPABLE (S390X_aes_256_CAPABLE && \
339 (OPENSSL_s390xcap_P.kmf[0] & \
340 S390X_CAPBIT(S390X_AES_256)))
341 # define S390X_aes_128_cfb8_CAPABLE (OPENSSL_s390xcap_P.kmf[0] & \
342 S390X_CAPBIT(S390X_AES_128))
343 # define S390X_aes_192_cfb8_CAPABLE (OPENSSL_s390xcap_P.kmf[0] & \
344 S390X_CAPBIT(S390X_AES_192))
345 # define S390X_aes_256_cfb8_CAPABLE (OPENSSL_s390xcap_P.kmf[0] & \
346 S390X_CAPBIT(S390X_AES_256))
347 # define S390X_aes_128_cfb1_CAPABLE 0
348 # define S390X_aes_192_cfb1_CAPABLE 0
349 # define S390X_aes_256_cfb1_CAPABLE 0
351 # define S390X_aes_128_ctr_CAPABLE 1 /* checked by callee */
352 # define S390X_aes_192_ctr_CAPABLE 1
353 # define S390X_aes_256_ctr_CAPABLE 1
355 # define S390X_aes_128_xts_CAPABLE 1 /* checked by callee */
356 # define S390X_aes_256_xts_CAPABLE 1
358 # define S390X_aes_128_gcm_CAPABLE (S390X_aes_128_CAPABLE && \
359 (OPENSSL_s390xcap_P.kma[0] & \
360 S390X_CAPBIT(S390X_AES_128)))
361 # define S390X_aes_192_gcm_CAPABLE (S390X_aes_192_CAPABLE && \
362 (OPENSSL_s390xcap_P.kma[0] & \
363 S390X_CAPBIT(S390X_AES_192)))
364 # define S390X_aes_256_gcm_CAPABLE (S390X_aes_256_CAPABLE && \
365 (OPENSSL_s390xcap_P.kma[0] & \
366 S390X_CAPBIT(S390X_AES_256)))
368 # define S390X_aes_128_ccm_CAPABLE (S390X_aes_128_CAPABLE && \
369 (OPENSSL_s390xcap_P.kmac[0] & \
370 S390X_CAPBIT(S390X_AES_128)))
371 # define S390X_aes_192_ccm_CAPABLE (S390X_aes_192_CAPABLE && \
372 (OPENSSL_s390xcap_P.kmac[0] & \
373 S390X_CAPBIT(S390X_AES_192)))
374 # define S390X_aes_256_ccm_CAPABLE (S390X_aes_256_CAPABLE && \
375 (OPENSSL_s390xcap_P.kmac[0] & \
376 S390X_CAPBIT(S390X_AES_256)))
377 # define S390X_CCM_AAD_FLAG 0x40
379 # ifndef OPENSSL_NO_OCB
380 # define S390X_aes_128_ocb_CAPABLE 0
381 # define S390X_aes_192_ocb_CAPABLE 0
382 # define S390X_aes_256_ocb_CAPABLE 0
383 # endif /* OPENSSL_NO_OCB */
385 # ifndef OPENSSL_NO_SIV
386 # define S390X_aes_128_siv_CAPABLE 0
387 # define S390X_aes_192_siv_CAPABLE 0
388 # define S390X_aes_256_siv_CAPABLE 0
389 # endif /* OPENSSL_NO_SIV */
391 /* Convert key size to function code: [16,24,32] -> [18,19,20]. */
392 # define S390X_AES_FC(keylen) (S390X_AES_128 + ((((keylen) << 3) - 128) >> 6))
395 # if defined(HWAES_CAPABLE)
396 int HWAES_set_encrypt_key(const unsigned char *userKey, const int bits,
398 int HWAES_set_decrypt_key(const unsigned char *userKey, const int bits,
400 void HWAES_encrypt(const unsigned char *in, unsigned char *out,
402 void HWAES_decrypt(const unsigned char *in, unsigned char *out,
404 void HWAES_cbc_encrypt(const unsigned char *in, unsigned char *out,
405 size_t length, const AES_KEY *key,
406 unsigned char *ivec, const int enc);
407 void HWAES_ctr32_encrypt_blocks(const unsigned char *in, unsigned char *out,
408 size_t len, const AES_KEY *key,
409 const unsigned char ivec[16]);
410 void HWAES_xts_encrypt(const unsigned char *inp, unsigned char *out,
411 size_t len, const AES_KEY *key1,
412 const AES_KEY *key2, const unsigned char iv[16]);
413 void HWAES_xts_decrypt(const unsigned char *inp, unsigned char *out,
414 size_t len, const AES_KEY *key1,
415 const AES_KEY *key2, const unsigned char iv[16]);
416 # ifndef OPENSSL_NO_OCB
417 # ifdef HWAES_ocb_encrypt
418 void HWAES_ocb_encrypt(const unsigned char *in, unsigned char *out,
419 size_t blocks, const void *key,
420 size_t start_block_num,
421 unsigned char offset_i[16],
422 const unsigned char L_[][16],
423 unsigned char checksum[16]);
425 # define HWAES_ocb_encrypt ((ocb128_f)NULL)
427 # ifdef HWAES_ocb_decrypt
428 void HWAES_ocb_decrypt(const unsigned char *in, unsigned char *out,
429 size_t blocks, const void *key,
430 size_t start_block_num,
431 unsigned char offset_i[16],
432 const unsigned char L_[][16],
433 unsigned char checksum[16]);
435 # define HWAES_ocb_decrypt ((ocb128_f)NULL)
437 # endif /* OPENSSL_NO_OCB */
439 # endif /* HWAES_CAPABLE */
441 #endif /* HEADER_INTERNAL_CIPHERMODE_PLATFORM_H */