2 # Copyright 2012-2016 The OpenSSL Project Authors. All Rights Reserved.
4 # Licensed under the OpenSSL license (the "License"). You may not use
5 # this file except in compliance with the License. You can obtain a copy
6 # in the file LICENSE in the source distribution or at
7 # https://www.openssl.org/source/license.html
9 while (($output=shift) && ($output!~/\w[\w\-]*\.\w+$/)) {}
10 open STDOUT,">$output";
15 .if .ASSEMBLER_VERSION<7000000
19 .asg OPENSSL_rdtsc,_OPENSSL_rdtsc
20 .asg OPENSSL_cleanse,_OPENSSL_cleanse
21 .asg CRYPTO_memcmp,_CRYPTO_memcmp
22 .asg OPENSSL_atomic_add,_OPENSSL_atomic_add
23 .asg OPENSSL_wipe_cpu,_OPENSSL_wipe_cpu
24 .asg OPENSSL_instrument_bus,_OPENSSL_instrument_bus
25 .asg OPENSSL_instrument_bus2,_OPENSSL_instrument_bus2
30 .global _OPENSSL_rdtsc
36 [!B0] MVC B0,TSCL ; start TSC
41 .global _OPENSSL_cleanse
46 || SHRU B4,3,B0 ; is length >= 8
55 || [B1] STB B2,*B6++[2]
59 || [B1] STB B2,*B6++[2]
63 || [B1] STB B2,*B6++[2]
72 MV B4,B0 ; remaining bytes
78 || [B1] STB B2,*B6++[2]
82 || [B1] STB B2,*B6++[2]
86 || [B1] STB B2,*B6++[2]
91 .global _CRYPTO_memcmp
114 .global _OPENSSL_atomic_add
130 .global _OPENSSL_wipe_cpu
176 CLFLUSH .macro CONTROL,ADDR,LEN
178 || STW ADDR,*CONTROL[0]
185 [A0] BNOP spinlock?,5
188 .global _OPENSSL_instrument_bus
189 _OPENSSL_instrument_bus:
191 MV B4,B0 ; reassign sizeof(output)
192 || MV A4,B4 ; reassign output
194 MV B0,A4 ; return value
196 || MVKH 0x01840000,A3 ; L1DWIBAR
197 MVC TSCL,B8 ; collect 1st tick
199 MV B8,B9 ; lasttick = tick
200 || MVK 0,B7 ; lastdiff = 0
201 || MVKH 0x01840000,A5 ; L2WIBAR
202 CLFLUSH A3,B4,A1 ; write-back and invalidate L1D line
203 CLFLUSH A5,B4,A1 ; write-back and invalidate L2 line
214 SUB B8,B9,B7 ; lastdiff = tick - lasttick
215 || MV B8,B9 ; lasttick = tick
216 CLFLUSH A3,B4,A1 ; write-back and invalidate L1D line
217 CLFLUSH A5,B4,A1 ; write-back and invalidate L2 line
223 STW B5,*B4 ; [!B1] is removed to flatten samples
225 || [B0] BNOP bus_loop1?,5
230 .global _OPENSSL_instrument_bus2
231 _OPENSSL_instrument_bus2:
233 MV A6,B0 ; reassign max
234 || MV B4,A6 ; reassing sizeof(output)
236 MV A4,B4 ; reassign output
237 || MVK 0,A4 ; return value
239 || MVKH 0x01840000,A3 ; L1DWIBAR
241 MVC TSCL,B8 ; collect 1st tick
243 MV B8,B9 ; lasttick = tick
244 || MVK 0,B7 ; lastdiff = 0
245 || MVKH 0x01840000,A5 ; L2WIBAR
246 CLFLUSH A3,B4,A1 ; write-back and invalidate L1D line
247 CLFLUSH A5,B4,A1 ; write-back and invalidate L2 line
256 MVC TSCL,B8 ; collect 1st diff
257 SUB B8,B9,B7 ; lastdiff = tick - lasttick
258 || MV B8,B9 ; lasttick = tick
261 CLFLUSH A3,B4,A1 ; write-back and invalidate L1D line
262 CLFLUSH A5,B4,A1 ; write-back and invalidate L2 line
268 STW B5,*B4 ; [!B1] is removed to flatten samples
269 ||[!B0] BNOP bus_loop2_done?,2
279 [!A2] BNOP bus_loop2?,5