4 while (($output=shift) && ($output!~/\w[\w\-]*\.\w+$/)) {}
5 open STDOUT,">$output";
10 .if .ASSEMBLER_VERSION<7000000
14 .asg OPENSSL_rdtsc,_OPENSSL_rdtsc
15 .asg OPENSSL_cleanse,_OPENSSL_cleanse
16 .asg OPENSSL_atomic_add,_OPENSSL_atomic_add
17 .asg OPENSSL_wipe_cpu,_OPENSSL_wipe_cpu
18 .asg OPENSSL_instrument_bus,_OPENSSL_instrument_bus
19 .asg OPENSSL_instrument_bus2,_OPENSSL_instrument_bus2
24 .global _OPENSSL_rdtsc
30 [!B0] MVC B0,TSCL ; start TSC
35 .global _OPENSSL_cleanse
40 || SHRU B4,3,B0 ; is length >= 8
49 || [B1] STB B2,*B6++[2]
53 || [B1] STB B2,*B6++[2]
57 || [B1] STB B2,*B6++[2]
66 MV B4,B0 ; remaining bytes
72 || [B1] STB B2,*B6++[2]
76 || [B1] STB B2,*B6++[2]
80 || [B1] STB B2,*B6++[2]
85 .global _OPENSSL_atomic_add
101 .global _OPENSSL_wipe_cpu
147 CLFLUSH .macro CONTROL,ADDR,LEN
149 || STW ADDR,*CONTROL[0]
156 [A0] BNOP spinlock?,5
159 .global _OPENSSL_instrument_bus
160 _OPENSSL_instrument_bus:
162 MV B4,B0 ; reassign sizeof(output)
163 || MV A4,B4 ; reassign output
165 MV B0,A4 ; return value
167 || MVKH 0x01840000,A3 ; L1DWIBAR
168 MVC TSCL,B8 ; collect 1st tick
170 MV B8,B9 ; lasttick = tick
171 || MVK 0,B7 ; lastdiff = 0
172 || MVKH 0x01840000,A5 ; L2WIBAR
173 CLFLUSH A3,B4,A1 ; write-back and invalidate L1D line
174 CLFLUSH A5,B4,A1 ; write-back and invalidate L2 line
185 SUB B8,B9,B7 ; lastdiff = tick - lasttick
186 || MV B8,B9 ; lasttick = tick
187 CLFLUSH A3,B4,A1 ; write-back and invalidate L1D line
188 CLFLUSH A5,B4,A1 ; write-back and invalidate L2 line
194 STW B5,*B4 ; [!B1] is removed to flatten samples
196 || [B0] BNOP bus_loop1?,5
201 .global _OPENSSL_instrument_bus2
202 _OPENSSL_instrument_bus2:
204 MV A6,B0 ; reassign max
205 || MV B4,A6 ; reassing sizeof(output)
207 MV A4,B4 ; reassign output
208 || MVK 0,A4 ; return value
210 || MVKH 0x01840000,A3 ; L1DWIBAR
212 MVC TSCL,B8 ; collect 1st tick
214 MV B8,B9 ; lasttick = tick
215 || MVK 0,B7 ; lastdiff = 0
216 || MVKH 0x01840000,A5 ; L2WIBAR
217 CLFLUSH A3,B4,A1 ; write-back and invalidate L1D line
218 CLFLUSH A5,B4,A1 ; write-back and invalidate L2 line
227 MVC TSCL,B8 ; collect 1st diff
228 SUB B8,B9,B7 ; lastdiff = tick - lasttick
229 || MV B8,B9 ; lasttick = tick
232 CLFLUSH A3,B4,A1 ; write-back and invalidate L1D line
233 CLFLUSH A5,B4,A1 ; write-back and invalidate L2 line
239 STW B5,*B4 ; [!B1] is removed to flatten samples
240 ||[!B0] BNOP bus_loop2_done?,2
250 [!A2] BNOP bus_loop2?,5