3 # ====================================================================
4 # Written by Andy Polyakov <appro@fy.chalmers.se> for the OpenSSL
5 # project. Rights for redistribution and usage in source and binary
6 # forms are granted according to the OpenSSL license.
7 # ====================================================================
11 # "Teaser" Montgomery multiplication module for UltraSPARC. Why FPU?
12 # Because unlike integer multiplier, which simply stalls whole CPU,
13 # FPU is fully pipelined and can effectively emit 48 bit partial
14 # product every cycle. Why not blended SPARC v9? One can argue that
15 # making this module dependent on UltraSPARC VIS extension limits its
16 # binary compatibility. Well yes, it does exclude SPARC64 prior-V(!)
17 # implementations from compatibility matrix. But the rest, whole Sun
18 # UltraSPARC family and brand new Fujitsu's SPARC64 V, all support
19 # VIS extension instructions used in this module. This is considered
20 # good enough to recommend HAL SPARC64 users [if any] to simply fall
21 # down to no-asm configuration.
23 # USI&II cores currently exhibit uniform 2x improvement [over pre-
24 # bn_mul_mont codebase] for all key lengths and benchmarks. On USIII
25 # performance improves few percents for shorter keys and worsens few
26 # percents for longer keys. This is because USIII integer multiplier
27 # is >3x faster than USI&II one, which is harder to match [but see
28 # TODO list below]. It should also be noted that SPARC64 V features
29 # out-of-order execution, which *might* mean that integer multiplier
30 # is pipelined, which in turn *might* be impossible to match... On
31 # additional note, SPARC64 V implements FP Multiply-Add instruction,
32 # which is perfectly usable in this context... In other words, as far
33 # as HAL/Fujitsu SPARC64 family goes, talk to the author:-)
35 # In 32-bit context the implementation implies following additional
36 # limitations on input arguments:
37 # - num may not be less than 4;
38 # - num has to be even;
39 # - ap, bp, rp, np has to be 64-bit aligned [which is not a problem
40 # as long as BIGNUM.d are malloc-ated];
41 # Failure to meet either condition has no fatal effects, simply
42 # doesn't give any performance gain.
45 # - modulo-schedule inner loop for better performance (on in-order
46 # execution core such as UltraSPARC this shall result in further
47 # noticeable(!) improvement);
48 # - dedicated squaring procedure[?];
53 $bits=64 if (/\-m64/ || /\-xarch\=v9/);
54 $vis=1 if (/\-mcpu=ultra/ || /\-xarch\=v[9|8plus]\S/);
59 .section ".text",#alloc,#execinstr
63 xor %o0,%o0,%o0 ! just signal "not implemented"
64 .type $fname,#function
65 .size $fname,(.-$fname)
75 $frame=128; # 96 rounded up to largest known cache-line
79 # In order to provide for 32-/64-bit ABI duality, I keep integers wider
80 # than 32 bit in %g1-%g4 and %o0-%o5. %l0-%l7 and %i0-%i5 are used
81 # exclusively for pointers, indexes and other small values...
83 $rp="%i0"; # BN_ULONG *rp,
84 $ap="%i1"; # const BN_ULONG *ap,
85 $bp="%i2"; # const BN_ULONG *bp,
86 $np="%i3"; # const BN_ULONG *np,
87 $n0="%i4"; # const BN_ULONG *n0,
88 $num="%i5"; # int num);
91 $ap_l="%l1"; # a[num],n[num] are smashed to 32-bit words and saved
92 $ap_h="%l2"; # to these four vectors as double-precision FP values.
93 $np_l="%l3"; # This way a bunch of fxtods are eliminated in second
94 $np_h="%l4"; # loop and L1-cache aliasing is minimized...
97 $mask="%l7"; # 16-bit mask, 0xffff
99 $n0="%g4"; # reassigned(!) to "64-bit" register
100 $carry="%i4"; # %i4 reused(!) for a carry bit
102 # FP register naming chart
117 $ba="%f0"; $bb="%f2"; $bc="%f4"; $bd="%f6";
118 $na="%f8"; $nb="%f10"; $nc="%f12"; $nd="%f14";
119 $alo="%f16"; $alo_="%f17"; $ahi="%f18"; $ahi_="%f19";
120 $nlo="%f20"; $nlo_="%f21"; $nhi="%f22"; $nhi_="%f23";
122 $dota="%f24"; $dotb="%f26";
124 $aloa="%f32"; $alob="%f34"; $aloc="%f36"; $alod="%f38";
125 $ahia="%f40"; $ahib="%f42"; $ahic="%f44"; $ahid="%f46";
126 $nloa="%f48"; $nlob="%f50"; $nloc="%f52"; $nlod="%f54";
127 $nhia="%f56"; $nhib="%f58"; $nhic="%f60"; $nhid="%f62";
129 $ASI_FL16_P=0xD2; # magic ASI value to engage 16-bit FP load
132 .ident "UltraSPARC Montgomery multiply by <appro\@fy.chalmers.se>"
133 .section ".text",#alloc,#execinstr
138 save %sp,-$frame-$locals,%sp
139 sethi %hi(0xffff),$mask
140 or $mask,%lo(0xffff),$mask
145 andcc $num,1,%g0 ! $num has to be even...
147 clr %i0 ! signal "unsupported input value"
152 andcc %l0,7,%g0 ! ...and pointers has to be 8-byte aligned
154 clr %i0 ! signal "unsupported input value"
155 ld [%i4+0],$n0 ! $n0 reassigned, remember?
158 or %o0,$n0,$n0 ! $n0=n0[1].n0[0]
160 sll $num,3,$num ! num*=8
162 add %sp,$bias,%o0 ! real top of stack
164 add %o1,$num,%o1 ! %o1=num*5
166 and %o0,-2048,%o0 ! optimize TLB utilization
167 sub %o0,$bias,%sp ! alloca(5*num*8)
169 rd %asi,%o7 ! save %asi
170 add %sp,$bias+$frame+$locals,$tp
172 add $ap_l,$num,$ap_l ! [an]p_[lh] point at the vectors' ends !
177 wr %g0,$ASI_FL16_P,%asi ! setup %asi for 16-bit FP loads
179 add $rp,$num,$rp ! readjust input pointers to point
180 add $ap,$num,$ap ! at the ends too...
184 stx %o7,[%sp+$bias+$frame+48] ! save %asi
186 sub %g0,$num,$i ! i=-num
187 sub %g0,$num,$j ! j=-num
192 ldx [$bp+$i],%o0 ! bp[0]
193 ldx [$ap+$j],%o1 ! ap[0]
203 mulx %o1,%o0,%o0 ! ap[0]*bp[0]
204 mulx $n0,%o0,%o0 ! ap[0]*bp[0]*n0
205 stx %o0,[%sp+$bias+$frame+0]
207 ld [%o3+0],$alo_ ! load a[j] as pair of 32-bit words
211 ld [%o5+0],$nlo_ ! load n[j] as pair of 32-bit words
216 ! transfer b[i] to FPU as 4x16-bit values
226 ! transfer ap[0]*b[0]*n0 to FPU as 4x16-bit values
227 ldda [%sp+$bias+$frame+6]%asi,$na
229 ldda [%sp+$bias+$frame+4]%asi,$nb
231 ldda [%sp+$bias+$frame+2]%asi,$nc
233 ldda [%sp+$bias+$frame+0]%asi,$nd
236 std $alo,[$ap_l+$j] ! save smashed ap[j] in double format
240 std $nlo,[$np_l+$j] ! save smashed np[j] in double format
250 faddd $aloa,$nloa,$nloa
253 faddd $alob,$nlob,$nlob
256 faddd $aloc,$nloc,$nloc
259 faddd $alod,$nlod,$nlod
262 faddd $ahia,$nhia,$nhia
265 faddd $ahib,$nhib,$nhib
268 faddd $ahic,$nhic,$dota ! $nhic
269 faddd $ahid,$nhid,$dotb ! $nhid
271 faddd $nloc,$nhia,$nloc
272 faddd $nlod,$nhib,$nlod
279 std $nloa,[%sp+$bias+$frame+0]
280 std $nlob,[%sp+$bias+$frame+8]
281 std $nloc,[%sp+$bias+$frame+16]
282 std $nlod,[%sp+$bias+$frame+24]
283 ldx [%sp+$bias+$frame+0],%o0
284 ldx [%sp+$bias+$frame+8],%o1
285 ldx [%sp+$bias+$frame+16],%o2
286 ldx [%sp+$bias+$frame+24],%o3
293 add %o7,%o3,%o3 ! %o3.%o2[0..15].%o1[0..15].%o0[0..15]
302 !or %o7,%o0,%o0 ! 64-bit result
303 srlx %o3,16,%g1 ! 34-bit carry
311 ld [%o3+0],$alo_ ! load a[j] as pair of 32-bit words
315 ld [%o4+0],$nlo_ ! load n[j] as pair of 32-bit words
325 std $alo,[$ap_l+$j] ! save smashed ap[j] in double format
329 std $nlo,[$np_l+$j] ! save smashed np[j] in double format
334 faddd $aloa,$nloa,$nloa
337 faddd $alob,$nlob,$nlob
340 faddd $aloc,$nloc,$nloc
343 faddd $alod,$nlod,$nlod
346 faddd $ahia,$nhia,$nhia
349 faddd $ahib,$nhib,$nhib
352 faddd $dota,$nloa,$nloa
353 faddd $dotb,$nlob,$nlob
354 faddd $ahic,$nhic,$dota ! $nhic
355 faddd $ahid,$nhid,$dotb ! $nhid
357 faddd $nloc,$nhia,$nloc
358 faddd $nlod,$nhib,$nlod
365 std $nloa,[%sp+$bias+$frame+0]
366 std $nlob,[%sp+$bias+$frame+8]
367 std $nloc,[%sp+$bias+$frame+16]
368 std $nlod,[%sp+$bias+$frame+24]
369 ldx [%sp+$bias+$frame+0],%o0
370 ldx [%sp+$bias+$frame+8],%o1
371 ldx [%sp+$bias+$frame+16],%o2
372 ldx [%sp+$bias+$frame+24],%o3
379 add %o7,%o3,%o3 ! %o3.%o2[0..15].%o1[0..15].%o0[0..15]
388 or %o7,%o0,%o0 ! 64-bit result
390 srlx %o3,16,%g1 ! 34-bit carry
394 stx %o0,[$tp] ! tp[j-1]=
401 std $dota,[%sp+$bias+$frame+32]
402 std $dotb,[%sp+$bias+$frame+40]
403 ldx [%sp+$bias+$frame+32],%o0
404 ldx [%sp+$bias+$frame+40],%o1
417 stx %o0,[$tp] ! tp[num-1]=
423 sub %g0,$num,$j ! j=-num
424 add %sp,$bias+$frame+$locals,$tp
428 ldx [$bp+$i],%o0 ! bp[i]
429 ldx [$ap+$j],%o1 ! ap[0]
437 ldx [$tp],%o2 ! tp[0]
440 mulx $n0,%o0,%o0 ! (ap[0]*bp[i]+t[0])*n0
441 stx %o0,[%sp+$bias+$frame+0]
443 ! transfer b[i] to FPU as 4x16-bit values
449 ! transfer (ap[0]*b[i]+t[0])*n0 to FPU as 4x16-bit values
450 ldda [%sp+$bias+$frame+6]%asi,$na
452 ldda [%sp+$bias+$frame+4]%asi,$nb
454 ldda [%sp+$bias+$frame+2]%asi,$nc
456 ldda [%sp+$bias+$frame+0]%asi,$nd
458 ldd [$ap_l+$j],$alo ! load a[j] in double format
462 ldd [$np_l+$j],$nlo ! load n[j] in double format
472 faddd $aloa,$nloa,$nloa
475 faddd $alob,$nlob,$nlob
478 faddd $aloc,$nloc,$nloc
481 faddd $alod,$nlod,$nlod
484 faddd $ahia,$nhia,$nhia
487 faddd $ahib,$nhib,$nhib
490 faddd $ahic,$nhic,$dota ! $nhic
491 faddd $ahid,$nhid,$dotb ! $nhid
493 faddd $nloc,$nhia,$nloc
494 faddd $nlod,$nhib,$nlod
501 std $nloa,[%sp+$bias+$frame+0]
502 std $nlob,[%sp+$bias+$frame+8]
503 std $nloc,[%sp+$bias+$frame+16]
504 std $nlod,[%sp+$bias+$frame+24]
505 ldx [%sp+$bias+$frame+0],%o0
506 ldx [%sp+$bias+$frame+8],%o1
507 ldx [%sp+$bias+$frame+16],%o2
508 ldx [%sp+$bias+$frame+24],%o3
515 add %o7,%o3,%o3 ! %o3.%o2[0..15].%o1[0..15].%o0[0..15]
525 or %o7,%o0,%o0 ! 64-bit result
529 srlx %o3,16,%g1 ! 34-bit carry
537 ldd [$ap_l+$j],$alo ! load a[j] in double format
539 ldd [$np_l+$j],$nlo ! load n[j] in double format
547 faddd $aloa,$nloa,$nloa
550 faddd $alob,$nlob,$nlob
553 faddd $aloc,$nloc,$nloc
556 faddd $alod,$nlod,$nlod
559 faddd $ahia,$nhia,$nhia
562 faddd $ahib,$nhib,$nhib
565 faddd $dota,$nloa,$nloa
566 faddd $dotb,$nlob,$nlob
567 faddd $ahic,$nhic,$dota ! $nhic
568 faddd $ahid,$nhid,$dotb ! $nhid
570 faddd $nloc,$nhia,$nloc
571 faddd $nlod,$nhib,$nlod
578 std $nloa,[%sp+$bias+$frame+0]
579 std $nlob,[%sp+$bias+$frame+8]
580 std $nloc,[%sp+$bias+$frame+16]
581 std $nlod,[%sp+$bias+$frame+24]
582 ldx [%sp+$bias+$frame+0],%o0
583 ldx [%sp+$bias+$frame+8],%o1
584 ldx [%sp+$bias+$frame+16],%o2
585 ldx [%sp+$bias+$frame+24],%o3
592 add %o7,%o3,%o3 ! %o3.%o2[0..15].%o1[0..15].%o0[0..15]
601 or %o7,%o0,%o0 ! 64-bit result
603 srlx %o3,16,%g1 ! 34-bit carry
607 ldx [$tp+8],%o7 ! tp[j]
612 stx %o0,[$tp] ! tp[j-1]
619 std $dota,[%sp+$bias+$frame+32]
620 std $dotb,[%sp+$bias+$frame+40]
621 ldx [%sp+$bias+$frame+32],%o0
622 ldx [%sp+$bias+$frame+40],%o1
635 stx %o0,[$tp] ! tp[num-1]
644 sub %g0,$num,%o7 ! n=-num
645 cmp $carry,0 ! clears %icc.c
647 add $tp,8,$tp ! adjust tp to point at the end
651 cmp %o0,%o1 ! compare topmost words
652 bcs,pt %icc,.Lcopy ! %icc.c is clean if not taken
665 subccc $carry,0,$carry
667 sub %g0,$num,%o7 ! n=-num
678 sub %g0,$num,%o7 ! n=-num
691 ldx [%sp+$bias+$frame+48],%o7
692 wr %g0,%o7,%asi ! restore %asi
698 .type $fname,#function
699 .size $fname,(.-$fname)
702 $code =~ s/\`([^\`]*)\`/eval($1)/gem;