3 # ====================================================================
4 # Written by Andy Polyakov <appro@openssl.org> for the OpenSSL
5 # project. The module is, however, dual licensed under OpenSSL and
6 # CRYPTOGAMS licenses depending on where you obtain it. For further
7 # details see http://www.openssl.org/~appro/cryptogams/.
8 # ====================================================================
12 # The reason for undertaken effort is basically following. Even though
13 # Power 6 CPU operates at incredible 4.7GHz clock frequency, its PKI
14 # performance was observed to be less than impressive, essentially as
15 # fast as 1.8GHz PPC970, or 2.6 times(!) slower than one would hope.
16 # Well, it's not surprising that IBM had to make some sacrifices to
17 # boost the clock frequency that much, but no overall improvement?
18 # Having observed how much difference did switching to FPU make on
19 # UltraSPARC, playing same stunt on Power 6 appeared appropriate...
20 # Unfortunately the resulting performance improvement is not as
21 # impressive, ~30%, and in absolute terms is still very far from what
22 # one would expect from 4.7GHz CPU. There is a chance that I'm doing
23 # something wrong, but in the lack of assembler level micro-profiling
24 # data or at least decent platform guide I can't tell... Or better
25 # results might be achieved with VMX... Anyway, this module provides
26 # *worse* performance on other PowerPC implementations, ~40-15% slower
27 # on PPC970 depending on key length and ~40% slower on Power 5 for all
28 # key lengths. As it's obviously inappropriate as "best all-round"
29 # alternative, it has to be complemented with run-time CPU family
30 # detection. Oh! It should also be noted that unlike other PowerPC
31 # implementation IALU ppc-mont.pl module performs *suboptimaly* on
32 # >=1024-bit key lengths on Power 6. It should also be noted that
33 # *everything* said so far applies to 64-bit builds! As far as 32-bit
34 # application executed on 64-bit CPU goes, this module is likely to
35 # become preferred choice, because it's easy to adapt it for such
36 # case and *is* faster than 32-bit ppc-mont.pl on *all* processors.
40 # Micro-profiling assisted optimization results in ~15% improvement
41 # over original ppc64-mont.pl version, or overall ~50% improvement
42 # over ppc.pl module on Power 6. If compared to ppc-mont.pl on same
43 # Power 6 CPU, this module is 5-150% faster depending on key length,
44 # [hereafter] more for longer keys. But if compared to ppc-mont.pl
45 # on 1.8GHz PPC970, it's only 5-55% faster. Still far from impressive
46 # in absolute terms, but it's apparently the way Power 6 is...
50 # Adapted for 32-bit build this module delivers 25-120%, yes, more
51 # than *twice* for longer keys, performance improvement over 32-bit
52 # ppc-mont.pl on 1.8GHz PPC970. However! This implementation utilizes
53 # even 64-bit integer operations and the trouble is that most PPC
54 # operating systems don't preserve upper halves of general purpose
55 # registers upon 32-bit signal delivery. They do preserve them upon
56 # context switch, but not signalling:-( This means that asynchronous
57 # signals have to be blocked upon entry to this subroutine. Signal
58 # masking (and of course complementary unmasking) has quite an impact
59 # on performance, naturally larger for shorter keys. It's so severe
60 # that 512-bit key performance can be as low as 1/3 of expected one.
61 # This is why this routine can be engaged for longer key operations
62 # only on these OSes, see crypto/ppccap.c for further details. MacOS X
63 # is an exception from this and doesn't require signal masking, and
64 # that's where above improvement coefficients were collected. For
65 # others alternative would be to break dependence on upper halves of
66 # GPRs by sticking to 32-bit integer operations...
70 # Remove above mentioned dependence on GPRs' upper halves in 32-bit
71 # build. No signal masking overhead, but integer instructions are
72 # *more* numerous... It's still "universally" faster than 32-bit
73 # ppc-mont.pl, but improvement coefficient is not as impressive
78 if ($flavour =~ /32/) {
81 $fname= "bn_mul_mont_fpu64";
83 $STUX= "stwux"; # store indexed and update
86 } elsif ($flavour =~ /64/) {
89 $fname= "bn_mul_mont_fpu64";
91 # same as above, but 64-bit mnemonics...
92 $STUX= "stdux"; # store indexed and update
95 } else { die "nonsense $flavour"; }
97 $0 =~ m/(.*[\/\\])[^\/\\]+$/; $dir=$1;
98 ( $xlate="${dir}ppc-xlate.pl" and -f $xlate ) or
99 ( $xlate="${dir}../../perlasm/ppc-xlate.pl" and -f $xlate) or
100 die "can't locate ppc-xlate.pl";
102 open STDOUT,"| $^X $xlate $flavour ".shift || die "can't call $xlate: $!";
104 $FRAME=64; # padded frame header
116 $rp="r9"; # $rp is reassigned
120 # non-volatile registers
124 $nap_d="r22"; # interleaved ap and np in double format
126 $t0="r24"; # temporary registers
135 # PPC offers enough register bank capacity to unroll inner loops twice
159 $ba="f0"; $bb="f1"; $bc="f2"; $bd="f3";
160 $na="f4"; $nb="f5"; $nc="f6"; $nd="f7";
161 $dota="f8"; $dotb="f9";
162 $A0="f10"; $A1="f11"; $A2="f12"; $A3="f13";
163 $N0="f20"; $N1="f21"; $N2="f22"; $N3="f23";
164 $T0a="f24"; $T0b="f25";
165 $T1a="f26"; $T1b="f27";
166 $T2a="f28"; $T2b="f29";
167 $T3a="f30"; $T3b="f31";
169 # sp----------->+-------------------------------+
171 # +-------------------------------+
173 # +64 +-------------------------------+
174 # | 16 gpr<->fpr transfer zone |
177 # +16*8 +-------------------------------+
178 # | __int64 tmp[-1] |
179 # +-------------------------------+
180 # | __int64 tmp[num] |
184 # +(num+1)*8 +-------------------------------+
185 # | padding to 64 byte boundary |
187 # +X +-------------------------------+
188 # | double nap_d[4*num] |
192 # +-------------------------------+
194 # -13*size_t +-------------------------------+
195 # | 13 saved gpr, r19-r31 |
198 # -12*8 +-------------------------------+
199 # | 12 saved fpr, f20-f31 |
202 # +-------------------------------+
211 cmpwi $num,`3*8/$SIZE_T`
212 mr $rp,r3 ; $rp is reassigned
213 li r3,0 ; possible "not handled" return code
215 andi. r0,$num,`16/$SIZE_T-1` ; $num has to be "even"
218 slwi $num,$num,`log($SIZE_T)/log(2)` ; num*=sizeof(BN_LONG)
220 slwi $tp,$num,2 ; place for {an}p_{lh}[num], i.e. 4*num
221 add $tp,$tp,$num ; place for tp[num+1]
222 addi $tp,$tp,`$FRAME+$TRANSFER+8+64+$RZONE`
223 subf $tp,$tp,$sp ; $sp-$tp
224 and $tp,$tp,$i ; minimize TLB usage
225 subf $tp,$sp,$tp ; $tp-$sp
227 $STUX $sp,$sp,$tp ; alloca
229 $PUSH r19,`-12*8-13*$SIZE_T`($i)
230 $PUSH r20,`-12*8-12*$SIZE_T`($i)
231 $PUSH r21,`-12*8-11*$SIZE_T`($i)
232 $PUSH r22,`-12*8-10*$SIZE_T`($i)
233 $PUSH r23,`-12*8-9*$SIZE_T`($i)
234 $PUSH r24,`-12*8-8*$SIZE_T`($i)
235 $PUSH r25,`-12*8-7*$SIZE_T`($i)
236 $PUSH r26,`-12*8-6*$SIZE_T`($i)
237 $PUSH r27,`-12*8-5*$SIZE_T`($i)
238 $PUSH r28,`-12*8-4*$SIZE_T`($i)
239 $PUSH r29,`-12*8-3*$SIZE_T`($i)
240 $PUSH r30,`-12*8-2*$SIZE_T`($i)
241 $PUSH r31,`-12*8-1*$SIZE_T`($i)
255 addi $tp,$sp,`$FRAME+$TRANSFER+8+64`
258 and $nap_d,$nap_d,$i ; align to 64 bytes
259 ; nap_d is off by 1, because it's used with stfdu/lfdu
260 addi $nap_d,$nap_d,-8
261 srwi $j,$num,`3+1` ; counter register, num/2
263 addi $tp,$sp,`$FRAME+$TRANSFER-8`
268 $code.=<<___ if ($SIZE_T==8);
269 ld $a0,0($ap) ; pull ap[0] value
270 ld $t3,0($bp) ; bp[0]
271 ld $n0,0($n0) ; pull n0[0] value
273 mulld $t7,$a0,$t3 ; ap[0]*bp[0]
274 ; transfer bp[0] to FPU as 4x16-bit values
279 std $t0,`$FRAME+0`($sp)
280 std $t1,`$FRAME+8`($sp)
281 std $t2,`$FRAME+16`($sp)
282 std $t3,`$FRAME+24`($sp)
284 mulld $t7,$t7,$n0 ; tp[0]*n0
285 ; transfer (ap[0]*bp[0])*n0 to FPU as 4x16-bit values
290 std $t4,`$FRAME+32`($sp)
291 std $t5,`$FRAME+40`($sp)
292 std $t6,`$FRAME+48`($sp)
293 std $t7,`$FRAME+56`($sp)
295 extrdi $t0,$a0,32,32 ; lwz $t0,4($ap)
296 extrdi $t1,$a0,32,0 ; lwz $t1,0($ap)
297 lwz $t2,12($ap) ; load a[1] as 32-bit word pair
299 lwz $t4,4($np) ; load n[0] as 32-bit word pair
301 lwz $t6,12($np) ; load n[1] as 32-bit word pair
304 $code.=<<___ if ($SIZE_T==4);
305 lwz $a0,0($ap) ; pull ap[0,1] value
309 lwz $t1,0($bp) ; bp[0,1]
311 lwz $n0,0($n1) ; pull n0[0,1] value
314 mullw $t4,$a0,$t1 ; mulld ap[0]*bp[0]
320 ; transfer bp[0] to FPU as 4x16-bit values
325 std $t0,`$FRAME+0`($sp) ; yes, std in 32-bit build
326 std $t1,`$FRAME+8`($sp)
327 std $t2,`$FRAME+16`($sp)
328 std $t3,`$FRAME+24`($sp)
330 mullw $t0,$t4,$n0 ; mulld tp[0]*n0
336 ; transfer (ap[0]*bp[0])*n0 to FPU as 4x16-bit values
341 std $t4,`$FRAME+32`($sp) ; yes, std in 32-bit build
342 std $t5,`$FRAME+40`($sp)
343 std $t6,`$FRAME+48`($sp)
344 std $t7,`$FRAME+56`($sp)
346 mr $t0,$a0 ; lwz $t0,0($ap)
347 mr $t1,$a1 ; lwz $t1,4($ap)
348 lwz $t2,8($ap) ; load a[j..j+3] as 32-bit word pairs
350 lwz $t4,0($np) ; load n[j..j+3] as 32-bit word pairs
356 lfd $ba,`$FRAME+0`($sp)
357 lfd $bb,`$FRAME+8`($sp)
358 lfd $bc,`$FRAME+16`($sp)
359 lfd $bd,`$FRAME+24`($sp)
360 lfd $na,`$FRAME+32`($sp)
361 lfd $nb,`$FRAME+40`($sp)
362 lfd $nc,`$FRAME+48`($sp)
363 lfd $nd,`$FRAME+56`($sp)
364 std $t0,`$FRAME+64`($sp) ; yes, std even in 32-bit build
365 std $t1,`$FRAME+72`($sp)
366 std $t2,`$FRAME+80`($sp)
367 std $t3,`$FRAME+88`($sp)
368 std $t4,`$FRAME+96`($sp)
369 std $t5,`$FRAME+104`($sp)
370 std $t6,`$FRAME+112`($sp)
371 std $t7,`$FRAME+120`($sp)
381 lfd $A0,`$FRAME+64`($sp)
382 lfd $A1,`$FRAME+72`($sp)
383 lfd $A2,`$FRAME+80`($sp)
384 lfd $A3,`$FRAME+88`($sp)
385 lfd $N0,`$FRAME+96`($sp)
386 lfd $N1,`$FRAME+104`($sp)
387 lfd $N2,`$FRAME+112`($sp)
388 lfd $N3,`$FRAME+120`($sp)
402 stfd $A0,8($nap_d) ; save a[j] in double format
406 stfd $A2,24($nap_d) ; save a[j+1] in double format
410 stfd $N0,40($nap_d) ; save n[j] in double format
414 stfd $N2,56($nap_d) ; save n[j+1] in double format
417 fmadd $T1a,$A0,$bc,$T1a
418 fmadd $T1b,$A0,$bd,$T1b
419 fmadd $T2a,$A1,$bc,$T2a
420 fmadd $T2b,$A1,$bd,$T2b
421 fmadd $T3a,$A2,$bc,$T3a
422 fmadd $T3b,$A2,$bd,$T3b
426 fmadd $T1a,$N1,$na,$T1a
427 fmadd $T1b,$N1,$nb,$T1b
428 fmadd $T2a,$N2,$na,$T2a
429 fmadd $T2b,$N2,$nb,$T2b
430 fmadd $T3a,$N3,$na,$T3a
431 fmadd $T3b,$N3,$nb,$T3b
432 fmadd $T0a,$N0,$na,$T0a
433 fmadd $T0b,$N0,$nb,$T0b
435 fmadd $T1a,$N0,$nc,$T1a
436 fmadd $T1b,$N0,$nd,$T1b
437 fmadd $T2a,$N1,$nc,$T2a
438 fmadd $T2b,$N1,$nd,$T2b
439 fmadd $T3a,$N2,$nc,$T3a
440 fmadd $T3b,$N2,$nd,$T3b
441 fmadd $dota,$N3,$nc,$dota
442 fmadd $dotb,$N3,$nd,$dotb
453 stfd $T0a,`$FRAME+0`($sp)
454 stfd $T0b,`$FRAME+8`($sp)
455 stfd $T1a,`$FRAME+16`($sp)
456 stfd $T1b,`$FRAME+24`($sp)
457 stfd $T2a,`$FRAME+32`($sp)
458 stfd $T2b,`$FRAME+40`($sp)
459 stfd $T3a,`$FRAME+48`($sp)
460 stfd $T3b,`$FRAME+56`($sp)
465 $code.=<<___ if ($SIZE_T==8);
466 lwz $t0,4($ap) ; load a[j] as 32-bit word pair
468 lwz $t2,12($ap) ; load a[j+1] as 32-bit word pair
470 lwz $t4,4($np) ; load n[j] as 32-bit word pair
472 lwz $t6,12($np) ; load n[j+1] as 32-bit word pair
475 $code.=<<___ if ($SIZE_T==4);
476 lwz $t0,0($ap) ; load a[j..j+3] as 32-bit word pairs
480 lwz $t4,0($np) ; load n[j..j+3] as 32-bit word pairs
486 std $t0,`$FRAME+64`($sp) ; yes, std even in 32-bit build
487 std $t1,`$FRAME+72`($sp)
488 std $t2,`$FRAME+80`($sp)
489 std $t3,`$FRAME+88`($sp)
490 std $t4,`$FRAME+96`($sp)
491 std $t5,`$FRAME+104`($sp)
492 std $t6,`$FRAME+112`($sp)
493 std $t7,`$FRAME+120`($sp)
495 if ($SIZE_T==8 or $flavour =~ /osx/) {
497 ld $t0,`$FRAME+0`($sp)
498 ld $t1,`$FRAME+8`($sp)
499 ld $t2,`$FRAME+16`($sp)
500 ld $t3,`$FRAME+24`($sp)
501 ld $t4,`$FRAME+32`($sp)
502 ld $t5,`$FRAME+40`($sp)
503 ld $t6,`$FRAME+48`($sp)
504 ld $t7,`$FRAME+56`($sp)
508 lwz $t1,`$FRAME+0`($sp)
509 lwz $t0,`$FRAME+4`($sp)
510 lwz $t3,`$FRAME+8`($sp)
511 lwz $t2,`$FRAME+12`($sp)
512 lwz $t5,`$FRAME+16`($sp)
513 lwz $t4,`$FRAME+20`($sp)
514 lwz $t7,`$FRAME+24`($sp)
515 lwz $t6,`$FRAME+28`($sp)
519 lfd $A0,`$FRAME+64`($sp)
520 lfd $A1,`$FRAME+72`($sp)
521 lfd $A2,`$FRAME+80`($sp)
522 lfd $A3,`$FRAME+88`($sp)
523 lfd $N0,`$FRAME+96`($sp)
524 lfd $N1,`$FRAME+104`($sp)
525 lfd $N2,`$FRAME+112`($sp)
526 lfd $N3,`$FRAME+120`($sp)
542 stfd $A0,8($nap_d) ; save a[j] in double format
546 fmadd $T0a,$A0,$ba,$dota
547 fmadd $T0b,$A0,$bb,$dotb
548 stfd $A2,24($nap_d) ; save a[j+1] in double format
551 if ($SIZE_T==8 or $flavour =~ /osx/) {
553 fmadd $T1a,$A0,$bc,$T1a
554 fmadd $T1b,$A0,$bd,$T1b
555 fmadd $T2a,$A1,$bc,$T2a
556 fmadd $T2b,$A1,$bd,$T2b
557 stfd $N0,40($nap_d) ; save n[j] in double format
559 fmadd $T3a,$A2,$bc,$T3a
560 fmadd $T3b,$A2,$bd,$T3b
561 add $t0,$t0,$carry ; can not overflow
564 stfd $N2,56($nap_d) ; save n[j+1] in double format
570 fmadd $T1a,$N1,$na,$T1a
571 fmadd $T1b,$N1,$nb,$T1b
573 fmadd $T2a,$N2,$na,$T2a
574 fmadd $T2b,$N2,$nb,$T2b
576 fmadd $T3a,$N3,$na,$T3a
577 fmadd $T3b,$N3,$nb,$T3b
579 fmadd $T0a,$N0,$na,$T0a
580 fmadd $T0b,$N0,$nb,$T0b
585 fmadd $T1a,$N0,$nc,$T1a
586 fmadd $T1b,$N0,$nd,$T1b
587 insrdi $t0,$t3,16,0 ; 0..63 bits
588 fmadd $T2a,$N1,$nc,$T2a
589 fmadd $T2b,$N1,$nd,$T2b
591 fmadd $T3a,$N2,$nc,$T3a
592 fmadd $T3b,$N2,$nd,$T3b
594 fmadd $dota,$N3,$nc,$dota
595 fmadd $dotb,$N3,$nd,$dotb
612 insrdi $t4,$t7,16,0 ; 64..127 bits
613 srdi $carry,$t7,16 ; upper 33 bits
615 stfd $T0a,`$FRAME+0`($sp)
616 stfd $T0b,`$FRAME+8`($sp)
617 stfd $T1a,`$FRAME+16`($sp)
618 stfd $T1b,`$FRAME+24`($sp)
619 stfd $T2a,`$FRAME+32`($sp)
620 stfd $T2b,`$FRAME+40`($sp)
621 stfd $T3a,`$FRAME+48`($sp)
622 stfd $T3b,`$FRAME+56`($sp)
623 std $t0,8($tp) ; tp[j-1]
624 stdu $t4,16($tp) ; tp[j]
628 fmadd $T1a,$A0,$bc,$T1a
629 fmadd $T1b,$A0,$bd,$T1b
633 fmadd $T2a,$A1,$bc,$T2a
634 fmadd $T2b,$A1,$bd,$T2b
635 stfd $N0,40($nap_d) ; save n[j] in double format
638 insrwi $carry,$t1,16,0
639 fmadd $T3a,$A2,$bc,$T3a
640 fmadd $T3b,$A2,$bd,$T3b
646 stfd $N2,56($nap_d) ; save n[j+1] in double format
648 insrwi $t0,$t2,16,0 ; 0..31 bits
650 insrwi $carry,$t3,16,0
652 fmadd $T1a,$N1,$na,$T1a
653 fmadd $T1b,$N1,$nb,$T1b
654 lwz $t3,`$FRAME+32`($sp) ; permuted $t1
655 lwz $t2,`$FRAME+36`($sp) ; permuted $t0
659 fmadd $T2a,$N2,$na,$T2a
660 fmadd $T2b,$N2,$nb,$T2b
662 insrwi $carry,$t5,16,0
663 fmadd $T3a,$N3,$na,$T3a
664 fmadd $T3b,$N3,$nb,$T3b
668 fmadd $T0a,$N0,$na,$T0a
669 fmadd $T0b,$N0,$nb,$T0b
670 insrwi $t4,$t6,16,0 ; 32..63 bits
672 insrwi $carry,$t7,16,0
674 fmadd $T1a,$N0,$nc,$T1a
675 fmadd $T1b,$N0,$nd,$T1b
676 lwz $t7,`$FRAME+40`($sp) ; permuted $t3
677 lwz $t6,`$FRAME+44`($sp) ; permuted $t2
681 fmadd $T2a,$N1,$nc,$T2a
682 fmadd $T2b,$N1,$nd,$T2b
683 stw $t0,12($tp) ; tp[j-1]
686 insrwi $carry,$t3,16,0
687 fmadd $T3a,$N2,$nc,$T3a
688 fmadd $T3b,$N2,$nd,$T3b
689 lwz $t1,`$FRAME+48`($sp) ; permuted $t5
690 lwz $t0,`$FRAME+52`($sp) ; permuted $t4
694 fmadd $dota,$N3,$nc,$dota
695 fmadd $dotb,$N3,$nd,$dotb
696 insrwi $t2,$t6,16,0 ; 64..95 bits
698 insrwi $carry,$t7,16,0
702 lwz $t5,`$FRAME+56`($sp) ; permuted $t7
703 lwz $t4,`$FRAME+60`($sp) ; permuted $t6
710 insrwi $carry,$t1,16,0
718 insrwi $t0,$t4,16,0 ; 96..127 bits
720 insrwi $carry,$t5,16,0
722 stfd $T0a,`$FRAME+0`($sp)
723 stfd $T0b,`$FRAME+8`($sp)
724 stfd $T1a,`$FRAME+16`($sp)
725 stfd $T1b,`$FRAME+24`($sp)
726 stfd $T2a,`$FRAME+32`($sp)
727 stfd $T2b,`$FRAME+40`($sp)
728 stfd $T3a,`$FRAME+48`($sp)
729 stfd $T3b,`$FRAME+56`($sp)
730 stw $t2,20($tp) ; tp[j]
740 if ($SIZE_T==8 or $flavour =~ /osx/) {
742 ld $t0,`$FRAME+0`($sp)
743 ld $t1,`$FRAME+8`($sp)
744 ld $t2,`$FRAME+16`($sp)
745 ld $t3,`$FRAME+24`($sp)
746 ld $t4,`$FRAME+32`($sp)
747 ld $t5,`$FRAME+40`($sp)
748 ld $t6,`$FRAME+48`($sp)
749 ld $t7,`$FRAME+56`($sp)
750 stfd $dota,`$FRAME+64`($sp)
751 stfd $dotb,`$FRAME+72`($sp)
753 add $t0,$t0,$carry ; can not overflow
763 insrdi $t0,$t3,16,0 ; 0..63 bits
773 insrdi $t4,$t7,16,0 ; 64..127 bits
774 srdi $carry,$t7,16 ; upper 33 bits
775 ld $t6,`$FRAME+64`($sp)
776 ld $t7,`$FRAME+72`($sp)
778 std $t0,8($tp) ; tp[j-1]
779 stdu $t4,16($tp) ; tp[j]
781 add $t6,$t6,$carry ; can not overflow
786 std $t6,8($tp) ; tp[num-1]
790 lwz $t1,`$FRAME+0`($sp)
791 lwz $t0,`$FRAME+4`($sp)
792 lwz $t3,`$FRAME+8`($sp)
793 lwz $t2,`$FRAME+12`($sp)
794 lwz $t5,`$FRAME+16`($sp)
795 lwz $t4,`$FRAME+20`($sp)
796 lwz $t7,`$FRAME+24`($sp)
797 lwz $t6,`$FRAME+28`($sp)
798 stfd $dota,`$FRAME+64`($sp)
799 stfd $dotb,`$FRAME+72`($sp)
804 insrwi $carry,$t1,16,0
809 insrwi $t0,$t2,16,0 ; 0..31 bits
810 insrwi $carry,$t3,16,0
815 insrwi $carry,$t5,16,0
820 insrwi $t4,$t6,16,0 ; 32..63 bits
821 insrwi $carry,$t7,16,0
823 stw $t0,12($tp) ; tp[j-1]
826 lwz $t3,`$FRAME+32`($sp) ; permuted $t1
827 lwz $t2,`$FRAME+36`($sp) ; permuted $t0
828 lwz $t7,`$FRAME+40`($sp) ; permuted $t3
829 lwz $t6,`$FRAME+44`($sp) ; permuted $t2
830 lwz $t1,`$FRAME+48`($sp) ; permuted $t5
831 lwz $t0,`$FRAME+52`($sp) ; permuted $t4
832 lwz $t5,`$FRAME+56`($sp) ; permuted $t7
833 lwz $t4,`$FRAME+60`($sp) ; permuted $t6
838 insrwi $carry,$t3,16,0
843 insrwi $t2,$t6,16,0 ; 64..95 bits
844 insrwi $carry,$t7,16,0
849 insrwi $carry,$t1,16,0
854 insrwi $t0,$t4,16,0 ; 96..127 bits
855 insrwi $carry,$t5,16,0
857 stw $t2,20($tp) ; tp[j]
860 lwz $t7,`$FRAME+64`($sp)
861 lwz $t6,`$FRAME+68`($sp)
862 lwz $t5,`$FRAME+72`($sp)
863 lwz $t4,`$FRAME+76`($sp)
868 insrwi $carry,$t7,16,0
877 stw $t6,12($tp) ; tp[num-1]
883 subf $nap_d,$t7,$nap_d ; rewind pointer
888 addi $tp,$sp,`$FRAME+$TRANSFER`
892 $code.=<<___ if ($SIZE_T==8);
893 ldx $t3,$bp,$i ; bp[i]
895 ld $t6,`$FRAME+$TRANSFER+8`($sp) ; tp[0]
896 mulld $t7,$a0,$t3 ; ap[0]*bp[i]
897 add $t7,$t7,$t6 ; ap[0]*bp[i]+tp[0]
898 ; transfer bp[i] to FPU as 4x16-bit values
903 std $t0,`$FRAME+0`($sp)
904 std $t1,`$FRAME+8`($sp)
905 std $t2,`$FRAME+16`($sp)
906 std $t3,`$FRAME+24`($sp)
908 mulld $t7,$t7,$n0 ; tp[0]*n0
909 ; transfer (ap[0]*bp[i]+tp[0])*n0 to FPU as 4x16-bit values
914 std $t4,`$FRAME+32`($sp)
915 std $t5,`$FRAME+40`($sp)
916 std $t6,`$FRAME+48`($sp)
917 std $t7,`$FRAME+56`($sp)
919 $code.=<<___ if ($SIZE_T==4);
922 lwz $t1,0($t0) ; bp[i,i+1]
925 mullw $t4,$a0,$t1 ; ap[0]*bp[i]
926 lwz $t0,`$FRAME+$TRANSFER+8+4`($sp) ; tp[0]
928 lwz $t2,`$FRAME+$TRANSFER+8`($sp) ; tp[0]
933 addc $t4,$t4,$t0 ; ap[0]*bp[i]+tp[0]
935 ; transfer bp[i] to FPU as 4x16-bit values
940 std $t0,`$FRAME+0`($sp) ; yes, std in 32-bit build
941 std $t1,`$FRAME+8`($sp)
942 std $t2,`$FRAME+16`($sp)
943 std $t3,`$FRAME+24`($sp)
945 mullw $t0,$t4,$n0 ; mulld tp[0]*n0
951 ; transfer (ap[0]*bp[i]+tp[0])*n0 to FPU as 4x16-bit values
956 std $t4,`$FRAME+32`($sp) ; yes, std in 32-bit build
957 std $t5,`$FRAME+40`($sp)
958 std $t6,`$FRAME+48`($sp)
959 std $t7,`$FRAME+56`($sp)
962 lfd $A0,8($nap_d) ; load a[j] in double format
964 lfd $A2,24($nap_d) ; load a[j+1] in double format
966 lfd $N0,40($nap_d) ; load n[j] in double format
968 lfd $N2,56($nap_d) ; load n[j+1] in double format
971 lfd $ba,`$FRAME+0`($sp)
972 lfd $bb,`$FRAME+8`($sp)
973 lfd $bc,`$FRAME+16`($sp)
974 lfd $bd,`$FRAME+24`($sp)
975 lfd $na,`$FRAME+32`($sp)
976 lfd $nb,`$FRAME+40`($sp)
977 lfd $nc,`$FRAME+48`($sp)
978 lfd $nd,`$FRAME+56`($sp)
998 fmadd $T1a,$A0,$bc,$T1a
999 fmadd $T1b,$A0,$bd,$T1b
1000 fmadd $T2a,$A1,$bc,$T2a
1001 fmadd $T2b,$A1,$bd,$T2b
1002 fmadd $T3a,$A2,$bc,$T3a
1003 fmadd $T3b,$A2,$bd,$T3b
1007 fmadd $T1a,$N1,$na,$T1a
1008 fmadd $T1b,$N1,$nb,$T1b
1009 lfd $A0,8($nap_d) ; load a[j] in double format
1011 fmadd $T2a,$N2,$na,$T2a
1012 fmadd $T2b,$N2,$nb,$T2b
1013 lfd $A2,24($nap_d) ; load a[j+1] in double format
1015 fmadd $T3a,$N3,$na,$T3a
1016 fmadd $T3b,$N3,$nb,$T3b
1017 fmadd $T0a,$N0,$na,$T0a
1018 fmadd $T0b,$N0,$nb,$T0b
1020 fmadd $T1a,$N0,$nc,$T1a
1021 fmadd $T1b,$N0,$nd,$T1b
1022 fmadd $T2a,$N1,$nc,$T2a
1023 fmadd $T2b,$N1,$nd,$T2b
1024 fmadd $T3a,$N2,$nc,$T3a
1025 fmadd $T3b,$N2,$nd,$T3b
1026 fmadd $dota,$N3,$nc,$dota
1027 fmadd $dotb,$N3,$nd,$dotb
1038 stfd $T0a,`$FRAME+0`($sp)
1039 stfd $T0b,`$FRAME+8`($sp)
1040 stfd $T1a,`$FRAME+16`($sp)
1041 stfd $T1b,`$FRAME+24`($sp)
1042 stfd $T2a,`$FRAME+32`($sp)
1043 stfd $T2b,`$FRAME+40`($sp)
1044 stfd $T3a,`$FRAME+48`($sp)
1045 stfd $T3b,`$FRAME+56`($sp)
1053 lfd $N0,40($nap_d) ; load n[j] in double format
1057 fmadd $T0a,$A0,$ba,$dota
1058 fmadd $T0b,$A0,$bb,$dotb
1059 lfd $N2,56($nap_d) ; load n[j+1] in double format
1062 fmadd $T1a,$A0,$bc,$T1a
1063 fmadd $T1b,$A0,$bd,$T1b
1064 fmadd $T2a,$A1,$bc,$T2a
1065 fmadd $T2b,$A1,$bd,$T2b
1066 lfd $A0,8($nap_d) ; load a[j] in double format
1068 fmadd $T3a,$A2,$bc,$T3a
1069 fmadd $T3b,$A2,$bd,$T3b
1072 lfd $A2,24($nap_d) ; load a[j+1] in double format
1075 if ($SIZE_T==8 or $flavour =~ /osx/) {
1077 fmadd $T1a,$N1,$na,$T1a
1078 fmadd $T1b,$N1,$nb,$T1b
1079 ld $t0,`$FRAME+0`($sp)
1080 ld $t1,`$FRAME+8`($sp)
1081 fmadd $T2a,$N2,$na,$T2a
1082 fmadd $T2b,$N2,$nb,$T2b
1083 ld $t2,`$FRAME+16`($sp)
1084 ld $t3,`$FRAME+24`($sp)
1085 fmadd $T3a,$N3,$na,$T3a
1086 fmadd $T3b,$N3,$nb,$T3b
1087 add $t0,$t0,$carry ; can not overflow
1088 ld $t4,`$FRAME+32`($sp)
1089 ld $t5,`$FRAME+40`($sp)
1090 fmadd $T0a,$N0,$na,$T0a
1091 fmadd $T0b,$N0,$nb,$T0b
1095 ld $t6,`$FRAME+48`($sp)
1096 ld $t7,`$FRAME+56`($sp)
1098 fmadd $T1a,$N0,$nc,$T1a
1099 fmadd $T1b,$N0,$nd,$T1b
1100 insrdi $t0,$t1,16,32
1101 ld $t1,8($tp) ; tp[j]
1102 fmadd $T2a,$N1,$nc,$T2a
1103 fmadd $T2b,$N1,$nd,$T2b
1105 fmadd $T3a,$N2,$nc,$T3a
1106 fmadd $T3b,$N2,$nd,$T3b
1108 insrdi $t0,$t2,16,16
1109 fmadd $dota,$N3,$nc,$dota
1110 fmadd $dotb,$N3,$nd,$dotb
1112 ldu $t2,16($tp) ; tp[j+1]
1114 insrdi $t0,$t3,16,0 ; 0..63 bits
1126 insrdi $t4,$t5,16,32
1131 insrdi $t4,$t6,16,16
1133 stfd $T0a,`$FRAME+0`($sp)
1134 stfd $T0b,`$FRAME+8`($sp)
1138 $code.=<<___ if ($SIZE_T==4); # adjust XER[CA]
1144 stfd $T1a,`$FRAME+16`($sp)
1145 stfd $T1b,`$FRAME+24`($sp)
1146 insrdi $t4,$t7,16,0 ; 64..127 bits
1147 srdi $carry,$t7,16 ; upper 33 bits
1148 stfd $T2a,`$FRAME+32`($sp)
1149 stfd $T2b,`$FRAME+40`($sp)
1152 $code.=<<___ if ($SIZE_T==4); # adjust XER[CA]
1158 stfd $T3a,`$FRAME+48`($sp)
1159 stfd $T3b,`$FRAME+56`($sp)
1161 std $t3,-16($tp) ; tp[j-1]
1162 std $t5,-8($tp) ; tp[j]
1166 fmadd $T1a,$N1,$na,$T1a
1167 fmadd $T1b,$N1,$nb,$T1b
1168 lwz $t1,`$FRAME+0`($sp)
1169 lwz $t0,`$FRAME+4`($sp)
1170 fmadd $T2a,$N2,$na,$T2a
1171 fmadd $T2b,$N2,$nb,$T2b
1172 lwz $t3,`$FRAME+8`($sp)
1173 lwz $t2,`$FRAME+12`($sp)
1174 fmadd $T3a,$N3,$na,$T3a
1175 fmadd $T3b,$N3,$nb,$T3b
1176 lwz $t5,`$FRAME+16`($sp)
1177 lwz $t4,`$FRAME+20`($sp)
1181 fmadd $T0a,$N0,$na,$T0a
1182 fmadd $T0b,$N0,$nb,$T0b
1183 lwz $t7,`$FRAME+24`($sp)
1184 lwz $t6,`$FRAME+28`($sp)
1186 insrwi $carry,$t1,16,0
1188 fmadd $T1a,$N0,$nc,$T1a
1189 fmadd $T1b,$N0,$nd,$T1b
1193 fmadd $T2a,$N1,$nc,$T2a
1194 fmadd $T2b,$N1,$nd,$T2b
1195 insrwi $t0,$t2,16,0 ; 0..31 bits
1197 insrwi $carry,$t3,16,0
1198 fmadd $T3a,$N2,$nc,$T3a
1199 fmadd $T3b,$N2,$nd,$T3b
1200 lwz $t2,12($tp) ; tp[j]
1205 fmadd $dota,$N3,$nc,$dota
1206 fmadd $dotb,$N3,$nd,$dotb
1208 insrwi $carry,$t5,16,0
1215 insrwi $t4,$t6,16,0 ; 32..63 bits
1217 insrwi $carry,$t7,16,0
1221 lwz $t3,`$FRAME+32`($sp) ; permuted $t1
1222 lwz $t2,`$FRAME+36`($sp) ; permuted $t0
1226 stw $t0,4($tp) ; tp[j-1]
1232 lwz $t7,`$FRAME+40`($sp) ; permuted $t3
1233 lwz $t6,`$FRAME+44`($sp) ; permuted $t2
1236 insrwi $carry,$t3,16,0
1237 lwz $t1,`$FRAME+48`($sp) ; permuted $t5
1238 lwz $t0,`$FRAME+52`($sp) ; permuted $t4
1243 lwz $t5,`$FRAME+56`($sp) ; permuted $t7
1244 lwz $t4,`$FRAME+60`($sp) ; permuted $t6
1247 insrwi $t2,$t6,16,0 ; 64..95 bits
1248 insrwi $carry,$t7,16,0
1253 stfd $T0a,`$FRAME+0`($sp)
1256 stfd $T0b,`$FRAME+8`($sp)
1257 insrwi $carry,$t1,16,0
1260 stfd $T1a,`$FRAME+16`($sp)
1263 insrwi $t0,$t4,16,0 ; 96..127 bits
1264 stfd $T1b,`$FRAME+24`($sp)
1265 insrwi $carry,$t5,16,0
1269 stfd $T2a,`$FRAME+32`($sp)
1271 stfd $T2b,`$FRAME+40`($sp)
1273 stfd $T3a,`$FRAME+48`($sp)
1275 stfd $T3b,`$FRAME+56`($sp)
1276 stw $t2,-4($tp) ; tp[j]
1286 if ($SIZE_T==8 or $flavour =~ /osx/) {
1288 ld $t0,`$FRAME+0`($sp)
1289 ld $t1,`$FRAME+8`($sp)
1290 ld $t2,`$FRAME+16`($sp)
1291 ld $t3,`$FRAME+24`($sp)
1292 ld $t4,`$FRAME+32`($sp)
1293 ld $t5,`$FRAME+40`($sp)
1294 ld $t6,`$FRAME+48`($sp)
1295 ld $t7,`$FRAME+56`($sp)
1296 stfd $dota,`$FRAME+64`($sp)
1297 stfd $dotb,`$FRAME+72`($sp)
1299 add $t0,$t0,$carry ; can not overflow
1303 insrdi $t0,$t1,16,32
1305 ld $t1,8($tp) ; tp[j]
1307 insrdi $t0,$t2,16,16
1309 ldu $t2,16($tp) ; tp[j+1]
1311 insrdi $t0,$t3,16,0 ; 0..63 bits
1316 insrdi $t4,$t5,16,32
1319 insrdi $t4,$t6,16,16
1321 insrdi $t4,$t7,16,0 ; 64..127 bits
1322 srdi $carry,$t7,16 ; upper 33 bits
1323 ld $t6,`$FRAME+64`($sp)
1324 ld $t7,`$FRAME+72`($sp)
1328 $code.=<<___ if ($SIZE_T==4); # adjust XER[CA]
1336 $code.=<<___ if ($SIZE_T==4); # adjust XER[CA]
1344 std $t3,-16($tp) ; tp[j-1]
1345 std $t5,-8($tp) ; tp[j]
1347 add $carry,$carry,$ovf ; comsume upmost overflow
1348 add $t6,$t6,$carry ; can not overflow
1353 std $t6,0($tp) ; tp[num-1]
1357 lwz $t1,`$FRAME+0`($sp)
1358 lwz $t0,`$FRAME+4`($sp)
1359 lwz $t3,`$FRAME+8`($sp)
1360 lwz $t2,`$FRAME+12`($sp)
1361 lwz $t5,`$FRAME+16`($sp)
1362 lwz $t4,`$FRAME+20`($sp)
1363 lwz $t7,`$FRAME+24`($sp)
1364 lwz $t6,`$FRAME+28`($sp)
1365 stfd $dota,`$FRAME+64`($sp)
1366 stfd $dotb,`$FRAME+72`($sp)
1371 insrwi $carry,$t1,16,0
1376 insrwi $t0,$t2,16,0 ; 0..31 bits
1377 lwz $t2,12($tp) ; tp[j]
1378 insrwi $carry,$t3,16,0
1384 insrwi $carry,$t5,16,0
1389 insrwi $t4,$t6,16,0 ; 32..63 bits
1390 insrwi $carry,$t7,16,0
1397 stw $t0,4($tp) ; tp[j-1]
1400 lwz $t3,`$FRAME+32`($sp) ; permuted $t1
1401 lwz $t2,`$FRAME+36`($sp) ; permuted $t0
1402 lwz $t7,`$FRAME+40`($sp) ; permuted $t3
1403 lwz $t6,`$FRAME+44`($sp) ; permuted $t2
1404 lwz $t1,`$FRAME+48`($sp) ; permuted $t5
1405 lwz $t0,`$FRAME+52`($sp) ; permuted $t4
1406 lwz $t5,`$FRAME+56`($sp) ; permuted $t7
1407 lwz $t4,`$FRAME+60`($sp) ; permuted $t6
1412 insrwi $carry,$t3,16,0
1417 insrwi $t2,$t6,16,0 ; 64..95 bits
1419 insrwi $carry,$t7,16,0
1425 insrwi $carry,$t1,16,0
1430 insrwi $t0,$t4,16,0 ; 96..127 bits
1431 insrwi $carry,$t5,16,0
1436 lwz $t7,`$FRAME+64`($sp)
1437 lwz $t6,`$FRAME+68`($sp)
1440 lwz $t5,`$FRAME+72`($sp)
1441 lwz $t4,`$FRAME+76`($sp)
1445 stw $t2,-4($tp) ; tp[j]
1450 insrwi $carry,$t7,16,0
1459 stw $t6,4($tp) ; tp[num-1]
1466 subf $nap_d,$t7,$nap_d ; rewind pointer
1471 $code.=<<___ if ($SIZE_T==8);
1472 subf $np,$num,$np ; rewind np
1473 addi $j,$j,1 ; restore counter
1474 subfc $i,$i,$i ; j=0 and "clear" XER[CA]
1475 addi $tp,$sp,`$FRAME+$TRANSFER+8`
1476 addi $t4,$sp,`$FRAME+$TRANSFER+16`
1482 Lsub: ldx $t0,$tp,$i
1486 subfe $t0,$t1,$t0 ; tp[j]-np[j]
1487 subfe $t2,$t3,$t2 ; tp[j+1]-np[j+1]
1494 subfe $ovf,$i,$ovf ; handle upmost overflow bit
1497 or $ap,$ap,$np ; ap=borrow?tp:rp
1502 Lcopy: ; copy or in-place refresh
1505 std $i,8($nap_d) ; zap nap_d
1515 stdx $i,$tp,$i ; zap tp at once
1520 $code.=<<___ if ($SIZE_T==4);
1521 subf $np,$num,$np ; rewind np
1522 addi $j,$j,1 ; restore counter
1523 subfc $i,$i,$i ; j=0 and "clear" XER[CA]
1524 addi $tp,$sp,`$FRAME+$TRANSFER`
1527 addi $ap,$sp,`$FRAME+$TRANSFER+4`
1531 Lsub: lwz $t0,12($tp) ; load tp[j..j+3] in 64-bit word order
1535 lwz $t4,4($np) ; load np[j..j+3] in 32-bit word order
1539 subfe $t4,$t4,$t0 ; tp[j]-np[j]
1540 stw $t0,4($ap) ; save tp[j..j+3] in 32-bit word order
1541 subfe $t5,$t5,$t1 ; tp[j+1]-np[j+1]
1543 subfe $t6,$t6,$t2 ; tp[j+2]-np[j+2]
1545 subfe $t7,$t7,$t3 ; tp[j+3]-np[j+3]
1554 subfe $ovf,$i,$ovf ; handle upmost overflow bit
1555 addi $tp,$sp,`$FRAME+$TRANSFER+4`
1556 subf $rp,$num,$rp ; rewind rp
1559 or $ap,$ap,$np ; ap=borrow?tp:rp
1560 addi $tp,$sp,`$FRAME+$TRANSFER`
1564 Lcopy: ; copy or in-place refresh
1569 std $i,8($nap_d) ; zap nap_d
1581 std $i,8($tp) ; zap tp at once
1588 li r3,1 ; signal "handled"
1589 $POP r19,`-12*8-13*$SIZE_T`($i)
1590 $POP r20,`-12*8-12*$SIZE_T`($i)
1591 $POP r21,`-12*8-11*$SIZE_T`($i)
1592 $POP r22,`-12*8-10*$SIZE_T`($i)
1593 $POP r23,`-12*8-9*$SIZE_T`($i)
1594 $POP r24,`-12*8-8*$SIZE_T`($i)
1595 $POP r25,`-12*8-7*$SIZE_T`($i)
1596 $POP r26,`-12*8-6*$SIZE_T`($i)
1597 $POP r27,`-12*8-5*$SIZE_T`($i)
1598 $POP r28,`-12*8-4*$SIZE_T`($i)
1599 $POP r29,`-12*8-3*$SIZE_T`($i)
1600 $POP r30,`-12*8-2*$SIZE_T`($i)
1601 $POP r31,`-12*8-1*$SIZE_T`($i)
1617 .byte 0,12,4,0,0x8c,13,6,0
1619 .size .$fname,.-.$fname
1621 .asciz "Montgomery Multiplication for PPC64, CRYPTOGAMS by <appro\@openssl.org>"
1624 $code =~ s/\`([^\`]*)\`/eval $1/gem;