2 # Copyright 2014-2016 The OpenSSL Project Authors. All Rights Reserved.
4 # Licensed under the OpenSSL license (the "License"). You may not use
5 # this file except in compliance with the License. You can obtain a copy
6 # in the file LICENSE in the source distribution or at
7 # https://www.openssl.org/source/license.html
10 # ====================================================================
11 # Written by Andy Polyakov <appro@openssl.org> for the OpenSSL
12 # project. The module is, however, dual licensed under OpenSSL and
13 # CRYPTOGAMS licenses depending on where you obtain it. For further
14 # details see http://www.openssl.org/~appro/cryptogams/.
15 # ====================================================================
17 # This module implements support for ARMv8 AES instructions. The
18 # module is endian-agnostic in sense that it supports both big- and
19 # little-endian cases. As does it support both 32- and 64-bit modes
20 # of operation. Latter is achieved by limiting amount of utilized
21 # registers to 16, which implies additional NEON load and integer
22 # instructions. This has no effect on mighty Apple A7, where results
23 # are literally equal to the theoretical estimates based on AES
24 # instruction latencies and issue rates. On Cortex-A53, an in-order
25 # execution core, this costs up to 10-15%, which is partially
26 # compensated by implementing dedicated code path for 128-bit
27 # CBC encrypt case. On Cortex-A57 parallelizable mode performance
28 # seems to be limited by sheer amount of NEON instructions...
30 # Performance in cycles per byte processed with 128-bit key:
33 # Apple A7 2.39 1.20 1.20
34 # Cortex-A53 1.32 1.29 1.46
35 # Cortex-A57(*) 1.95 0.85 0.93
36 # Denver 1.96 0.86 0.80
37 # Mongoose 1.33 1.20 1.20
40 # (*) original 3.64/1.34/1.32 results were for r0p0 revision
41 # and are still same even for updated module;
46 $0 =~ m/(.*[\/\\])[^\/\\]+$/; $dir=$1;
47 ( $xlate="${dir}arm-xlate.pl" and -f $xlate ) or
48 ( $xlate="${dir}../../perlasm/arm-xlate.pl" and -f $xlate) or
49 die "can't locate arm-xlate.pl";
51 open OUT,"| \"$^X\" $xlate $flavour $output";
59 #if __ARM_MAX_ARCH__>=7
62 $code.=".arch armv8-a+crypto\n" if ($flavour =~ /64/);
63 $code.=<<___ if ($flavour !~ /64/);
64 .arch armv7-a // don't confuse not-so-latest binutils with argv8 :-)
70 # Assembler mnemonics are an eclectic mix of 32- and 64-bit syntax,
71 # NEON is mostly 32-bit mnemonics, integer - mostly 64. Goal is to
72 # maintain both 32- and 64-bit codes within single module and
73 # transliterate common code to either flavour with regex vodoo.
76 my ($inp,$bits,$out,$ptr,$rounds)=("x0","w1","x2","x3","w12");
77 my ($zero,$rcon,$mask,$in0,$in1,$tmp,$key)=
78 $flavour=~/64/? map("q$_",(0..6)) : map("q$_",(0..3,8..10));
84 .long 0x01,0x01,0x01,0x01
85 .long 0x0c0f0e0d,0x0c0f0e0d,0x0c0f0e0d,0x0c0f0e0d // rotate-n-splat
86 .long 0x1b,0x1b,0x1b,0x1b
88 .globl ${prefix}_set_encrypt_key
89 .type ${prefix}_set_encrypt_key,%function
91 ${prefix}_set_encrypt_key:
94 $code.=<<___ if ($flavour =~ /64/);
95 stp x29,x30,[sp,#-16]!
115 veor $zero,$zero,$zero
116 vld1.8 {$in0},[$inp],#16
117 mov $bits,#8 // reuse $bits
118 vld1.32 {$rcon,$mask},[$ptr],#32
126 vtbl.8 $key,{$in0},$mask
127 vext.8 $tmp,$zero,$in0,#12
128 vst1.32 {$in0},[$out],#16
133 vext.8 $tmp,$zero,$tmp,#12
135 vext.8 $tmp,$zero,$tmp,#12
138 vshl.u8 $rcon,$rcon,#1
142 vld1.32 {$rcon},[$ptr]
144 vtbl.8 $key,{$in0},$mask
145 vext.8 $tmp,$zero,$in0,#12
146 vst1.32 {$in0},[$out],#16
150 vext.8 $tmp,$zero,$tmp,#12
152 vext.8 $tmp,$zero,$tmp,#12
155 vshl.u8 $rcon,$rcon,#1
158 vtbl.8 $key,{$in0},$mask
159 vext.8 $tmp,$zero,$in0,#12
160 vst1.32 {$in0},[$out],#16
164 vext.8 $tmp,$zero,$tmp,#12
166 vext.8 $tmp,$zero,$tmp,#12
170 vst1.32 {$in0},[$out]
178 vld1.8 {$in1},[$inp],#8
179 vmov.i8 $key,#8 // borrow $key
180 vst1.32 {$in0},[$out],#16
181 vsub.i8 $mask,$mask,$key // adjust the mask
184 vtbl.8 $key,{$in1},$mask
185 vext.8 $tmp,$zero,$in0,#12
186 vst1.32 {$in1},[$out],#8
191 vext.8 $tmp,$zero,$tmp,#12
193 vext.8 $tmp,$zero,$tmp,#12
196 vdup.32 $tmp,${in0}[3]
199 vext.8 $in1,$zero,$in1,#12
200 vshl.u8 $rcon,$rcon,#1
204 vst1.32 {$in0},[$out],#16
216 vst1.32 {$in0},[$out],#16
219 vtbl.8 $key,{$in1},$mask
220 vext.8 $tmp,$zero,$in0,#12
221 vst1.32 {$in1},[$out],#16
226 vext.8 $tmp,$zero,$tmp,#12
228 vext.8 $tmp,$zero,$tmp,#12
231 vshl.u8 $rcon,$rcon,#1
233 vst1.32 {$in0},[$out],#16
236 vdup.32 $key,${in0}[3] // just splat
237 vext.8 $tmp,$zero,$in1,#12
241 vext.8 $tmp,$zero,$tmp,#12
243 vext.8 $tmp,$zero,$tmp,#12
254 mov x0,$ptr // return value
255 `"ldr x29,[sp],#16" if ($flavour =~ /64/)`
257 .size ${prefix}_set_encrypt_key,.-${prefix}_set_encrypt_key
259 .globl ${prefix}_set_decrypt_key
260 .type ${prefix}_set_decrypt_key,%function
262 ${prefix}_set_decrypt_key:
264 $code.=<<___ if ($flavour =~ /64/);
265 stp x29,x30,[sp,#-16]!
268 $code.=<<___ if ($flavour !~ /64/);
277 sub $out,$out,#240 // restore original $out
279 add $inp,$out,x12,lsl#4 // end of key schedule
281 vld1.32 {v0.16b},[$out]
282 vld1.32 {v1.16b},[$inp]
283 vst1.32 {v0.16b},[$inp],x4
284 vst1.32 {v1.16b},[$out],#16
287 vld1.32 {v0.16b},[$out]
288 vld1.32 {v1.16b},[$inp]
291 vst1.32 {v0.16b},[$inp],x4
292 vst1.32 {v1.16b},[$out],#16
296 vld1.32 {v0.16b},[$out]
298 vst1.32 {v0.16b},[$inp]
300 eor x0,x0,x0 // return value
303 $code.=<<___ if ($flavour !~ /64/);
306 $code.=<<___ if ($flavour =~ /64/);
311 .size ${prefix}_set_decrypt_key,.-${prefix}_set_decrypt_key
317 my ($e,$mc) = $dir eq "en" ? ("e","mc") : ("d","imc");
318 my ($inp,$out,$key)=map("x$_",(0..2));
320 my ($rndkey0,$rndkey1,$inout)=map("q$_",(0..3));
323 .globl ${prefix}_${dir}crypt
324 .type ${prefix}_${dir}crypt,%function
326 ${prefix}_${dir}crypt:
327 ldr $rounds,[$key,#240]
328 vld1.32 {$rndkey0},[$key],#16
329 vld1.8 {$inout},[$inp]
330 sub $rounds,$rounds,#2
331 vld1.32 {$rndkey1},[$key],#16
334 aes$e $inout,$rndkey0
336 vld1.32 {$rndkey0},[$key],#16
337 subs $rounds,$rounds,#2
338 aes$e $inout,$rndkey1
340 vld1.32 {$rndkey1},[$key],#16
343 aes$e $inout,$rndkey0
345 vld1.32 {$rndkey0},[$key]
346 aes$e $inout,$rndkey1
347 veor $inout,$inout,$rndkey0
349 vst1.8 {$inout},[$out]
351 .size ${prefix}_${dir}crypt,.-${prefix}_${dir}crypt
358 my ($inp,$out,$len,$key,$ivp)=map("x$_",(0..4)); my $enc="w5";
359 my ($rounds,$cnt,$key_,$step,$step1)=($enc,"w6","x7","x8","x12");
360 my ($dat0,$dat1,$in0,$in1,$tmp0,$tmp1,$ivec,$rndlast)=map("q$_",(0..7));
362 my ($dat,$tmp,$rndzero_n_last)=($dat0,$tmp0,$tmp1);
363 my ($key4,$key5,$key6,$key7)=("x6","x12","x14",$key);
365 ### q8-q15 preloaded key schedule
368 .globl ${prefix}_cbc_encrypt
369 .type ${prefix}_cbc_encrypt,%function
371 ${prefix}_cbc_encrypt:
373 $code.=<<___ if ($flavour =~ /64/);
374 stp x29,x30,[sp,#-16]!
377 $code.=<<___ if ($flavour !~ /64/);
380 vstmdb sp!,{d8-d15} @ ABI specification says so
381 ldmia ip,{r4-r5} @ load remaining args
389 cmp $enc,#0 // en- or decrypting?
390 ldr $rounds,[$key,#240]
392 vld1.8 {$ivec},[$ivp]
393 vld1.8 {$dat},[$inp],$step
395 vld1.32 {q8-q9},[$key] // load key schedule...
396 sub $rounds,$rounds,#6
397 add $key_,$key,x5,lsl#4 // pointer to last 7 round keys
398 sub $rounds,$rounds,#2
399 vld1.32 {q10-q11},[$key_],#32
400 vld1.32 {q12-q13},[$key_],#32
401 vld1.32 {q14-q15},[$key_],#32
402 vld1.32 {$rndlast},[$key_]
410 veor $rndzero_n_last,q8,$rndlast
413 vld1.32 {$in0-$in1},[$key_]
427 vst1.8 {$ivec},[$out],#16
459 vld1.8 {q8},[$inp],$step
462 veor q8,q8,$rndzero_n_last
465 vld1.32 {q9},[$key_] // re-pre-load rndkey[1]
469 veor $ivec,$dat,$rndlast
472 vst1.8 {$ivec},[$out],#16
477 vld1.32 {$in0-$in1},[$key_]
484 vst1.8 {$ivec},[$out],#16
498 vld1.8 {q8},[$inp],$step
505 veor q8,q8,$rndzero_n_last
507 veor $ivec,$dat,$rndlast
508 b.hs .Loop_cbc_enc128
510 vst1.8 {$ivec},[$out],#16
514 my ($dat2,$in2,$tmp2)=map("q$_",(10,11,9));
518 vld1.8 {$dat2},[$inp],#16
519 subs $len,$len,#32 // bias
523 vorr $in2,$dat2,$dat2
526 vorr $dat1,$dat2,$dat2
527 vld1.8 {$dat2},[$inp],#16
529 vorr $in1,$dat1,$dat1
530 vorr $in2,$dat2,$dat2
539 vld1.32 {q8},[$key_],#16
547 vld1.32 {q9},[$key_],#16
556 veor $tmp0,$ivec,$rndlast
558 veor $tmp1,$in0,$rndlast
559 mov.lo x6,$len // x6, $cnt, is zero at this point
566 veor $tmp2,$in1,$rndlast
567 add $inp,$inp,x6 // $inp is adjusted in such way that
568 // at exit from the loop $dat1-$dat2
569 // are loaded with last "words"
578 vld1.8 {$in0},[$inp],#16
585 vld1.8 {$in1},[$inp],#16
592 vld1.8 {$in2},[$inp],#16
596 vld1.32 {q8},[$key_],#16 // re-pre-load rndkey[0]
598 veor $tmp0,$tmp0,$dat0
599 veor $tmp1,$tmp1,$dat1
600 veor $dat2,$dat2,$tmp2
601 vld1.32 {q9},[$key_],#16 // re-pre-load rndkey[1]
602 vst1.8 {$tmp0},[$out],#16
604 vst1.8 {$tmp1},[$out],#16
606 vst1.8 {$dat2},[$out],#16
619 vld1.32 {q8},[$key_],#16
625 vld1.32 {q9},[$key_],#16
645 veor $tmp1,$ivec,$rndlast
650 veor $tmp2,$in1,$rndlast
654 veor $tmp1,$tmp1,$dat1
655 veor $tmp2,$tmp2,$dat2
657 vst1.8 {$tmp1},[$out],#16
658 vst1.8 {$tmp2},[$out],#16
662 veor $tmp1,$tmp1,$dat2
664 vst1.8 {$tmp1},[$out],#16
667 vst1.8 {$ivec},[$ivp]
671 $code.=<<___ if ($flavour !~ /64/);
675 $code.=<<___ if ($flavour =~ /64/);
680 .size ${prefix}_cbc_encrypt,.-${prefix}_cbc_encrypt
684 my ($inp,$out,$len,$key,$ivp)=map("x$_",(0..4));
685 my ($rounds,$cnt,$key_)=("w5","w6","x7");
686 my ($ctr,$tctr0,$tctr1,$tctr2)=map("w$_",(8..10,12));
687 my $step="x12"; # aliases with $tctr2
689 my ($dat0,$dat1,$in0,$in1,$tmp0,$tmp1,$ivec,$rndlast)=map("q$_",(0..7));
690 my ($dat2,$in2,$tmp2)=map("q$_",(10,11,9));
692 my ($dat,$tmp)=($dat0,$tmp0);
694 ### q8-q15 preloaded key schedule
697 .globl ${prefix}_ctr32_encrypt_blocks
698 .type ${prefix}_ctr32_encrypt_blocks,%function
700 ${prefix}_ctr32_encrypt_blocks:
702 $code.=<<___ if ($flavour =~ /64/);
703 stp x29,x30,[sp,#-16]!
706 $code.=<<___ if ($flavour !~ /64/);
708 stmdb sp!,{r4-r10,lr}
709 vstmdb sp!,{d8-d15} @ ABI specification says so
710 ldr r4, [ip] @ load remaining arg
713 ldr $rounds,[$key,#240]
715 ldr $ctr, [$ivp, #12]
716 vld1.32 {$dat0},[$ivp]
718 vld1.32 {q8-q9},[$key] // load key schedule...
719 sub $rounds,$rounds,#4
722 add $key_,$key,x5,lsl#4 // pointer to last 5 round keys
723 sub $rounds,$rounds,#2
724 vld1.32 {q12-q13},[$key_],#32
725 vld1.32 {q14-q15},[$key_],#32
726 vld1.32 {$rndlast},[$key_]
733 vorr $dat1,$dat0,$dat0
735 vorr $dat2,$dat0,$dat0
737 vorr $ivec,$dat0,$dat0
739 vmov.32 ${dat1}[3],$tctr1
742 sub $len,$len,#3 // bias
743 vmov.32 ${dat2}[3],$tctr2
754 vld1.32 {q8},[$key_],#16
762 vld1.32 {q9},[$key_],#16
769 vld1.8 {$in0},[$inp],#16
770 vorr $dat0,$ivec,$ivec
773 vld1.8 {$in1},[$inp],#16
774 vorr $dat1,$ivec,$ivec
779 vld1.8 {$in2},[$inp],#16
783 vorr $dat2,$ivec,$ivec
789 veor $in0,$in0,$rndlast
793 veor $in1,$in1,$rndlast
799 veor $in2,$in2,$rndlast
803 vmov.32 ${dat0}[3], $tctr0
809 vmov.32 ${dat1}[3], $tctr1
813 vmov.32 ${dat2}[3], $tctr2
820 vld1.32 {q8},[$key_],#16 // re-pre-load rndkey[0]
821 vst1.8 {$in0},[$out],#16
824 vst1.8 {$in1},[$out],#16
826 vld1.32 {q9},[$key_],#16 // re-pre-load rndkey[1]
827 vst1.8 {$in2},[$out],#16
841 vld1.32 {q8},[$key_],#16
847 vld1.32 {q9},[$key_],#16
858 vld1.8 {$in0},[$inp],$step
868 veor $in0,$in0,$rndlast
873 veor $in1,$in1,$rndlast
880 vst1.8 {$in0},[$out],#16
886 $code.=<<___ if ($flavour !~ /64/);
888 ldmia sp!,{r4-r10,pc}
890 $code.=<<___ if ($flavour =~ /64/);
895 .size ${prefix}_ctr32_encrypt_blocks,.-${prefix}_ctr32_encrypt_blocks
901 ########################################
902 if ($flavour =~ /64/) { ######## 64-bit code
904 "aesd" => 0x4e285800, "aese" => 0x4e284800,
905 "aesimc"=> 0x4e287800, "aesmc" => 0x4e286800 );
908 my ($mnemonic,$arg)=@_;
910 $arg =~ m/[qv]([0-9]+)[^,]*,\s*[qv]([0-9]+)/o &&
911 sprintf ".inst\t0x%08x\t//%s %s",
912 $opcode{$mnemonic}|$1|($2<<5),
916 foreach(split("\n",$code)) {
917 s/\`([^\`]*)\`/eval($1)/geo;
919 s/\bq([0-9]+)\b/"v".($1<8?$1:$1+8).".16b"/geo; # old->new registers
920 s/@\s/\/\//o; # old->new style commentary
922 #s/[v]?(aes\w+)\s+([qv].*)/unaes($1,$2)/geo or
923 s/cclr\s+([wx])([^,]+),\s*([a-z]+)/csel $1$2,$1zr,$1$2,$3/o or
924 s/mov\.([a-z]+)\s+([wx][0-9]+),\s*([wx][0-9]+)/csel $2,$3,$2,$1/o or
925 s/vmov\.i8/movi/o or # fix up legacy mnemonics
927 s/vrev32\.8/rev32/o or
930 s/^(\s+)v/$1/o or # strip off v prefix
933 # fix up remaining legacy suffixes
935 m/\],#8/o and s/\.16b/\.8b/go;
936 s/\.[ui]?32//o and s/\.16b/\.4s/go;
937 s/\.[ui]?64//o and s/\.16b/\.2d/go;
938 s/\.[42]([sd])\[([0-3])\]/\.$1\[$2\]/o;
942 } else { ######## 32-bit code
944 "aesd" => 0xf3b00340, "aese" => 0xf3b00300,
945 "aesimc"=> 0xf3b003c0, "aesmc" => 0xf3b00380 );
948 my ($mnemonic,$arg)=@_;
950 if ($arg =~ m/[qv]([0-9]+)[^,]*,\s*[qv]([0-9]+)/o) {
951 my $word = $opcode{$mnemonic}|(($1&7)<<13)|(($1&8)<<19)
952 |(($2&7)<<1) |(($2&8)<<2);
953 # since ARMv7 instructions are always encoded little-endian.
954 # correct solution is to use .inst directive, but older
955 # assemblers don't implement it:-(
956 sprintf ".byte\t0x%02x,0x%02x,0x%02x,0x%02x\t@ %s %s",
957 $word&0xff,($word>>8)&0xff,
958 ($word>>16)&0xff,($word>>24)&0xff,
966 $arg =~ m/q([0-9]+),\s*\{q([0-9]+)\},\s*q([0-9]+)/o &&
967 sprintf "vtbl.8 d%d,{q%d},d%d\n\t".
968 "vtbl.8 d%d,{q%d},d%d", 2*$1,$2,2*$3, 2*$1+1,$2,2*$3+1;
974 $arg =~ m/q([0-9]+),\s*q([0-9]+)\[([0-3])\]/o &&
975 sprintf "vdup.32 q%d,d%d[%d]",$1,2*$2+($3>>1),$3&1;
981 $arg =~ m/q([0-9]+)\[([0-3])\],(.*)/o &&
982 sprintf "vmov.32 d%d[%d],%s",2*$1+($2>>1),$2&1,$3;
985 foreach(split("\n",$code)) {
986 s/\`([^\`]*)\`/eval($1)/geo;
988 s/\b[wx]([0-9]+)\b/r$1/go; # new->old registers
989 s/\bv([0-9])\.[12468]+[bsd]\b/q$1/go; # new->old registers
990 s/\/\/\s?/@ /o; # new->old style commentary
992 # fix up remaining new-style suffixes
993 s/\{q([0-9]+)\},\s*\[(.+)\],#8/sprintf "{d%d},[$2]!",2*$1/eo or
996 s/[v]?(aes\w+)\s+([qv].*)/unaes($1,$2)/geo or
997 s/cclr\s+([^,]+),\s*([a-z]+)/mov$2 $1,#0/o or
998 s/vtbl\.8\s+(.*)/unvtbl($1)/geo or
999 s/vdup\.32\s+(.*)/unvdup32($1)/geo or
1000 s/vmov\.32\s+(.*)/unvmov32($1)/geo or
1001 s/^(\s+)b\./$1b/o or
1002 s/^(\s+)mov\./$1mov/o or
1003 s/^(\s+)ret/$1bx\tlr/o;