2 # Copyright 2014-2016 The OpenSSL Project Authors. All Rights Reserved.
4 # Licensed under the OpenSSL license (the "License"). You may not use
5 # this file except in compliance with the License. You can obtain a copy
6 # in the file LICENSE in the source distribution or at
7 # https://www.openssl.org/source/license.html
10 # ====================================================================
11 # Written by Andy Polyakov <appro@openssl.org> for the OpenSSL
12 # project. The module is, however, dual licensed under OpenSSL and
13 # CRYPTOGAMS licenses depending on where you obtain it. For further
14 # details see http://www.openssl.org/~appro/cryptogams/.
15 # ====================================================================
17 # This module implements support for ARMv8 AES instructions. The
18 # module is endian-agnostic in sense that it supports both big- and
19 # little-endian cases. As does it support both 32- and 64-bit modes
20 # of operation. Latter is achieved by limiting amount of utilized
21 # registers to 16, which implies additional NEON load and integer
22 # instructions. This has no effect on mighty Apple A7, where results
23 # are literally equal to the theoretical estimates based on AES
24 # instruction latencies and issue rates. On Cortex-A53, an in-order
25 # execution core, this costs up to 10-15%, which is partially
26 # compensated by implementing dedicated code path for 128-bit
27 # CBC encrypt case. On Cortex-A57 parallelizable mode performance
28 # seems to be limited by sheer amount of NEON instructions...
30 # Performance in cycles per byte processed with 128-bit key:
33 # Apple A7 2.39 1.20 1.20
34 # Cortex-A53 1.32 1.29 1.46
35 # Cortex-A57(*) 1.95 0.85 0.93
36 # Denver 1.96 0.86 0.80
37 # Mongoose 1.33 1.20 1.20
39 # (*) original 3.64/1.34/1.32 results were for r0p0 revision
40 # and are still same even for updated module;
45 $0 =~ m/(.*[\/\\])[^\/\\]+$/; $dir=$1;
46 ( $xlate="${dir}arm-xlate.pl" and -f $xlate ) or
47 ( $xlate="${dir}../../perlasm/arm-xlate.pl" and -f $xlate) or
48 die "can't locate arm-xlate.pl";
50 open OUT,"| \"$^X\" $xlate $flavour $output";
58 #if __ARM_MAX_ARCH__>=7
61 $code.=".arch armv8-a+crypto\n" if ($flavour =~ /64/);
62 $code.=<<___ if ($flavour !~ /64/);
63 .arch armv7-a // don't confuse not-so-latest binutils with argv8 :-)
69 # Assembler mnemonics are an eclectic mix of 32- and 64-bit syntax,
70 # NEON is mostly 32-bit mnemonics, integer - mostly 64. Goal is to
71 # maintain both 32- and 64-bit codes within single module and
72 # transliterate common code to either flavour with regex vodoo.
75 my ($inp,$bits,$out,$ptr,$rounds)=("x0","w1","x2","x3","w12");
76 my ($zero,$rcon,$mask,$in0,$in1,$tmp,$key)=
77 $flavour=~/64/? map("q$_",(0..6)) : map("q$_",(0..3,8..10));
83 .long 0x01,0x01,0x01,0x01
84 .long 0x0c0f0e0d,0x0c0f0e0d,0x0c0f0e0d,0x0c0f0e0d // rotate-n-splat
85 .long 0x1b,0x1b,0x1b,0x1b
87 .globl ${prefix}_set_encrypt_key
88 .type ${prefix}_set_encrypt_key,%function
90 ${prefix}_set_encrypt_key:
93 $code.=<<___ if ($flavour =~ /64/);
94 stp x29,x30,[sp,#-16]!
114 veor $zero,$zero,$zero
115 vld1.8 {$in0},[$inp],#16
116 mov $bits,#8 // reuse $bits
117 vld1.32 {$rcon,$mask},[$ptr],#32
125 vtbl.8 $key,{$in0},$mask
126 vext.8 $tmp,$zero,$in0,#12
127 vst1.32 {$in0},[$out],#16
132 vext.8 $tmp,$zero,$tmp,#12
134 vext.8 $tmp,$zero,$tmp,#12
137 vshl.u8 $rcon,$rcon,#1
141 vld1.32 {$rcon},[$ptr]
143 vtbl.8 $key,{$in0},$mask
144 vext.8 $tmp,$zero,$in0,#12
145 vst1.32 {$in0},[$out],#16
149 vext.8 $tmp,$zero,$tmp,#12
151 vext.8 $tmp,$zero,$tmp,#12
154 vshl.u8 $rcon,$rcon,#1
157 vtbl.8 $key,{$in0},$mask
158 vext.8 $tmp,$zero,$in0,#12
159 vst1.32 {$in0},[$out],#16
163 vext.8 $tmp,$zero,$tmp,#12
165 vext.8 $tmp,$zero,$tmp,#12
169 vst1.32 {$in0},[$out]
177 vld1.8 {$in1},[$inp],#8
178 vmov.i8 $key,#8 // borrow $key
179 vst1.32 {$in0},[$out],#16
180 vsub.i8 $mask,$mask,$key // adjust the mask
183 vtbl.8 $key,{$in1},$mask
184 vext.8 $tmp,$zero,$in0,#12
185 vst1.32 {$in1},[$out],#8
190 vext.8 $tmp,$zero,$tmp,#12
192 vext.8 $tmp,$zero,$tmp,#12
195 vdup.32 $tmp,${in0}[3]
198 vext.8 $in1,$zero,$in1,#12
199 vshl.u8 $rcon,$rcon,#1
203 vst1.32 {$in0},[$out],#16
215 vst1.32 {$in0},[$out],#16
218 vtbl.8 $key,{$in1},$mask
219 vext.8 $tmp,$zero,$in0,#12
220 vst1.32 {$in1},[$out],#16
225 vext.8 $tmp,$zero,$tmp,#12
227 vext.8 $tmp,$zero,$tmp,#12
230 vshl.u8 $rcon,$rcon,#1
232 vst1.32 {$in0},[$out],#16
235 vdup.32 $key,${in0}[3] // just splat
236 vext.8 $tmp,$zero,$in1,#12
240 vext.8 $tmp,$zero,$tmp,#12
242 vext.8 $tmp,$zero,$tmp,#12
253 mov x0,$ptr // return value
254 `"ldr x29,[sp],#16" if ($flavour =~ /64/)`
256 .size ${prefix}_set_encrypt_key,.-${prefix}_set_encrypt_key
258 .globl ${prefix}_set_decrypt_key
259 .type ${prefix}_set_decrypt_key,%function
261 ${prefix}_set_decrypt_key:
263 $code.=<<___ if ($flavour =~ /64/);
264 stp x29,x30,[sp,#-16]!
267 $code.=<<___ if ($flavour !~ /64/);
276 sub $out,$out,#240 // restore original $out
278 add $inp,$out,x12,lsl#4 // end of key schedule
280 vld1.32 {v0.16b},[$out]
281 vld1.32 {v1.16b},[$inp]
282 vst1.32 {v0.16b},[$inp],x4
283 vst1.32 {v1.16b},[$out],#16
286 vld1.32 {v0.16b},[$out]
287 vld1.32 {v1.16b},[$inp]
290 vst1.32 {v0.16b},[$inp],x4
291 vst1.32 {v1.16b},[$out],#16
295 vld1.32 {v0.16b},[$out]
297 vst1.32 {v0.16b},[$inp]
299 eor x0,x0,x0 // return value
302 $code.=<<___ if ($flavour !~ /64/);
305 $code.=<<___ if ($flavour =~ /64/);
310 .size ${prefix}_set_decrypt_key,.-${prefix}_set_decrypt_key
316 my ($e,$mc) = $dir eq "en" ? ("e","mc") : ("d","imc");
317 my ($inp,$out,$key)=map("x$_",(0..2));
319 my ($rndkey0,$rndkey1,$inout)=map("q$_",(0..3));
322 .globl ${prefix}_${dir}crypt
323 .type ${prefix}_${dir}crypt,%function
325 ${prefix}_${dir}crypt:
326 ldr $rounds,[$key,#240]
327 vld1.32 {$rndkey0},[$key],#16
328 vld1.8 {$inout},[$inp]
329 sub $rounds,$rounds,#2
330 vld1.32 {$rndkey1},[$key],#16
333 aes$e $inout,$rndkey0
335 vld1.32 {$rndkey0},[$key],#16
336 subs $rounds,$rounds,#2
337 aes$e $inout,$rndkey1
339 vld1.32 {$rndkey1},[$key],#16
342 aes$e $inout,$rndkey0
344 vld1.32 {$rndkey0},[$key]
345 aes$e $inout,$rndkey1
346 veor $inout,$inout,$rndkey0
348 vst1.8 {$inout},[$out]
350 .size ${prefix}_${dir}crypt,.-${prefix}_${dir}crypt
357 my ($inp,$out,$len,$key,$ivp)=map("x$_",(0..4)); my $enc="w5";
358 my ($rounds,$cnt,$key_,$step,$step1)=($enc,"w6","x7","x8","x12");
359 my ($dat0,$dat1,$in0,$in1,$tmp0,$tmp1,$ivec,$rndlast)=map("q$_",(0..7));
361 my ($dat,$tmp,$rndzero_n_last)=($dat0,$tmp0,$tmp1);
362 my ($key4,$key5,$key6,$key7)=("x6","x12","x14",$key);
364 ### q8-q15 preloaded key schedule
367 .globl ${prefix}_cbc_encrypt
368 .type ${prefix}_cbc_encrypt,%function
370 ${prefix}_cbc_encrypt:
372 $code.=<<___ if ($flavour =~ /64/);
373 stp x29,x30,[sp,#-16]!
376 $code.=<<___ if ($flavour !~ /64/);
379 vstmdb sp!,{d8-d15} @ ABI specification says so
380 ldmia ip,{r4-r5} @ load remaining args
388 cmp $enc,#0 // en- or decrypting?
389 ldr $rounds,[$key,#240]
391 vld1.8 {$ivec},[$ivp]
392 vld1.8 {$dat},[$inp],$step
394 vld1.32 {q8-q9},[$key] // load key schedule...
395 sub $rounds,$rounds,#6
396 add $key_,$key,x5,lsl#4 // pointer to last 7 round keys
397 sub $rounds,$rounds,#2
398 vld1.32 {q10-q11},[$key_],#32
399 vld1.32 {q12-q13},[$key_],#32
400 vld1.32 {q14-q15},[$key_],#32
401 vld1.32 {$rndlast},[$key_]
409 veor $rndzero_n_last,q8,$rndlast
412 vld1.32 {$in0-$in1},[$key_]
426 vst1.8 {$ivec},[$out],#16
458 vld1.8 {q8},[$inp],$step
461 veor q8,q8,$rndzero_n_last
464 vld1.32 {q9},[$key_] // re-pre-load rndkey[1]
468 veor $ivec,$dat,$rndlast
471 vst1.8 {$ivec},[$out],#16
476 vld1.32 {$in0-$in1},[$key_]
483 vst1.8 {$ivec},[$out],#16
497 vld1.8 {q8},[$inp],$step
504 veor q8,q8,$rndzero_n_last
506 veor $ivec,$dat,$rndlast
507 b.hs .Loop_cbc_enc128
509 vst1.8 {$ivec},[$out],#16
513 my ($dat2,$in2,$tmp2)=map("q$_",(10,11,9));
517 vld1.8 {$dat2},[$inp],#16
518 subs $len,$len,#32 // bias
522 vorr $in2,$dat2,$dat2
525 vorr $dat1,$dat2,$dat2
526 vld1.8 {$dat2},[$inp],#16
528 vorr $in1,$dat1,$dat1
529 vorr $in2,$dat2,$dat2
538 vld1.32 {q8},[$key_],#16
546 vld1.32 {q9},[$key_],#16
555 veor $tmp0,$ivec,$rndlast
557 veor $tmp1,$in0,$rndlast
558 mov.lo x6,$len // x6, $cnt, is zero at this point
565 veor $tmp2,$in1,$rndlast
566 add $inp,$inp,x6 // $inp is adjusted in such way that
567 // at exit from the loop $dat1-$dat2
568 // are loaded with last "words"
577 vld1.8 {$in0},[$inp],#16
584 vld1.8 {$in1},[$inp],#16
591 vld1.8 {$in2},[$inp],#16
595 vld1.32 {q8},[$key_],#16 // re-pre-load rndkey[0]
597 veor $tmp0,$tmp0,$dat0
598 veor $tmp1,$tmp1,$dat1
599 veor $dat2,$dat2,$tmp2
600 vld1.32 {q9},[$key_],#16 // re-pre-load rndkey[1]
601 vst1.8 {$tmp0},[$out],#16
603 vst1.8 {$tmp1},[$out],#16
605 vst1.8 {$dat2},[$out],#16
618 vld1.32 {q8},[$key_],#16
624 vld1.32 {q9},[$key_],#16
644 veor $tmp1,$ivec,$rndlast
649 veor $tmp2,$in1,$rndlast
653 veor $tmp1,$tmp1,$dat1
654 veor $tmp2,$tmp2,$dat2
656 vst1.8 {$tmp1},[$out],#16
657 vst1.8 {$tmp2},[$out],#16
661 veor $tmp1,$tmp1,$dat2
663 vst1.8 {$tmp1},[$out],#16
666 vst1.8 {$ivec},[$ivp]
670 $code.=<<___ if ($flavour !~ /64/);
674 $code.=<<___ if ($flavour =~ /64/);
679 .size ${prefix}_cbc_encrypt,.-${prefix}_cbc_encrypt
683 my ($inp,$out,$len,$key,$ivp)=map("x$_",(0..4));
684 my ($rounds,$cnt,$key_)=("w5","w6","x7");
685 my ($ctr,$tctr0,$tctr1,$tctr2)=map("w$_",(8..10,12));
686 my $step="x12"; # aliases with $tctr2
688 my ($dat0,$dat1,$in0,$in1,$tmp0,$tmp1,$ivec,$rndlast)=map("q$_",(0..7));
689 my ($dat2,$in2,$tmp2)=map("q$_",(10,11,9));
691 my ($dat,$tmp)=($dat0,$tmp0);
693 ### q8-q15 preloaded key schedule
696 .globl ${prefix}_ctr32_encrypt_blocks
697 .type ${prefix}_ctr32_encrypt_blocks,%function
699 ${prefix}_ctr32_encrypt_blocks:
701 $code.=<<___ if ($flavour =~ /64/);
702 stp x29,x30,[sp,#-16]!
705 $code.=<<___ if ($flavour !~ /64/);
707 stmdb sp!,{r4-r10,lr}
708 vstmdb sp!,{d8-d15} @ ABI specification says so
709 ldr r4, [ip] @ load remaining arg
712 ldr $rounds,[$key,#240]
714 ldr $ctr, [$ivp, #12]
715 vld1.32 {$dat0},[$ivp]
717 vld1.32 {q8-q9},[$key] // load key schedule...
718 sub $rounds,$rounds,#4
721 add $key_,$key,x5,lsl#4 // pointer to last 5 round keys
722 sub $rounds,$rounds,#2
723 vld1.32 {q12-q13},[$key_],#32
724 vld1.32 {q14-q15},[$key_],#32
725 vld1.32 {$rndlast},[$key_]
732 vorr $dat1,$dat0,$dat0
734 vorr $dat2,$dat0,$dat0
736 vorr $ivec,$dat0,$dat0
738 vmov.32 ${dat1}[3],$tctr1
741 sub $len,$len,#3 // bias
742 vmov.32 ${dat2}[3],$tctr2
753 vld1.32 {q8},[$key_],#16
761 vld1.32 {q9},[$key_],#16
768 vld1.8 {$in0},[$inp],#16
769 vorr $dat0,$ivec,$ivec
772 vld1.8 {$in1},[$inp],#16
773 vorr $dat1,$ivec,$ivec
778 vld1.8 {$in2},[$inp],#16
782 vorr $dat2,$ivec,$ivec
788 veor $in0,$in0,$rndlast
792 veor $in1,$in1,$rndlast
798 veor $in2,$in2,$rndlast
802 vmov.32 ${dat0}[3], $tctr0
808 vmov.32 ${dat1}[3], $tctr1
812 vmov.32 ${dat2}[3], $tctr2
819 vld1.32 {q8},[$key_],#16 // re-pre-load rndkey[0]
820 vst1.8 {$in0},[$out],#16
823 vst1.8 {$in1},[$out],#16
825 vld1.32 {q9},[$key_],#16 // re-pre-load rndkey[1]
826 vst1.8 {$in2},[$out],#16
840 vld1.32 {q8},[$key_],#16
846 vld1.32 {q9},[$key_],#16
857 vld1.8 {$in0},[$inp],$step
867 veor $in0,$in0,$rndlast
872 veor $in1,$in1,$rndlast
879 vst1.8 {$in0},[$out],#16
885 $code.=<<___ if ($flavour !~ /64/);
887 ldmia sp!,{r4-r10,pc}
889 $code.=<<___ if ($flavour =~ /64/);
894 .size ${prefix}_ctr32_encrypt_blocks,.-${prefix}_ctr32_encrypt_blocks
900 ########################################
901 if ($flavour =~ /64/) { ######## 64-bit code
903 "aesd" => 0x4e285800, "aese" => 0x4e284800,
904 "aesimc"=> 0x4e287800, "aesmc" => 0x4e286800 );
907 my ($mnemonic,$arg)=@_;
909 $arg =~ m/[qv]([0-9]+)[^,]*,\s*[qv]([0-9]+)/o &&
910 sprintf ".inst\t0x%08x\t//%s %s",
911 $opcode{$mnemonic}|$1|($2<<5),
915 foreach(split("\n",$code)) {
916 s/\`([^\`]*)\`/eval($1)/geo;
918 s/\bq([0-9]+)\b/"v".($1<8?$1:$1+8).".16b"/geo; # old->new registers
919 s/@\s/\/\//o; # old->new style commentary
921 #s/[v]?(aes\w+)\s+([qv].*)/unaes($1,$2)/geo or
922 s/cclr\s+([wx])([^,]+),\s*([a-z]+)/csel $1$2,$1zr,$1$2,$3/o or
923 s/mov\.([a-z]+)\s+([wx][0-9]+),\s*([wx][0-9]+)/csel $2,$3,$2,$1/o or
924 s/vmov\.i8/movi/o or # fix up legacy mnemonics
926 s/vrev32\.8/rev32/o or
929 s/^(\s+)v/$1/o or # strip off v prefix
932 # fix up remaining legacy suffixes
934 m/\],#8/o and s/\.16b/\.8b/go;
935 s/\.[ui]?32//o and s/\.16b/\.4s/go;
936 s/\.[ui]?64//o and s/\.16b/\.2d/go;
937 s/\.[42]([sd])\[([0-3])\]/\.$1\[$2\]/o;
941 } else { ######## 32-bit code
943 "aesd" => 0xf3b00340, "aese" => 0xf3b00300,
944 "aesimc"=> 0xf3b003c0, "aesmc" => 0xf3b00380 );
947 my ($mnemonic,$arg)=@_;
949 if ($arg =~ m/[qv]([0-9]+)[^,]*,\s*[qv]([0-9]+)/o) {
950 my $word = $opcode{$mnemonic}|(($1&7)<<13)|(($1&8)<<19)
951 |(($2&7)<<1) |(($2&8)<<2);
952 # since ARMv7 instructions are always encoded little-endian.
953 # correct solution is to use .inst directive, but older
954 # assemblers don't implement it:-(
955 sprintf ".byte\t0x%02x,0x%02x,0x%02x,0x%02x\t@ %s %s",
956 $word&0xff,($word>>8)&0xff,
957 ($word>>16)&0xff,($word>>24)&0xff,
965 $arg =~ m/q([0-9]+),\s*\{q([0-9]+)\},\s*q([0-9]+)/o &&
966 sprintf "vtbl.8 d%d,{q%d},d%d\n\t".
967 "vtbl.8 d%d,{q%d},d%d", 2*$1,$2,2*$3, 2*$1+1,$2,2*$3+1;
973 $arg =~ m/q([0-9]+),\s*q([0-9]+)\[([0-3])\]/o &&
974 sprintf "vdup.32 q%d,d%d[%d]",$1,2*$2+($3>>1),$3&1;
980 $arg =~ m/q([0-9]+)\[([0-3])\],(.*)/o &&
981 sprintf "vmov.32 d%d[%d],%s",2*$1+($2>>1),$2&1,$3;
984 foreach(split("\n",$code)) {
985 s/\`([^\`]*)\`/eval($1)/geo;
987 s/\b[wx]([0-9]+)\b/r$1/go; # new->old registers
988 s/\bv([0-9])\.[12468]+[bsd]\b/q$1/go; # new->old registers
989 s/\/\/\s?/@ /o; # new->old style commentary
991 # fix up remaining new-style suffixes
992 s/\{q([0-9]+)\},\s*\[(.+)\],#8/sprintf "{d%d},[$2]!",2*$1/eo or
995 s/[v]?(aes\w+)\s+([qv].*)/unaes($1,$2)/geo or
996 s/cclr\s+([^,]+),\s*([a-z]+)/mov$2 $1,#0/o or
997 s/vtbl\.8\s+(.*)/unvtbl($1)/geo or
998 s/vdup\.32\s+(.*)/unvdup32($1)/geo or
999 s/vmov\.32\s+(.*)/unvmov32($1)/geo or
1000 s/^(\s+)b\./$1b/o or
1001 s/^(\s+)mov\./$1mov/o or
1002 s/^(\s+)ret/$1bx\tlr/o;