2 # Copyright 2016 The OpenSSL Project Authors. All Rights Reserved.
4 # Licensed under the OpenSSL license (the "License"). You may not use
5 # this file except in compliance with the License. You can obtain a copy
6 # in the file LICENSE in the source distribution or at
7 # https://www.openssl.org/source/license.html
10 # ====================================================================
11 # Written by Andy Polyakov <appro@openssl.org> for the OpenSSL
12 # project. The module is, however, dual licensed under OpenSSL and
13 # CRYPTOGAMS licenses depending on where you obtain it. For further
14 # details see http://www.openssl.org/~appro/cryptogams/.
15 # ====================================================================
19 # Initial support for Fujitsu SPARC64 X/X+ comprises minimally
20 # required key setup and single-block procedures.
24 # Add "teaser" CBC and CTR mode-specific subroutines. "Teaser" means
25 # that parallelizeable nature of CBC decrypt and CTR is not utilized
26 # yet. CBC encrypt on the other hand is as good as it can possibly
27 # get processing one byte in 4.1 cycles with 128-bit key on SPARC64 X.
28 # This is ~6x faster than pure software implementation...
31 open STDOUT,">$output";
34 my ($inp,$out,$key,$rounds,$tmp,$mask) = map("%o$_",(0..5));
37 #include "sparc_arch.h"
39 #define LOCALS (STACK_BIAS+STACK_FRAME)
46 and $inp, 7, $tmp ! is input aligned?
48 ld [$key + 240], $rounds
49 ldd [$key + 0], %f6 ! round[0]
52 ldd [$inp + 0], %f0 ! load input
53 brz,pt $tmp, .Lenc_inp_aligned
57 alignaddr $inp, $tmp, %g0
58 faligndata %f0, %f2, %f0
59 faligndata %f2, %f4, %f2
62 ldd [$key + 16], %f10 ! round[1]
65 fxor %f0, %f6, %f0 ! ^=round[0]
67 ldd [$key + 32], %f6 ! round[2]
70 sub $rounds, 4, $rounds
74 faesencx %f2, %f10, %f0
75 faesencx %f4, %f12, %f2
81 faesencx %f2, %f6, %f0
82 faesencx %f4, %f8, %f2
86 brnz,a $rounds, .Loop_enc
87 sub $rounds, 2, $rounds
89 andcc $out, 7, $tmp ! is output aligned?
93 faesencx %f2, %f10, %f0
94 faesencx %f4, %f12, %f2
96 faesenclx %f2, %f6, %f0
97 faesenclx %f4, %f8, %f2
99 bnz,a,pn %icc, .Lenc_out_unaligned
100 srl $mask, $tmp, $mask
108 alignaddrl $out, %g0, $out
109 faligndata %f0, %f0, %f4
110 faligndata %f0, %f2, %f6
111 faligndata %f2, %f2, %f8
113 stda %f4, [$out + $mask]0xc0 ! partial store
116 orn %g0, $mask, $mask
117 stda %f8, [$out + $mask]0xc0 ! partial store
120 .type aes_fx_encrypt,#function
121 .size aes_fx_encrypt,.-aes_fx_encrypt
123 .globl aes_fx_decrypt
126 and $inp, 7, $tmp ! is input aligned?
128 ld [$key + 240], $rounds
129 ldd [$key + 0], %f6 ! round[0]
132 ldd [$inp + 0], %f0 ! load input
133 brz,pt $tmp, .Ldec_inp_aligned
137 alignaddr $inp, $tmp, $inp
138 faligndata %f0, %f2, %f0
139 faligndata %f2, %f4, %f2
142 ldd [$key + 16], %f10 ! round[1]
143 ldd [$key + 24], %f12
145 fxor %f0, %f6, %f0 ! ^=round[0]
147 ldd [$key + 32], %f6 ! round[2]
150 sub $rounds, 4, $rounds
154 faesdecx %f2, %f10, %f0
155 faesdecx %f4, %f12, %f2
156 ldd [$key + 16], %f10
157 ldd [$key + 24], %f12
161 faesdecx %f2, %f6, %f0
162 faesdecx %f4, %f8, %f2
166 brnz,a $rounds, .Loop_dec
167 sub $rounds, 2, $rounds
169 andcc $out, 7, $tmp ! is output aligned?
173 faesdecx %f2, %f10, %f0
174 faesdecx %f4, %f12, %f2
176 faesdeclx %f2, %f6, %f0
177 faesdeclx %f4, %f8, %f2
179 bnz,a,pn %icc, .Ldec_out_unaligned
180 srl $mask, $tmp, $mask
188 alignaddrl $out, %g0, $out
189 faligndata %f0, %f0, %f4
190 faligndata %f0, %f2, %f6
191 faligndata %f2, %f2, %f8
193 stda %f4, [$out + $mask]0xc0 ! partial store
196 orn %g0, $mask, $mask
197 stda %f8, [$out + $mask]0xc0 ! partial store
200 .type aes_fx_decrypt,#function
201 .size aes_fx_decrypt,.-aes_fx_decrypt
205 my ($inp,$bits,$out,$tmp,$inc) = map("%o$_",(0..5));
207 .globl aes_fx_set_decrypt_key
209 aes_fx_set_decrypt_key:
214 .type aes_fx_set_decrypt_key,#function
215 .size aes_fx_set_decrypt_key,.-aes_fx_set_decrypt_key
217 .globl aes_fx_set_encrypt_key
219 aes_fx_set_encrypt_key:
233 brz,pt $tmp, .L256aligned
237 alignaddr $inp, $tmp, %g0
238 faligndata %f0, %f2, %f0
239 faligndata %f2, %f4, %f2
240 faligndata %f4, %f6, %f4
241 faligndata %f6, %f8, %f6
245 and $inc, `14*16`, $tmp
246 st $bits, [$out + 240] ! store rounds
247 add $out, $tmp, $out ! start or end of key schedule
248 sllx $inc, 4, $inc ! 16 or -16
250 for ($i=0; $i<6; $i++) {
253 faeskeyx %f6, `0x10+$i`, %f0
256 faeskeyx %f0, 0x00, %f2
258 faeskeyx %f2, 0x01, %f4
261 faeskeyx %f4, 0x00, %f6
266 faeskeyx %f6, `0x10+$i`, %f0
269 faeskeyx %f0, 0x00, %f2
276 xor %o0, %o0, %o0 ! return 0
280 brz,pt $tmp, .L192aligned
284 alignaddr $inp, $tmp, %g0
285 faligndata %f0, %f2, %f0
286 faligndata %f2, %f4, %f2
287 faligndata %f4, %f6, %f4
291 and $inc, `12*16`, $tmp
292 st $bits, [$out + 240] ! store rounds
293 add $out, $tmp, $out ! start or end of key schedule
294 sllx $inc, 4, $inc ! 16 or -16
296 for ($i=0; $i<8; $i+=2) {
299 faeskeyx %f4, `0x10+$i`, %f0
302 faeskeyx %f0, 0x00, %f2
304 faeskeyx %f2, 0x00, %f4
307 faeskeyx %f4, `0x10+$i+1`, %f0
309 faeskeyx %f0, 0x00, %f2
313 $code.=<<___ if ($i<6);
314 faeskeyx %f2, 0x00, %f4
321 xor %o0, %o0, %o0 ! return 0
325 brz,pt $tmp, .L128aligned
329 alignaddr $inp, $tmp, %g0
330 faligndata %f0, %f2, %f0
331 faligndata %f2, %f4, %f2
335 and $inc, `10*16`, $tmp
336 st $bits, [$out + 240] ! store rounds
337 add $out, $tmp, $out ! start or end of key schedule
338 sllx $inc, 4, $inc ! 16 or -16
340 for ($i=0; $i<10; $i++) {
343 faeskeyx %f2, `0x10+$i`, %f0
346 faeskeyx %f0, 0x00, %f2
353 xor %o0, %o0, %o0 ! return 0
354 .type aes_fx_set_encrypt_key,#function
355 .size aes_fx_set_encrypt_key,.-aes_fx_set_encrypt_key
359 my ($inp,$out,$len,$key,$ivp,$dir) = map("%i$_",(0..5));
360 my ($rounds,$inner,$end,$inc,$ialign,$oalign,$mask) = map("%l$_",(0..7));
361 my ($out0,$out1,$iv0,$iv1,$r0hi,$r0lo,$rlhi,$rllo,$in0,$in1,$intail,$outhead)
362 = map("%f$_",grep { !($_ & 1) } (16 .. 62));
363 my ($ileft,$iright) = ($ialign,$oalign);
366 .globl aes_fx_cbc_encrypt
369 save %sp, -STACK_FRAME-16, %sp
370 andncc $len, 15, $len
371 bz,pn SIZE_T_CC, .Lcbc_no_data
375 ld [$key + 240], $rounds
377 ld [$ivp + 0], %f0 ! load ivec
382 sll $rounds, 4, $rounds
383 add $rounds, $key, $end
384 ldd [$key + 0], $r0hi ! round[0]
385 ldd [$key + 8], $r0lo
389 ldd [$end + 0], $rlhi ! round[last]
390 ldd [$end + 8], $rllo
394 ldd [$key + 16], %f10 ! round[1]
395 ldd [$key + 24], %f12
397 ldd [$inp - 16], $in0 ! load input
399 ldda [$inp]0x82, $intail ! non-faulting load
400 brz $dir, .Lcbc_decrypt
401 add $inp, $inc, $inp ! inp+=16
403 fxor $r0hi, %f0, %f0 ! ivec^=round[0]
405 alignaddr $inp, $ialign, %g0
406 faligndata $in0, $in1, $in0
407 faligndata $in1, $intail, $in1
408 fxor $r0hi, $rlhi, $rlhi ! round[last]^=round[0]
409 fxor $r0lo, $rllo, $rllo
412 fxor $in0, %f0, %f0 ! inp^ivec^round[0]
414 ldd [$key + 32], %f6 ! round[2]
417 sub $rounds, 16*6, $inner
421 faesencx %f2, %f10, %f0
422 faesencx %f4, %f12, %f2
423 ldd [$end + 16], %f10
424 ldd [$end + 24], %f12
428 faesencx %f2, %f6, %f0
429 faesencx %f4, %f8, %f2
433 brnz,a $inner, .Lcbc_enc
434 sub $inner, 16*2, $inner
437 faesencx %f2, %f10, %f0
438 faesencx %f4, %f12, %f2
439 ldd [$end + 16], %f10 ! round[last-1]
440 ldd [$end + 24], %f12
443 faesencx %f2, %f6, %f0
444 faesencx %f4, %f8, %f2
448 ldd [$inp - 8], $in1 ! load next input block
449 ldda [$inp]0x82, $intail ! non-faulting load
450 add $inp, $inc, $inp ! inp+=16
453 faesencx %f2, %f10, %f0
454 faesencx %f4, %f12, %f2
455 ldd [$key + 16], %f10 ! round[1]
456 ldd [$key + 24], %f12
458 faligndata $in0, $in1, $in0
459 faligndata $in1, $intail, $in1
462 faesenclx %f2, $rlhi, %f0 ! result is out^round[0]
463 faesenclx %f4, $rllo, %f2
465 fxor %f0, $r0hi, $out0 ! out^round[0]^round[0]
466 brnz,pn $oalign, .Lcbc_enc_unaligned_out
467 fxor %f2, $r0lo, $out1
469 std $out0, [$out + 0]
470 std $out1, [$out + 8]
473 brnz,a $len, .Loop_cbc_enc
476 st $out0, [$ivp + 0] ! output ivec
477 st $out0#lo, [$ivp + 4]
479 st $out1#lo, [$ivp + 12]
486 .Lcbc_enc_unaligned_out:
487 alignaddrl $out, %g0, $out
489 sll $ialign, 3, $ileft
490 srl $mask, $oalign, $mask
491 sub %g0, $ileft, $iright
493 faligndata $out0, $out0, %f6
494 faligndata $out0, $out1, %f8
496 stda %f6, [$out + $mask]0xc0 ! partial store
499 brz $len, .Lcbc_enc_unaligned_out_done
500 orn %g0, $mask, $mask
502 .Loop_cbc_enc_unaligned_out:
503 fxor $in0, %f0, %f0 ! inp^ivec^round[0]
505 ldd [$key + 32], %f6 ! round[2]
509 faesencx %f2, %f10, %f0
510 faesencx %f4, %f12, %f2
511 ldd [$key + 48], %f10 ! round[3]
512 ldd [$key + 56], %f12
516 brz $ialign, .Lcbc_enc_aligned_inp
520 sllx %o0, $ileft, %o0
521 srlx %o1, $iright, %g1
522 sllx %o1, $ileft, %o1
524 srlx %o2, $iright, %o2
527 .Lcbc_enc_aligned_inp:
529 faesencx %f2, %f6, %f0
530 faesencx %f4, %f8, %f2
531 ldd [$key + 64], %f6 ! round[4]
534 sub $rounds, 16*8, $inner
536 stx %o0, [%sp + LOCALS + 0]
537 stx %o1, [%sp + LOCALS + 8]
538 add $inp, $inc, $inp ! inp+=16
542 faesencx %f2, %f10, %f0
543 faesencx %f4, %f12, %f2
544 ldd [$end + 16], %f10
545 ldd [$end + 24], %f12
549 faesencx %f2, %f6, %f0
550 faesencx %f4, %f8, %f2
554 brnz,a $inner, .Lcbc_enc_unaligned
555 sub $inner, 16*2, $inner
558 faesencx %f2, %f10, %f0
559 faesencx %f4, %f12, %f2
560 ldd [$end + 16], %f10 ! round[last-1]
561 ldd [$end + 24], %f12
564 faesencx %f2, %f6, %f0
565 faesencx %f4, %f8, %f2
566 ldd [%sp + LOCALS + 0], $in0
567 ldd [%sp + LOCALS + 8], $in1
570 faesencx %f2, %f10, %f0
571 faesencx %f4, %f12, %f2
572 ldd [$key + 16], %f10 ! round[1]
573 ldd [$key + 24], %f12
576 faesenclx %f2, $rlhi, %f0 ! result is out^round[0]
577 faesenclx %f4, $rllo, %f2
579 fmovd $out1, $outhead
580 fxor %f0, $r0hi, $out0 ! out^round[0]^round[0]
581 fxor %f2, $r0lo, $out1
583 faligndata $outhead, $out0, %f6
584 faligndata $out0, $out1, %f8
589 brnz,a $len, .Loop_cbc_enc_unaligned_out
592 .Lcbc_enc_unaligned_out_done:
593 faligndata $out1, $out1, %f8
594 stda %f8, [$out + $mask]0xc0 ! partial store
596 st $out0, [$ivp + 0] ! output ivec
597 st $out0#lo, [$ivp + 4]
599 st $out1#lo, [$ivp + 12]
606 alignaddr $inp, $ialign, %g0
607 faligndata $in0, $in1, $in0
608 faligndata $in1, $intail, $in1
613 fxor $in0, $r0hi, %f0 ! inp^round[0]
614 fxor $in1, $r0lo, %f2
615 ldd [$key + 32], %f6 ! round[2]
618 sub $rounds, 16*6, $inner
622 faesdecx %f2, %f10, %f0
623 faesdecx %f4, %f12, %f2
624 ldd [$end + 16], %f10
625 ldd [$end + 24], %f12
629 faesdecx %f2, %f6, %f0
630 faesdecx %f4, %f8, %f2
634 brnz,a $inner, .Lcbc_dec
635 sub $inner, 16*2, $inner
638 faesdecx %f2, %f10, %f0
639 faesdecx %f4, %f12, %f2
640 ldd [$end + 16], %f10 ! round[last-1]
641 ldd [$end + 24], %f12
644 faesdecx %f2, %f6, %f0
645 faesdecx %f4, %f8, %f2
646 fxor $iv0, $rlhi, %f6 ! ivec^round[last]
647 fxor $iv1, $rllo, %f8
653 ldd [$inp - 8], $in1 ! load next input block
654 ldda [$inp]0x82, $intail ! non-faulting load
655 add $inp, $inc, $inp ! inp+=16
658 faesdecx %f2, %f10, %f0
659 faesdecx %f4, %f12, %f2
660 ldd [$key + 16], %f10 ! round[1]
661 ldd [$key + 24], %f12
663 faligndata $in0, $in1, $in0
664 faligndata $in1, $intail, $in1
667 faesdeclx %f2, %f6, %f0
668 faesdeclx %f4, %f8, %f2
670 brnz,pn $oalign, .Lcbc_dec_unaligned_out
677 brnz,a $len, .Loop_cbc_dec
680 st $iv0, [$ivp + 0] ! output ivec
681 st $iv0#lo, [$ivp + 4]
683 st $iv1#lo, [$ivp + 12]
689 .Lcbc_dec_unaligned_out:
690 alignaddrl $out, %g0, $out
692 sll $ialign, 3, $ileft
693 srl $mask, $oalign, $mask
694 sub %g0, $ileft, $iright
696 faligndata %f0, %f0, $out0
697 faligndata %f0, %f2, $out1
699 stda $out0, [$out + $mask]0xc0 ! partial store
700 std $out1, [$out + 8]
702 brz $len, .Lcbc_dec_unaligned_out_done
703 orn %g0, $mask, $mask
705 .Loop_cbc_dec_unaligned_out:
707 fxor $in0, $r0hi, %f0 ! inp^round[0]
708 fxor $in1, $r0lo, %f2
709 ldd [$key + 32], %f6 ! round[2]
713 faesdecx %f2, %f10, %f0
714 faesdecx %f4, %f12, %f2
715 ldd [$key + 48], %f10 ! round[3]
716 ldd [$key + 56], %f12
720 brz $ialign, .Lcbc_dec_aligned_inp
724 sllx %o0, $ileft, %o0
725 srlx %o1, $iright, %g1
726 sllx %o1, $ileft, %o1
728 srlx %o2, $iright, %o2
731 .Lcbc_dec_aligned_inp:
733 faesdecx %f2, %f6, %f0
734 faesdecx %f4, %f8, %f2
735 ldd [$key + 64], %f6 ! round[4]
738 sub $rounds, 16*8, $inner
740 stx %o0, [%sp + LOCALS + 0]
741 stx %o1, [%sp + LOCALS + 8]
742 add $inp, $inc, $inp ! inp+=16
746 faesdecx %f2, %f10, %f0
747 faesdecx %f4, %f12, %f2
748 ldd [$end + 16], %f10
749 ldd [$end + 24], %f12
753 faesdecx %f2, %f6, %f0
754 faesdecx %f4, %f8, %f2
758 brnz,a $inner, .Lcbc_dec_unaligned
759 sub $inner, 16*2, $inner
762 faesdecx %f2, %f10, %f0
763 faesdecx %f4, %f12, %f2
764 ldd [$end + 16], %f10 ! round[last-1]
765 ldd [$end + 24], %f12
768 faesdecx %f2, %f6, %f0
769 faesdecx %f4, %f8, %f2
770 fxor $iv0, $rlhi, %f6 ! ivec^round[last]
771 fxor $iv1, $rllo, %f8
776 faesdecx %f2, %f10, %f0
777 faesdecx %f4, %f12, %f2
778 ldd [$key + 16], %f10 ! round[1]
779 ldd [$key + 24], %f12
782 faesdeclx %f2, %f6, %f0
783 faesdeclx %f4, %f8, %f2
784 ldd [%sp + LOCALS + 0], $in0
785 ldd [%sp + LOCALS + 8], $in1
787 faligndata $outhead, %f0, $out0
788 faligndata %f0, %f2, $out1
789 std $out0, [$out + 0]
790 std $out1, [$out + 8]
793 brnz,a $len, .Loop_cbc_dec_unaligned_out
796 .Lcbc_dec_unaligned_out_done:
797 faligndata %f2, %f2, %f8
798 stda %f8, [$out + $mask]0xc0 ! partial store
800 st $iv0, [$ivp + 0] ! output ivec
801 st $iv0#lo, [$ivp + 4]
803 st $iv1#lo, [$ivp + 12]
807 .type aes_fx_cbc_encrypt,#function
808 .size aes_fx_cbc_encrypt,.-aes_fx_cbc_encrypt
812 my ($inp,$out,$len,$key,$ivp) = map("%i$_",(0..5));
813 my ($rounds,$inner,$end,$inc,$ialign,$oalign,$mask) = map("%l$_",(0..7));
814 my ($out0,$out1,$ctr0,$ctr1,$r0hi,$r0lo,$rlhi,$rllo,$in0,$in1,$intail,$outhead)
815 = map("%f$_",grep { !($_ & 1) } (16 .. 62));
816 my ($ileft,$iright) = ($ialign, $oalign);
820 .globl aes_fx_ctr32_encrypt_blocks
822 aes_fx_ctr32_encrypt_blocks:
823 save %sp, -STACK_FRAME-16, %sp
825 brz,pn $len, .Lctr32_no_data
829 add %o7, .Lone - .Lpic, %o0
831 ld [$key + 240], $rounds
833 ld [$ivp + 0], $ctr0 ! load counter
834 ld [$ivp + 4], $ctr0#lo
836 ld [$ivp + 12], $ctr1#lo
839 sll $rounds, 4, $rounds
840 add $rounds, $key, $end
841 ldd [$key + 0], $r0hi ! round[0]
842 ldd [$key + 8], $r0lo
846 ldd [$key + 16], %f10 ! round[1]
847 ldd [$key + 24], %f12
851 ldd [$end + 0], $rlhi ! round[last]
852 ldd [$end + 8], $rllo
854 ldd [$inp - 16], $in0 ! load input
856 ldda [$inp]0x82, $intail ! non-faulting load
857 add $inp, $inc, $inp ! inp+=16
859 alignaddr $inp, $ialign, %g0
860 faligndata $in0, $in1, $in0
861 faligndata $in1, $intail, $in1
864 fxor $ctr0, $r0hi, %f0 ! counter^round[0]
865 fxor $ctr1, $r0lo, %f2
866 ldd [$key + 32], %f6 ! round[2]
869 sub $rounds, 16*6, $inner
873 faesencx %f2, %f10, %f0
874 faesencx %f4, %f12, %f2
875 ldd [$end + 16], %f10
876 ldd [$end + 24], %f12
880 faesencx %f2, %f6, %f0
881 faesencx %f4, %f8, %f2
885 brnz,a $inner, .Lctr32_enc
886 sub $inner, 16*2, $inner
889 faesencx %f2, %f10, %f0
890 faesencx %f4, %f12, %f2
891 ldd [$end + 16], %f10 ! round[last-1]
892 ldd [$end + 24], %f12
895 faesencx %f2, %f6, %f0
896 faesencx %f4, %f8, %f2
897 fxor $in0, $rlhi, %f6 ! inp^round[last]
898 fxor $in1, $rllo, %f8
902 ldd [$inp - 8], $in1 ! load next input block
903 ldda [$inp]0x82, $intail ! non-faulting load
904 add $inp, $inc, $inp ! inp+=16
907 faesencx %f2, %f10, %f0
908 faesencx %f4, %f12, %f2
909 ldd [$key + 16], %f10 ! round[1]
910 ldd [$key + 24], %f12
912 faligndata $in0, $in1, $in0
913 faligndata $in1, $intail, $in1
914 fpadd32 $ctr1, $one, $ctr1 ! increment counter
917 faesenclx %f2, %f6, %f0
918 faesenclx %f4, %f8, %f2
920 brnz,pn $oalign, .Lctr32_unaligned_out
927 brnz,a $len, .Loop_ctr32
935 .Lctr32_unaligned_out:
936 alignaddrl $out, %g0, $out
938 sll $ialign, 3, $ileft
939 srl $mask, $oalign, $mask
940 sub %g0, $ileft, $iright
942 faligndata %f0, %f0, $out0
943 faligndata %f0, %f2, $out1
945 stda $out0, [$out + $mask]0xc0 ! partial store
946 std $out1, [$out + 8]
948 brz $len, .Lctr32_unaligned_out_done
949 orn %g0, $mask, $mask
951 .Loop_ctr32_unaligned_out:
953 fxor $ctr0, $r0hi, %f0 ! counter^round[0]
954 fxor $ctr1, $r0lo, %f2
955 ldd [$key + 32], %f6 ! round[2]
959 faesencx %f2, %f10, %f0
960 faesencx %f4, %f12, %f2
961 ldd [$key + 48], %f10 ! round[3]
962 ldd [$key + 56], %f12
966 brz $ialign, .Lctr32_aligned_inp
970 sllx %o0, $ileft, %o0
971 srlx %o1, $iright, %g1
972 sllx %o1, $ileft, %o1
974 srlx %o2, $iright, %o2
979 faesencx %f2, %f6, %f0
980 faesencx %f4, %f8, %f2
981 ldd [$key + 64], %f6 ! round[4]
984 sub $rounds, 16*8, $inner
986 stx %o0, [%sp + LOCALS + 0]
987 stx %o1, [%sp + LOCALS + 8]
988 add $inp, $inc, $inp ! inp+=16
990 .Lctr32_enc_unaligned:
992 faesencx %f2, %f10, %f0
993 faesencx %f4, %f12, %f2
994 ldd [$end + 16], %f10
995 ldd [$end + 24], %f12
999 faesencx %f2, %f6, %f0
1000 faesencx %f4, %f8, %f2
1004 brnz,a $inner, .Lctr32_enc_unaligned
1005 sub $inner, 16*2, $inner
1008 faesencx %f2, %f10, %f0
1009 faesencx %f4, %f12, %f2
1010 ldd [$end + 16], %f10 ! round[last-1]
1011 ldd [$end + 24], %f12
1012 fpadd32 $ctr1, $one, $ctr1 ! increment counter
1015 faesencx %f2, %f6, %f0
1016 faesencx %f4, %f8, %f2
1017 fxor $in0, $rlhi, %f6 ! inp^round[last]
1018 fxor $in1, $rllo, %f8
1019 ldd [%sp + LOCALS + 0], $in0
1020 ldd [%sp + LOCALS + 8], $in1
1023 faesencx %f2, %f10, %f0
1024 faesencx %f4, %f12, %f2
1025 ldd [$key + 16], %f10 ! round[1]
1026 ldd [$key + 24], %f12
1029 faesenclx %f2, %f6, %f0
1030 faesenclx %f4, %f8, %f2
1032 faligndata $outhead, %f0, $out0
1033 faligndata %f0, %f2, $out1
1034 std $out0, [$out + 0]
1035 std $out1, [$out + 8]
1038 brnz,a $len, .Loop_ctr32_unaligned_out
1041 .Lctr32_unaligned_out_done:
1042 faligndata %f2, %f2, %f8
1043 stda %f8, [$out + $mask]0xc0 ! partial store
1047 .type aes_fx_ctr32_encrypt_blocks,#function
1048 .size aes_fx_ctr32_encrypt_blocks,.-aes_fx_ctr32_encrypt_blocks
1052 .asciz "AES for Fujitsu SPARC64 X, CRYPTOGAMS by <appro\@openssl.org>"
1056 # Purpose of these subroutines is to explicitly encode VIS instructions,
1057 # so that one can compile the module without having to specify VIS
1058 # extensions on compiler command line, e.g. -xarch=v9 vs. -xarch=v9a.
1059 # Idea is to reserve for option to produce "universal" binary and let
1060 # programmer detect if current CPU is VIS capable at run-time.
1062 my ($mnemonic,$rs1,$rs2,$rd)=@_;
1064 my %visopf = ( "faligndata" => 0x048,
1065 "bshuffle" => 0x04c,
1070 $ref = "$mnemonic\t$rs1,$rs2,$rd";
1072 if ($opf=$visopf{$mnemonic}) {
1073 foreach ($rs1,$rs2,$rd) {
1074 return $ref if (!/%f([0-9]{1,2})/);
1077 return $ref if ($1&1);
1078 # re-encode for upper double register addressing
1083 return sprintf ".word\t0x%08x !%s",
1084 0x81b00000|$rd<<25|$rs1<<14|$opf<<5|$rs2,
1092 my ($mnemonic,$rs1,$rs2,$rd)=@_;
1093 my %bias = ( "g" => 0, "o" => 8, "l" => 16, "i" => 24 );
1095 my %visopf = ( "alignaddr" => 0x018,
1097 "alignaddrl" => 0x01a );
1099 $ref = "$mnemonic\t$rs1,$rs2,$rd";
1101 if ($opf=$visopf{$mnemonic}) {
1102 foreach ($rs1,$rs2,$rd) {
1103 return $ref if (!/%([goli])([0-9])/);
1107 return sprintf ".word\t0x%08x !%s",
1108 0x81b00000|$rd<<25|$rs1<<14|$opf<<5|$rs2,
1116 my ($mnemonic,$rs1,$rs2,$rd)=@_;
1118 my %aesopf = ( "faesencx" => 0x90,
1120 "faesenclx" => 0x92,
1121 "faesdeclx" => 0x93,
1122 "faeskeyx" => 0x94 );
1124 $ref = "$mnemonic\t$rs1,$rs2,$rd";
1126 if (defined($opf=$aesopf{$mnemonic})) {
1127 $rs2 = ($rs2 =~ /%f([0-6]*[02468])/) ? (($1|$1>>5)&31) : $rs2;
1128 $rs2 = oct($rs2) if ($rs2 =~ /^0/);
1130 foreach ($rs1,$rd) {
1131 return $ref if (!/%f([0-9]{1,2})/);
1134 return $ref if ($1&1);
1135 # re-encode for upper double register addressing
1140 return sprintf ".word\t0x%08x !%s",
1141 2<<30|$rd<<25|0x36<<19|$rs1<<14|$opf<<5|$rs2,
1148 foreach (split("\n",$code)) {
1149 s/\`([^\`]*)\`/eval $1/ge;
1151 s/%f([0-9]+)#lo/sprintf "%%f%d",$1+1/ge;
1153 s/\b(faes[^x]{3,4}x)\s+(%f[0-9]{1,2}),\s*([%fx0-9]+),\s*(%f[0-9]{1,2})/
1154 &unfx($1,$2,$3,$4,$5)
1156 s/\b([fb][^\s]*)\s+(%f[0-9]{1,2}),\s*(%f[0-9]{1,2}),\s*(%f[0-9]{1,2})/
1159 s/\b(alignaddr[l]*)\s+(%[goli][0-7]),\s*(%[goli][0-7]),\s*(%[goli][0-7])/
1160 &unvis3($1,$2,$3,$4)