2 * linux/arch/ppc/kernel/traps.c
4 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
6 * Modified by Cort Dougan (cort@cs.nmt.edu)
7 * and Paul Mackerras (paulus@cs.anu.edu.au)
10 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
12 * See file CREDITS for list of people who contributed to this
15 * This program is free software; you can redistribute it and/or
16 * modify it under the terms of the GNU General Public License as
17 * published by the Free Software Foundation; either version 2 of
18 * the License, or (at your option) any later version.
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
25 * You should have received a copy of the GNU General Public License
26 * along with this program; if not, write to the Free Software
27 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
32 * This file handles the architecture-dependent parts of hardware exceptions
37 #include <asm/processor.h>
39 DECLARE_GLOBAL_DATA_PTR;
41 #if (CONFIG_COMMANDS & CFG_CMD_KGDB)
42 int (*debugger_exception_handler)(struct pt_regs *) = 0;
45 /* Returns 0 if exception not found and fixup otherwise. */
46 extern unsigned long search_exception_table(unsigned long);
48 /* THIS NEEDS CHANGING to use the board info structure.
50 #define END_OF_MEM (gd->bd->bi_memstart + gd->bd->bi_memsize)
52 static __inline__ void set_tsr(unsigned long val)
54 #if defined(CONFIG_440)
55 asm volatile("mtspr 0x150, %0" : : "r" (val));
57 asm volatile("mttsr %0" : : "r" (val));
61 static __inline__ unsigned long get_esr(void)
65 #if defined(CONFIG_440)
66 asm volatile("mfspr %0, 0x03e" : "=r" (val) :);
68 asm volatile("mfesr %0" : "=r" (val) :);
73 #define ESR_MCI 0x80000000
74 #define ESR_PIL 0x08000000
75 #define ESR_PPR 0x04000000
76 #define ESR_PTR 0x02000000
77 #define ESR_DST 0x00800000
78 #define ESR_DIZ 0x00400000
79 #define ESR_U0F 0x00008000
81 #if (CONFIG_COMMANDS & CFG_CMD_BEDBUG)
82 extern void do_bedbug_breakpoint(struct pt_regs *);
86 * Trap & Exception support
90 print_backtrace(unsigned long *sp)
95 printf("Call backtrace: ");
97 if ((uint)sp > END_OF_MEM)
105 sp = (unsigned long *)*sp;
110 void show_regs(struct pt_regs * regs)
114 printf("NIP: %08lX XER: %08lX LR: %08lX REGS: %p TRAP: %04lx DEAR: %08lX\n",
115 regs->nip, regs->xer, regs->link, regs, regs->trap, regs->dar);
116 printf("MSR: %08lx EE: %01x PR: %01x FP: %01x ME: %01x IR/DR: %01x%01x\n",
117 regs->msr, regs->msr&MSR_EE ? 1 : 0, regs->msr&MSR_PR ? 1 : 0,
118 regs->msr & MSR_FP ? 1 : 0,regs->msr&MSR_ME ? 1 : 0,
119 regs->msr&MSR_IR ? 1 : 0,
120 regs->msr&MSR_DR ? 1 : 0);
123 for (i = 0; i < 32; i++) {
125 printf("GPR%02d: ", i);
128 printf("%08lX ", regs->gpr[i]);
137 _exception(int signr, struct pt_regs *regs)
140 print_backtrace((unsigned long *)regs->gpr[1]);
145 MachineCheckException(struct pt_regs *regs)
147 unsigned long fixup, val;
149 /* Probing PCI using config cycles cause this exception
150 * when a device is not present. Catch it and return to
151 * the PCI exception handler.
153 if ((fixup = search_exception_table(regs->nip)) != 0) {
158 #if (CONFIG_COMMANDS & CFG_CMD_KGDB)
159 if (debugger_exception_handler && (*debugger_exception_handler)(regs))
163 printf("Machine Check Exception.\n");
164 printf("Caused by (from msr): ");
165 printf("regs %p ", regs);
169 #if !defined(CONFIG_440)
171 printf("Instruction");
172 mtspr(ESR, val & ~ESR_IMCP);
176 printf(" machine check.\n");
178 #elif defined(CONFIG_440)
180 printf("Instruction Synchronous Machine Check exception\n");
181 mtspr(SPRN_ESR, val & ~ESR_IMCP);
185 printf("Instruction Read PLB Error\n");
187 printf("Data Read PLB Error\n");
189 printf("Data Write PLB Error\n");
191 printf("TLB Parity Error\n");
193 /*flush_instruction_cache(); */
194 printf("I-Cache Parity Error\n");
197 printf("D-Cache Search Parity Error\n");
199 printf("D-Cache Flush Parity Error\n");
201 printf("Machine Check exception is imprecise\n");
204 mtspr(SPRN_MCSR, val);
208 print_backtrace((unsigned long *)regs->gpr[1]);
209 panic("machine check");
213 AlignmentException(struct pt_regs *regs)
215 #if (CONFIG_COMMANDS & CFG_CMD_KGDB)
216 if (debugger_exception_handler && (*debugger_exception_handler)(regs))
221 print_backtrace((unsigned long *)regs->gpr[1]);
222 panic("Alignment Exception");
226 ProgramCheckException(struct pt_regs *regs)
230 #if (CONFIG_COMMANDS & CFG_CMD_KGDB)
231 if (debugger_exception_handler && (*debugger_exception_handler)(regs))
238 if( esr_val & ESR_PIL )
239 printf( "** Illegal Instruction **\n" );
240 else if( esr_val & ESR_PPR )
241 printf( "** Privileged Instruction **\n" );
242 else if( esr_val & ESR_PTR )
243 printf( "** Trap Instruction **\n" );
245 print_backtrace((unsigned long *)regs->gpr[1]);
246 panic("Program Check Exception");
250 DecrementerPITException(struct pt_regs *regs)
253 * Reset PIT interrupt
258 * Call timer_interrupt routine in interrupts.c
260 timer_interrupt(NULL);
265 UnknownException(struct pt_regs *regs)
267 #if (CONFIG_COMMANDS & CFG_CMD_KGDB)
268 if (debugger_exception_handler && (*debugger_exception_handler)(regs))
272 printf("Bad trap at PC: %lx, SR: %lx, vector=%lx\n",
273 regs->nip, regs->msr, regs->trap);
278 DebugException(struct pt_regs *regs)
280 printf("Debugger trap at @ %lx\n", regs->nip );
282 #if (CONFIG_COMMANDS & CFG_CMD_BEDBUG)
283 do_bedbug_breakpoint( regs );
287 /* Probe an address by reading. If not present, return -1, otherwise
291 addr_probe(uint *addr)
296 __asm__ __volatile__( \
297 "1: lwz %0,0(%1)\n" \
301 ".section .fixup,\"ax\"\n" \
304 ".section __ex_table,\"a\"\n" \
308 : "=r" (retval) : "r"(addr));