2 * Copyright (c) 2008 Nuovation System Designs, LLC
3 * Grant Erickson <gerickson@nuovations.com>
5 * (C) Copyright 2005-2007
6 * Stefan Roese, DENX Software Engineering, sr@denx.de.
9 * Jun Gu, Artesyn Technology, jung@artesyncp.com
12 * Bill Hunter, Wave 7 Optics, williamhunter@attbi.com
14 * See file CREDITS for list of people who contributed to this
17 * This program is free software; you can redistribute it and/or
18 * modify it under the terms of the GNU General Public License as
19 * published by the Free Software Foundation; either version 2 of
20 * the License, or (at your option) any later version.
22 * This program is distributed in the hope that it will abe useful,
23 * but WITHOUT ANY WARRANTY; without even the implied warranty of
24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
25 * GNU General Public License for more details.
27 * You should have received a copy of the GNU General Public License
28 * along with this program; if not, write to the Free Software
29 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
33 * This file implements generic DRAM ECC initialization for
34 * PowerPC processors using a SDRAM DDR/DDR2 controller,
35 * including the 405EX(r), 440GP/GX/EP/GR, 440SP(E), and
41 #include <ppc_asm.tmpl>
43 #include <asm/processor.h>
48 #if !defined(CONFIG_440EPX) && !defined(CONFIG_440GRX)
49 #if defined(CONFIG_DDR_ECC) || defined(CONFIG_SDRAM_ECC)
54 * This routine initializes a range of DRAM ECC memory with known
55 * data and enables ECC checking.
58 * - Improve performance by utilizing cache.
59 * - Further generalize to make usable by other 4xx variants (e.g.
63 * start - A pointer to the start of memory covered by ECC requiring
65 * size - The size, in bytes, of the memory covered by ECC requiring
69 * start - A pointer to the start of memory covered by ECC with
70 * CFG_ECC_PATTERN written to all locations and ECC data
76 void ecc_init(unsigned long * const start, unsigned long size)
78 const unsigned long pattern = CFG_ECC_PATTERN;
79 unsigned * const end = (unsigned long * const)((long)start + size);
80 unsigned long * current = start;
87 mfsdram(SDRAM_MCOPT1, mcopt1);
89 /* Enable ECC generation without checking or reporting */
91 mtsdram(SDRAM_MCOPT1, ((mcopt1 & ~SDRAM_MCOPT1_MCHK_MASK) |
92 SDRAM_MCOPT1_MCHK_GEN));
94 increment = sizeof(u32);
96 #if defined(CONFIG_440)
98 * Look at the geometry of SDRAM (data width) to determine whether we
99 * can skip words when writing.
102 if ((mcopt1 & SDRAM_MCOPT1_DMWD_MASK) != SDRAM_MCOPT1_DMWD_32)
103 increment = sizeof(u64);
104 #endif /* defined(CONFIG_440) */
106 while (current < end) {
108 current = (unsigned long *)((long)current + increment);
111 /* Wait until the writes are finished. */
115 /* Enable ECC generation with checking and no reporting */
117 mtsdram(SDRAM_MCOPT1, ((mcopt1 & ~SDRAM_MCOPT1_MCHK_MASK) |
118 SDRAM_MCOPT1_MCHK_CHK));
120 #endif /* defined(CONFIG_DDR_ECC) || defined(CONFIG_SDRAM_ECC) */
121 #endif /* !defined(CONFIG_440EPX) && !defined(CONFIG_440GRX) */