2 * Copyright (C) 1998 Dan Malek <dmalek@jlc.net>
3 * Copyright (C) 1999 Magnus Damm <kieraypc01.p.y.kie.era.ericsson.se>
4 * Copyright (C) 2000,2001,2002 Wolfgang Denk <wd@denx.de>
6 * See file CREDITS for list of people who contributed to this
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25 /* U-Boot - Startup Code for PowerPC based Embedded Boards
28 * The processor starts at 0x00000100 and the code is executed
29 * from flash. The code is organized to be at an other address
30 * in memory, but as long we don't jump around before relocating.
31 * board_init lies at a quite high address and when the cpu has
32 * jumped there, everything is ok.
33 * This works because the cpu gives the FLASH (CS0) the whole
34 * address space at startup, and board_init lies as a echo of
35 * the flash somewhere up there in the memorymap.
37 * board_init will change CS0 to be positioned at the correct
38 * address and (s)dram will be positioned at address 0
44 #define CONFIG_8xx 1 /* needed for Linux kernel header files */
45 #define _LINUX_CONFIG_H 1 /* avoid reading Linux autoconf.h file */
47 #include <ppc_asm.tmpl>
50 #include <asm/cache.h>
53 #ifndef CONFIG_IDENT_STRING
54 #define CONFIG_IDENT_STRING ""
57 /* We don't want the MMU yet.
60 #define MSR_KERNEL ( MSR_ME | MSR_RI ) /* Machine Check and Recoverable Interr. */
63 * Set up GOT: Global Offset Table
65 * Use r14 to access the GOT
68 GOT_ENTRY(_GOT2_TABLE_)
69 GOT_ENTRY(_FIXUP_TABLE_)
72 GOT_ENTRY(_start_of_vectors)
73 GOT_ENTRY(_end_of_vectors)
74 GOT_ENTRY(transfer_to_handler)
78 GOT_ENTRY(__bss_start)
79 #if defined(CONFIG_FADS) || defined(CONFIG_ICU862)
80 GOT_ENTRY(environment)
85 * r3 - 1st arg to board_init(): IMMP pointer
86 * r4 - 2nd arg to board_init(): boot flag
89 .long 0x27051956 /* U-Boot Magic Number */
93 .ascii " (", __DATE__, " - ", __TIME__, ")"
94 .ascii CONFIG_IDENT_STRING, "\0"
99 lis r3, CFG_IMMR@h /* position IMMR */
101 li r21, BOOTFLAG_COLD /* Normal Power-On: Boot from FLASH */
104 . = EXC_OFF_SYS_RESET + 0x10
108 li r21, BOOTFLAG_WARM /* Software reboot */
114 /* Initialize machine status; enable machine check interrupt */
115 /*----------------------------------------------------------------------*/
116 li r3, MSR_KERNEL /* Set ME, RI flags */
118 mtspr SRR1, r3 /* Make SRR1 match MSR */
120 mfspr r3, ICR /* clear Interrupt Cause Register */
122 /* Initialize debug port registers */
123 /*----------------------------------------------------------------------*/
124 xor r0, r0, r0 /* Clear R0 */
125 mtspr LCTRL1, r0 /* Initialize debug port regs */
130 /* Reset the caches */
131 /*----------------------------------------------------------------------*/
133 mfspr r3, IC_CST /* Clear error bits */
136 lis r3, IDC_UNALL@h /* Unlock all */
140 lis r3, IDC_INVALL@h /* Invalidate all */
144 lis r3, IDC_DISABLE@h /* Disable data cache */
147 #if !(defined(CONFIG_IP860) || defined(CONFIG_PCU_E) || defined (CONFIG_FLAGADM))
148 /* On IP860 and PCU E,
149 * we cannot enable IC yet
151 lis r3, IDC_ENABLE@h /* Enable instruction cache */
155 /* invalidate all tlb's */
156 /*----------------------------------------------------------------------*/
162 * Calculate absolute address in FLASH and jump there
163 *----------------------------------------------------------------------*/
165 lis r3, CFG_MONITOR_BASE@h
166 ori r3, r3, CFG_MONITOR_BASE@l
167 addi r3, r3, in_flash - _start + EXC_OFF_SYS_RESET
173 /* initialize some SPRs that are hard to access from C */
174 /*----------------------------------------------------------------------*/
176 lis r3, CFG_IMMR@h /* pass IMMR as arg1 to C routine */
177 ori r1, r3, CFG_INIT_SP_OFFSET /* set up the stack in internal DPRAM */
178 /* Note: R0 is still 0 here */
179 stwu r0, -4(r1) /* clear final stack frame so that */
180 stwu r0, -4(r1) /* stack backtraces terminate cleanly */
183 * Disable serialized ifetch and show cycles
184 * (i.e. set processor to normal mode).
185 * This is also a silicon bug workaround, see errata
191 /* Set up debug mode entry */
194 ori r2, r2, CFG_DER@l
197 /* let the C-code set up the rest */
199 /* Be careful to keep code relocatable ! */
200 /*----------------------------------------------------------------------*/
202 GET_GOT /* initialize GOT access */
205 bl cpu_init_f /* run low-level CPU init code (from Flash) */
209 bl board_init_f /* run 1st part of board init code (from Flash) */
213 .globl _start_of_vectors
217 STD_EXCEPTION(0x200, MachineCheck, MachineCheckException)
219 /* Data Storage exception. "Never" generated on the 860. */
220 STD_EXCEPTION(0x300, DataStorage, UnknownException)
222 /* Instruction Storage exception. "Never" generated on the 860. */
223 STD_EXCEPTION(0x400, InstStorage, UnknownException)
225 /* External Interrupt exception. */
226 STD_EXCEPTION(0x500, ExtInterrupt, external_interrupt)
228 /* Alignment exception. */
236 addi r3,r1,STACK_FRAME_OVERHEAD
238 rlwimi r20,r23,0,16,16 /* copy EE bit from saved MSR */
239 lwz r6,GOT(transfer_to_handler)
243 .long AlignmentException - _start + EXC_OFF_SYS_RESET
244 .long int_return - _start + EXC_OFF_SYS_RESET
246 /* Program check exception */
250 addi r3,r1,STACK_FRAME_OVERHEAD
252 rlwimi r20,r23,0,16,16 /* copy EE bit from saved MSR */
253 lwz r6,GOT(transfer_to_handler)
257 .long ProgramCheckException - _start + EXC_OFF_SYS_RESET
258 .long int_return - _start + EXC_OFF_SYS_RESET
260 /* No FPU on MPC8xx. This exception is not supposed to happen.
262 STD_EXCEPTION(0x800, FPUnavailable, UnknownException)
264 /* I guess we could implement decrementer, and may have
265 * to someday for timekeeping.
267 STD_EXCEPTION(0x900, Decrementer, timer_interrupt)
268 STD_EXCEPTION(0xa00, Trap_0a, UnknownException)
269 STD_EXCEPTION(0xb00, Trap_0b, UnknownException)
273 * r0 - SYSCALL number
277 addis r11,r0,0 /* get functions table addr */
278 ori r11,r11,0 /* Note: this code is patched in trap_init */
279 addis r12,r0,0 /* get number of functions */
285 rlwinm r0,r0,2,0,31 /* fn_addr = fn_tbl[r0] */
289 li r20,0xd00-4 /* Get stack pointer */
291 subi r12,r12,12 /* Adjust stack pointer */
292 li r0,0xc00+_end_back-SystemCall
293 cmplw 0, r0, r12 /* Check stack overflow */
304 li r12,0xc00+_back-SystemCall
313 mfmsr r11 /* Disable interrupts */
317 SYNC /* Some chip revs need this... */
321 li r12,0xd00-4 /* restore regs */
331 addi r12,r12,12 /* Adjust stack pointer */
339 STD_EXCEPTION(0xd00, SingleStep, UnknownException)
341 STD_EXCEPTION(0xe00, Trap_0e, UnknownException)
342 STD_EXCEPTION(0xf00, Trap_0f, UnknownException)
344 /* On the MPC8xx, this is a software emulation interrupt. It occurs
345 * for all unimplemented and illegal instructions.
347 STD_EXCEPTION(0x1000, SoftEmu, SoftEmuException)
349 STD_EXCEPTION(0x1100, InstructionTLBMiss, UnknownException)
350 STD_EXCEPTION(0x1200, DataTLBMiss, UnknownException)
351 STD_EXCEPTION(0x1300, InstructionTLBError, UnknownException)
352 STD_EXCEPTION(0x1400, DataTLBError, UnknownException)
354 STD_EXCEPTION(0x1500, Reserved5, UnknownException)
355 STD_EXCEPTION(0x1600, Reserved6, UnknownException)
356 STD_EXCEPTION(0x1700, Reserved7, UnknownException)
357 STD_EXCEPTION(0x1800, Reserved8, UnknownException)
358 STD_EXCEPTION(0x1900, Reserved9, UnknownException)
359 STD_EXCEPTION(0x1a00, ReservedA, UnknownException)
360 STD_EXCEPTION(0x1b00, ReservedB, UnknownException)
362 STD_EXCEPTION(0x1c00, DataBreakpoint, UnknownException)
363 STD_EXCEPTION(0x1d00, InstructionBreakpoint, DebugException)
364 STD_EXCEPTION(0x1e00, PeripheralBreakpoint, UnknownException)
365 STD_EXCEPTION(0x1f00, DevPortBreakpoint, UnknownException)
368 .globl _end_of_vectors
375 * This code finishes saving the registers to the exception frame
376 * and jumps to the appropriate handler for the exception.
377 * Register r21 is pointer into trap frame, r1 has new stack pointer.
379 .globl transfer_to_handler
390 andi. r24,r23,0x3f00 /* get vector offset */
394 mtspr SPRG2,r22 /* r1 is now kernel sp */
395 lwz r24,0(r23) /* virtual address of handler */
396 lwz r23,4(r23) /* where to go when done */
401 rfi /* jump to handler, enable MMU */
404 mfmsr r28 /* Disable interrupts */
408 SYNC /* Some chip revs need this... */
423 lwz r2,_NIP(r1) /* Restore environment */
444 .globl icache_disable
447 lis r3, IDC_DISABLE@h
454 srwi r3, r3, 31 /* >>31 => select bit 0 */
463 lis r3, 0x0400 /* Set cache mode with MMU off */
477 .globl dcache_disable
480 lis r3, IDC_DISABLE@h
489 srwi r3, r3, 31 /* >>31 => select bit 0 */
499 * unsigned int get_immr (unsigned int mask)
501 * return (mask ? (IMMR & mask) : IMMR);
505 mr r4,r3 /* save mask */
506 mfspr r3, IMMR /* IMMR */
507 cmpwi 0,r4,0 /* mask != 0 ? */
509 and r3,r3,r4 /* IMMR & mask */
550 /*------------------------------------------------------------------------------*/
553 * void relocate_code (addr_sp, gd, addr_moni)
555 * This "function" does not return, instead it continues in RAM
556 * after relocating the monitor code.
560 * r5 = length in bytes
565 mr r1, r3 /* Set new stack pointer */
566 mr r9, r4 /* Save copy of Global Data pointer */
567 mr r10, r5 /* Save copy of Destination Address */
569 mr r3, r5 /* Destination Address */
570 lis r4, CFG_MONITOR_BASE@h /* Source Address */
571 ori r4, r4, CFG_MONITOR_BASE@l
572 lwz r5, GOT(__init_end)
574 li r6, CFG_CACHELINE_SIZE /* Cache Line Size */
579 * New GOT-PTR = (old GOT-PTR - CFG_MONITOR_BASE) + Destination Address
585 /* First our own GOT */
587 /* then the one used by the C code */
597 beq cr1,4f /* In place copy is not necessary */
598 beq 7f /* Protect against 0 count */
617 * Now flush the cache: note that we must start from a cache aligned
618 * address. Otherwise we might miss one cache line.
622 beq 7f /* Always flush prefetch queue in any case */
630 sync /* Wait for all dcbst to complete on bus */
636 7: sync /* Wait for all icbi to complete on bus */
640 * We are done. Do not return, instead branch to second part of board
641 * initialization, now running from RAM.
644 addi r0, r10, in_ram - _start + EXC_OFF_SYS_RESET
651 * Relocation Function, r14 point to got2+0x8000
653 * Adjust got2 pointers, no need to check for 0, this code
654 * already puts a few entries in the table.
656 li r0,__got2_entries@sectoff@l
657 la r3,GOT(_GOT2_TABLE_)
658 lwz r11,GOT(_GOT2_TABLE_)
668 * Now adjust the fixups and the pointers to the fixups
669 * in case we need to move ourselves again.
671 2: li r0,__fixup_entries@sectoff@l
672 lwz r3,GOT(_FIXUP_TABLE_)
686 * Now clear BSS segment
688 lwz r3,GOT(__bss_start)
689 #if defined(CONFIG_FADS) || defined(CONFIG_ICU862)
691 * For the FADS - the environment is the very last item in flash.
692 * The real .bss stops just before environment starts, so only
693 * clear up to that point.
695 lwz r4,GOT(environment)
711 mr r3, r9 /* Global Data pointer */
712 mr r4, r10 /* Destination Address */
716 * Copy exception vector code to low memory
719 * r7: source address, r8: end address, r9: target address
724 lwz r8, GOT(_end_of_vectors)
726 li r9, 0x100 /* reset vector always at 0x100 */
729 bgelr /* return if r7>=r8 - just in case */
731 mflr r4 /* save link register */
741 * relocate `hdlr' and `int_return' entries
743 li r7, .L_MachineCheck - _start + EXC_OFF_SYS_RESET
744 li r8, Alignment - _start + EXC_OFF_SYS_RESET
747 addi r7, r7, 0x100 /* next exception vector */
751 li r7, .L_Alignment - _start + EXC_OFF_SYS_RESET
754 li r7, .L_ProgramCheck - _start + EXC_OFF_SYS_RESET
757 li r7, .L_FPUnavailable - _start + EXC_OFF_SYS_RESET
758 li r8, SystemCall - _start + EXC_OFF_SYS_RESET
761 addi r7, r7, 0x100 /* next exception vector */
765 li r7, .L_SingleStep - _start + EXC_OFF_SYS_RESET
766 li r8, _end_of_vectors - _start + EXC_OFF_SYS_RESET
769 addi r7, r7, 0x100 /* next exception vector */
773 mtlr r4 /* restore link register */
777 * Function: relocate entries for one exception vector
780 lwz r0, 0(r7) /* hdlr ... */
781 add r0, r0, r3 /* ... += dest_addr */
784 lwz r0, 4(r7) /* int_return ... */
785 add r0, r0, r3 /* ... += dest_addr */