2 * Copyright 2008 Freescale Semiconductor.
4 * See file CREDITS for list of people who contributed to this
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation; either version 2 of
10 * the License, or (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
24 #include <asm/processor.h>
30 DECLARE_GLOBAL_DATA_PTR;
34 return mfspr(SPRN_PIR);
39 volatile ccsr_pic_t *pic = (void *)(CFG_MPC85xx_PIC_ADDR);
40 out_be32(&pic->pir, 1 << nr);
41 (void)in_be32(&pic->pir);
42 out_be32(&pic->pir, 0x0);
47 int cpu_status(int nr)
49 u32 *table, id = get_my_id();
52 table = (u32 *)get_spin_addr();
53 printf("table base @ 0x%08x\n", table);
55 table = (u32 *)get_spin_addr() + nr * NUM_BOOT_ENTRY;
56 printf("Running on cpu %d\n", id);
58 printf("table @ 0x%08x:\n", table);
59 printf(" addr - 0x%08x\n", table[BOOT_ENTRY_ADDR_LOWER]);
60 printf(" pir - 0x%08x\n", table[BOOT_ENTRY_PIR]);
61 printf(" r3 - 0x%08x\n", table[BOOT_ENTRY_R3_LOWER]);
62 printf(" r6 - 0x%08x\n", table[BOOT_ENTRY_R6_LOWER]);
68 static u8 boot_entry_map[4] = {
75 int cpu_release(int nr, int argc, char *argv[])
77 u32 i, val, *table = (u32 *)get_spin_addr() + nr * NUM_BOOT_ENTRY;
80 if (nr == get_my_id()) {
81 printf("Invalid to release the boot core.\n\n");
86 printf("Invalid number of arguments to release.\n\n");
90 #ifdef CFG_64BIT_STRTOUL
91 boot_addr = simple_strtoull(argv[0], NULL, 16);
93 boot_addr = simple_strtoul(argv[0], NULL, 16);
96 /* handle pir, r3, r6 */
97 for (i = 1; i < 4; i++) {
98 if (argv[i][0] != '-') {
99 u8 entry = boot_entry_map[i];
100 val = simple_strtoul(argv[i], NULL, 16);
105 table[BOOT_ENTRY_ADDR_UPPER] = (u32)(boot_addr >> 32);
106 table[BOOT_ENTRY_ADDR_LOWER] = (u32)(boot_addr & 0xffffffff);
111 ulong get_spin_addr(void)
113 extern ulong __secondary_start_page;
114 extern ulong __spin_table;
117 (ulong)&__spin_table - (ulong)&__secondary_start_page;
123 static void pq3_mp_up(unsigned long bootpg)
125 u32 up, cpu_up_mask, whoami;
126 u32 *table = (u32 *)get_spin_addr();
128 volatile ccsr_local_ecm_t *ecm = (void *)(CFG_MPC85xx_ECM_ADDR);
129 volatile ccsr_gur_t *gur = (void *)(CFG_MPC85xx_GUTS_ADDR);
130 volatile ccsr_pic_t *pic = (void *)(CFG_MPC85xx_PIC_ADDR);
134 whoami = in_be32(&pic->whoami);
135 out_be32(&ecm->bptr, 0x80000000 | (bootpg >> 12));
137 /* disable time base at the platform */
138 devdisr = in_be32(&gur->devdisr);
140 devdisr |= MPC85xx_DEVDISR_TB0;
142 devdisr |= MPC85xx_DEVDISR_TB1;
143 out_be32(&gur->devdisr, devdisr);
145 /* release the hounds */
146 up = ((1 << CONFIG_NR_CPUS) - 1);
147 bpcr = in_be32(&ecm->eebpcr);
149 out_be32(&ecm->eebpcr, bpcr);
150 asm("sync; isync; msync");
152 cpu_up_mask = 1 << whoami;
153 /* wait for everyone */
156 for (i = 1; i < CONFIG_NR_CPUS; i++) {
157 if (table[i * NUM_BOOT_ENTRY])
158 cpu_up_mask |= (1 << i);
161 if ((cpu_up_mask & up) == up)
168 /* enable time base at the platform */
170 devdisr |= MPC85xx_DEVDISR_TB1;
172 devdisr |= MPC85xx_DEVDISR_TB0;
173 out_be32(&gur->devdisr, devdisr);
177 devdisr &= ~(MPC85xx_DEVDISR_TB0 | MPC85xx_DEVDISR_TB1);
178 out_be32(&gur->devdisr, devdisr);
181 void cpu_mp_lmb_reserve(struct lmb *lmb)
185 /* if we have 4G or more of memory, put the boot page at 4Gb-4k */
186 if ((u64)gd->ram_size > 0xfffff000)
189 bootpg = gd->ram_size - 4096;
191 lmb_reserve(lmb, bootpg, 4096);
196 extern ulong __secondary_start_page;
197 ulong fixup = (ulong)&__secondary_start_page;
200 /* if we have 4G or more of memory, put the boot page at 4Gb-4k */
201 if ((u64)gd->ram_size > 0xfffff000)
204 bootpg = gd->ram_size - 4096;
206 memcpy((void *)bootpg, (void *)fixup, 4096);
207 flush_cache(bootpg, 4096);