2 * Copyright 2004 Freescale Semiconductor, Inc.
4 * See file CREDITS for list of people who contributed to this
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation; either version 2 of
10 * the License, or (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
24 * 20050101: Eran Liberty (liberty@freescale.com)
25 * Initial file creating (porting from 85XX & 8260)
29 * CPU specific code for the MPC83xx family.
31 * Derived from the MPC8260 and MPC85xx.
38 #include <asm/processor.h>
43 DECLARE_GLOBAL_DATA_PTR;
44 ulong clock = gd->cpu_clk;
48 if ((pvr & 0xFFFF0000) != PVR_83xx) {
49 puts("Not MPC83xx Family!!!\n");
53 puts("CPU: MPC83xx, ");
60 puts("Rev: Unknown\n");
61 return -1; /* Not sure what this is */
63 printf("Rev: %02x at %s MHz\n",pvr & 0x0000FFFF, strmhz(buf, clock));
68 void upmconfig (uint upm, uint *table, uint size)
70 hang(); /* FIXME: upconfig() needed? */
75 do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
82 volatile immap_t *immap = (immap_t *) CFG_IMMRBAR;
85 /* Interrupts and MMU off */
86 __asm__ __volatile__ ("mfmsr %0":"=r" (msr):);
88 msr &= ~( MSR_EE | MSR_IR | MSR_DR);
89 __asm__ __volatile__ ("mtmsr %0"::"r" (msr));
91 /* enable Reset Control Reg */
92 immap->reset.rpr = 0x52535445;
94 /* confirm Reset Control Reg is enabled */
95 while(!((immap->reset.rcer) & RCER_CRE));
97 printf("Resetting the board.");
102 /* perform reset, only one bit */
103 immap->reset.rcr = RCR_SWHR;
105 #else /* ! MPC83xx_RESET */
107 immap->reset.rmr = RMR_CSRE; /* Checkstop Reset enable */
109 /* Interrupts and MMU off */
110 __asm__ __volatile__ ("mfmsr %0":"=r" (msr):);
112 msr &= ~(MSR_ME | MSR_EE | MSR_IR | MSR_DR);
113 __asm__ __volatile__ ("mtmsr %0"::"r" (msr));
116 * Trying to execute the next instruction at a non-existing address
117 * should cause a machine check, resulting in reset
119 addr = CFG_RESET_ADDRESS;
121 printf("resetting the board.");
123 ((void (*)(void)) addr) ();
124 #endif /* MPC83xx_RESET */
131 * Get timebase clock frequency (like cpu_clk in Hz)
134 unsigned long get_tbclk(void)
136 DECLARE_GLOBAL_DATA_PTR;
140 tbclk = (gd->bus_clk + 3L) / 4L;
146 #if defined(CONFIG_WATCHDOG)
147 void watchdog_reset (void)
149 hang(); /* FIXME: implement watchdog_reset()? */
151 #endif /* CONFIG_WATCHDOG */