2 * (C) Copyright 2004, Freescale, Inc
3 * TsiChung Liew, Tsi-Chung.Liew@freescale.com.
5 * See file CREDITS for list of people who contributed to this
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
26 * Minimal serial functions needed to use one of the PSC ports
27 * as serial console interface.
33 #define PSC_BASE MMAP_PSC1
35 #if defined(CONFIG_PSC_CONSOLE)
36 int psc_serial_init (void)
38 DECLARE_GLOBAL_DATA_PTR;
39 volatile psc8220_t *psc = (psc8220_t *) PSC_BASE;
42 /* write to SICR: SIM2 = uart mode,dcd does not affect rx */
47 /* write to CSR: RX/TX baud rate from timers */
48 psc->sr_csr = 0xdd000000;
50 psc->mr1_2 = PSC_MR1_BITS_CHAR_8 | PSC_MR1_NO_PARITY | PSC_MR2_STOP_BITS_1;
52 /* Setting up BaudRate */
53 counter = ((gd->bus_clk / gd->baudrate)) >> 5;
56 /* write to CTUR: divide counter upper byte */
57 psc->ctur = ((counter & 0xff00) << 16);
58 /* write to CTLR: divide counter lower byte */
59 psc->ctlr = ((counter & 0x00ff) << 24);
61 psc->cr = PSC_CR_RST_RX_CMD;
62 psc->cr = PSC_CR_RST_TX_CMD;
63 psc->cr = PSC_CR_RST_ERR_STS_CMD;
64 psc->cr = PSC_CR_RST_BRK_INT_CMD;
65 psc->cr = PSC_CR_RST_MR_PTR_CMD;
67 psc->cr = PSC_CR_RX_ENABLE | PSC_CR_TX_ENABLE;
71 void psc_serial_putc (const char c)
73 volatile psc8220_t *psc = (psc8220_t *) PSC_BASE;
78 /* Wait for last character to go. */
79 while (!(psc->sr_csr & PSC_SR_TXRDY));
84 void psc_serial_puts (const char *s)
91 int psc_serial_getc (void)
93 volatile psc8220_t *psc = (psc8220_t *) PSC_BASE;
95 /* Wait for a character to arrive. */
96 while (!(psc->sr_csr & PSC_SR_RXRDY));
97 return psc->xmitbuf[2];
100 int psc_serial_tstc (void)
102 volatile psc8220_t *psc = (psc8220_t *) PSC_BASE;
104 return (psc->sr_csr & PSC_SR_RXRDY);
107 void psc_serial_setbrg (void)
109 DECLARE_GLOBAL_DATA_PTR;
111 volatile psc8220_t *psc = (psc8220_t *) PSC_BASE;
114 counter = ((gd->bus_clk / gd->baudrate)) >> 5;
117 /* write to CTUR: divide counter upper byte */
118 psc->ctur = ((counter & 0xff00) << 16);
119 /* write to CTLR: divide counter lower byte */
120 psc->ctlr = ((counter & 0x00ff) << 24);
122 psc->cr = PSC_CR_RST_RX_CMD;
123 psc->cr = PSC_CR_RST_TX_CMD;
125 psc->cr = PSC_CR_RX_ENABLE | PSC_CR_TX_ENABLE;
127 #endif /* CONFIG_PSC_CONSOLE */