2 * Copyright (C) 1998 Dan Malek <dmalek@jlc.net>
3 * Copyright (C) 1999 Magnus Damm <kieraypc01.p.y.kie.era.ericsson.se>
4 * Copyright (C) 2000, 2001, 2002, 2007 Wolfgang Denk <wd@denx.de>
5 * Copyright Freescale Semiconductor, Inc. 2004, 2006. All rights reserved.
7 * See file CREDITS for list of people who contributed to this
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25 * Based on the MPC83xx code.
29 * U-Boot - Startup Code for MPC512x based Embedded Boards
34 #include <timestamp.h>
37 #define CONFIG_521X 1 /* needed for Linux kernel header files*/
39 #include <ppc_asm.tmpl>
42 #include <asm/cache.h>
45 #ifndef CONFIG_IDENT_STRING
46 #define CONFIG_IDENT_STRING "MPC512X"
50 * Floating Point enable, Machine Check and Recoverable Interr.
54 #define MSR_KERNEL (MSR_FP|MSR_RI)
56 #define MSR_KERNEL (MSR_FP|MSR_ME|MSR_RI)
59 /* Macros for manipulating CSx_START/STOP */
60 #define START_REG(start) ((start) >> 16)
61 #define STOP_REG(start, size) (((start) + (size) - 1) >> 16)
64 * Set up GOT: Global Offset Table
66 * Use r14 to access the GOT
69 GOT_ENTRY(_GOT2_TABLE_)
70 GOT_ENTRY(_FIXUP_TABLE_)
73 GOT_ENTRY(_start_of_vectors)
74 GOT_ENTRY(_end_of_vectors)
75 GOT_ENTRY(transfer_to_handler)
79 GOT_ENTRY(__bss_start)
83 * Magic number and version string
85 .long 0x27051956 /* U-Boot Magic Number */
89 .ascii " (", U_BOOT_DATE, " - ", U_BOOT_TIME, ")"
90 .ascii " ", CONFIG_IDENT_STRING, "\0"
99 /* Start from here after reset/power on */
101 li r21, BOOTFLAG_COLD /* Normal Power-On: Boot from FLASH */
104 .globl _start_of_vectors
108 STD_EXCEPTION(0x200, MachineCheck, MachineCheckException)
110 /* Data Storage exception. */
111 STD_EXCEPTION(0x300, DataStorage, UnknownException)
113 /* Instruction Storage exception. */
114 STD_EXCEPTION(0x400, InstStorage, UnknownException)
116 /* External Interrupt exception. */
117 STD_EXCEPTION(0x500, ExtInterrupt, UnknownException)
119 /* Alignment exception. */
122 EXCEPTION_PROLOG(SRR0, SRR1)
127 addi r3,r1,STACK_FRAME_OVERHEAD
129 rlwimi r20,r23,0,16,16 /* copy EE bit from saved MSR */
130 rlwimi r20,r23,0,25,25 /* copy IP bit from saved MSR */
131 lwz r6,GOT(transfer_to_handler)
135 .long AlignmentException - _start + EXC_OFF_SYS_RESET
136 .long int_return - _start + EXC_OFF_SYS_RESET
138 /* Program check exception */
141 EXCEPTION_PROLOG(SRR0, SRR1)
142 addi r3,r1,STACK_FRAME_OVERHEAD
144 rlwimi r20,r23,0,16,16 /* copy EE bit from saved MSR */
145 rlwimi r20,r23,0,25,25 /* copy IP bit from saved MSR */
146 lwz r6,GOT(transfer_to_handler)
150 .long ProgramCheckException - _start + EXC_OFF_SYS_RESET
151 .long int_return - _start + EXC_OFF_SYS_RESET
153 /* Floating Point Unit unavailable exception */
154 STD_EXCEPTION(0x800, FPUnavailable, UnknownException)
157 STD_EXCEPTION(0x900, Decrementer, timer_interrupt)
159 /* Critical interrupt */
160 STD_EXCEPTION(0xa00, Critical, UnknownException)
163 STD_EXCEPTION(0xc00, SystemCall, UnknownException)
165 /* Trace interrupt */
166 STD_EXCEPTION(0xd00, Trace, UnknownException)
168 /* Performance Monitor interrupt */
169 STD_EXCEPTION(0xf00, PerfMon, UnknownException)
171 /* Intruction Translation Miss */
172 STD_EXCEPTION(0x1000, InstructionTLBMiss, UnknownException)
174 /* Data Load Translation Miss */
175 STD_EXCEPTION(0x1100, DataLoadTLBMiss, UnknownException)
177 /* Data Store Translation Miss */
178 STD_EXCEPTION(0x1200, DataStoreTLBMiss, UnknownException)
180 /* Instruction Address Breakpoint */
181 STD_EXCEPTION(0x1300, InstructionAddrBreakpoint, DebugException)
183 /* System Management interrupt */
184 STD_EXCEPTION(0x1400, SystemMgmtInterrupt, UnknownException)
186 .globl _end_of_vectors
191 /* Save msr contents */
194 /* Set IMMR area to our preferred location */
195 lis r4, CONFIG_DEFAULT_IMMR@h
196 lis r3, CONFIG_SYS_IMMR@h
197 ori r3, r3, CONFIG_SYS_IMMR@l
199 mtspr MBAR, r3 /* IMMRBAR is mirrored into the MBAR SPR (311) */
201 /* Initialise the machine */
205 * Set up Local Access Windows:
207 * 1) Boot/CS0 (boot FLASH)
208 * 2) On-chip SRAM (initial stack purposes)
211 /* Boot CS/CS0 window range */
212 lis r3, CONFIG_SYS_IMMR@h
213 ori r3, r3, CONFIG_SYS_IMMR@l
215 lis r4, START_REG(CONFIG_SYS_FLASH_BASE)
216 ori r4, r4, STOP_REG(CONFIG_SYS_FLASH_BASE, CONFIG_SYS_FLASH_SIZE)
220 * The SRAM window has a fixed size (256K), so only the start address
223 lis r4, START_REG(CONFIG_SYS_SRAM_BASE) & 0xff00
227 * According to MPC5121e RM, configuring local access windows should
228 * be followed by a dummy read of the config register that was
229 * modified last and an isync
235 * Set configuration of the Boot/CS0, the SRAM window does not have a
236 * config register so no params can be set for it
238 lis r3, (CONFIG_SYS_IMMR + LPC_OFFSET)@h
239 ori r3, r3, (CONFIG_SYS_IMMR + LPC_OFFSET)@l
241 lis r4, CONFIG_SYS_CS0_CFG@h
242 ori r4, r4, CONFIG_SYS_CS0_CFG@l
243 stw r4, CS0_CONFIG(r3)
245 /* Master enable all CS's */
247 ori r4, r4, CS_CTRL_ME@l
250 lis r4, (CONFIG_SYS_MONITOR_BASE)@h
251 ori r4, r4, (CONFIG_SYS_MONITOR_BASE)@l
252 addi r5, r4, in_flash - _start + EXC_OFF_SYS_RESET
257 lis r1, (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET)@h
258 ori r1, r1, (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET)@l
260 li r0, 0 /* Make room for stack frame header and */
261 stwu r0, -4(r1) /* clear final stack frame so that */
262 stwu r0, -4(r1) /* stack backtraces terminate cleanly */
264 /* let the C-code set up the rest */
266 /* Be careful to keep code relocatable & stack humble */
267 /*------------------------------------------------------*/
269 GET_GOT /* initialize GOT access */
272 lis r3, CONFIG_SYS_IMMR@h
273 /* run low-level CPU init code (in Flash) */
278 /* run 1st part of board init code (in Flash) */
281 /* NOTREACHED - board_init_f() does not return */
284 * This code finishes saving the registers to the exception frame
285 * and jumps to the appropriate handler for the exception.
286 * Register r21 is pointer into trap frame, r1 has new stack pointer.
288 .globl transfer_to_handler
299 andi. r24,r23,0x3f00 /* get vector offset */
303 lwz r24,0(r23) /* virtual address of handler */
304 lwz r23,4(r23) /* where to go when done */
309 rfi /* jump to handler, enable MMU */
312 mfmsr r28 /* Disable interrupts */
316 SYNC /* Some chip revs need this... */
331 lwz r2,_NIP(r1) /* Restore environment */
342 * This code initialises the machine, it expects original MSR contents to be in r5.
345 /* Initialize machine status; enable machine check interrupt */
346 /*-----------------------------------------------------------*/
348 li r3, MSR_KERNEL /* Set ME and RI flags */
349 rlwimi r3, r5, 0, 25, 25 /* preserve IP bit */
351 rlwimi r3, r5, 0, 21, 22 /* debugger might set SE, BE bits */
355 mtspr SRR1, r3 /* Mirror current MSR state in SRR1 */
357 lis r3, CONFIG_SYS_IMMR@h
359 #if defined(CONFIG_WATCHDOG)
360 /* Initialise the watchdog and reset it */
361 /*--------------------------------------*/
362 lis r4, CONFIG_SYS_WATCHDOG_VALUE
363 ori r4, r4, (SWCRR_SWEN | SWCRR_SWRI | SWCRR_SWPR)
373 /* Disable the watchdog */
374 /*----------------------*/
377 * Check to see if it's enabled for disabling: once disabled by s/w
378 * it's not possible to re-enable it
385 #endif /* CONFIG_WATCHDOG */
387 /* Initialize the Hardware Implementation-dependent Registers */
388 /* HID0 also contains cache control */
389 /*------------------------------------------------------*/
390 lis r3, CONFIG_SYS_HID0_INIT@h
391 ori r3, r3, CONFIG_SYS_HID0_INIT@l
395 lis r3, CONFIG_SYS_HID0_FINAL@h
396 ori r3, r3, CONFIG_SYS_HID0_FINAL@l
400 lis r3, CONFIG_SYS_HID2@h
401 ori r3, r3, CONFIG_SYS_HID2@l
410 * Note: requires that all cache bits in
411 * HID0 are in the low half word.
418 ori r4, r4, HID0_ILOCK
420 ori r4, r3, HID0_ICFI
422 mtspr HID0, r4 /* sets enable and invalidate, clears lock */
424 mtspr HID0, r3 /* clears invalidate */
427 .globl icache_disable
431 ori r4, r4, HID0_ICE|HID0_ILOCK
433 ori r4, r3, HID0_ICFI
435 mtspr HID0, r4 /* sets invalidate, clears enable and lock*/
437 mtspr HID0, r3 /* clears invalidate */
443 rlwinm r3, r3, (31 - HID0_ICE_SHIFT + 1), 31, 31
449 li r5, HID0_DCFI|HID0_DLOCK
451 mtspr HID0, r3 /* no invalidate, unlock */
453 ori r5, r3, HID0_DCFI
454 mtspr HID0, r5 /* enable + invalidate */
455 mtspr HID0, r3 /* enable */
459 .globl dcache_disable
463 ori r4, r4, HID0_DCE|HID0_DLOCK
467 mtspr HID0, r4 /* sets invalidate, clears enable and lock */
469 mtspr HID0, r3 /* clears invalidate */
475 rlwinm r3, r3, (31 - HID0_DCE_SHIFT + 1), 31, 31
483 /*-------------------------------------------------------------------*/
486 * void relocate_code (addr_sp, gd, addr_moni)
488 * This "function" does not return, instead it continues in RAM
489 * after relocating the monitor code.
493 * r5 = length in bytes
498 mr r1, r3 /* Set new stack pointer */
499 mr r9, r4 /* Save copy of Global Data pointer */
500 mr r10, r5 /* Save copy of Destination Address */
502 mr r3, r5 /* Destination Address */
503 lis r4, CONFIG_SYS_MONITOR_BASE@h /* Source Address */
504 ori r4, r4, CONFIG_SYS_MONITOR_BASE@l
505 lwz r5, GOT(__init_end)
507 li r6, CONFIG_SYS_CACHELINE_SIZE /* Cache Line Size */
512 * New GOT-PTR = (old GOT-PTR - CONFIG_SYS_MONITOR_BASE)
513 * + Destination Address
519 /* First our own GOT */
521 /* then the one used by the C code */
530 beq cr1,4f /* In place copy is not necessary */
531 beq 7f /* Protect against 0 count */
560 2: slwi r0,r0,2 /* re copy in reverse order ... y do we needed it? */
568 * Now flush the cache: note that we must start from a cache aligned
569 * address. Otherwise we might miss one cache line.
573 beq 7f /* Always flush prefetch queue in any case */
581 sync /* Wait for all dcbst to complete on bus */
587 7: sync /* Wait for all icbi to complete on bus */
591 * We are done. Do not return, instead branch to second part of board
592 * initialization, now running from RAM.
594 addi r0, r10, in_ram - _start + EXC_OFF_SYS_RESET
600 * Relocation Function, r14 point to got2+0x8000
602 * Adjust got2 pointers, no need to check for 0, this code
603 * already puts a few entries in the table.
605 li r0,__got2_entries@sectoff@l
606 la r3,GOT(_GOT2_TABLE_)
607 lwz r11,GOT(_GOT2_TABLE_)
617 * Now adjust the fixups and the pointers to the fixups
618 * in case we need to move ourselves again.
620 2: li r0,__fixup_entries@sectoff@l
621 lwz r3,GOT(_FIXUP_TABLE_)
635 * Now clear BSS segment
637 lwz r3,GOT(__bss_start)
650 mr r3, r9 /* Global Data pointer */
651 mr r4, r10 /* Destination Address */
655 * Copy exception vector code to low memory
658 * r7: source address, r8: end address, r9: target address
663 lwz r8, GOT(_end_of_vectors)
665 li r9, 0x100 /* reset vector at 0x100 */
668 bgelr /* return if r7>=r8 - just in case */
670 mflr r4 /* save link register */
680 * relocate `hdlr' and `int_return' entries
682 li r7, .L_MachineCheck - _start + EXC_OFF_SYS_RESET
683 li r8, Alignment - _start + EXC_OFF_SYS_RESET
686 addi r7, r7, 0x100 /* next exception vector */
690 li r7, .L_Alignment - _start + EXC_OFF_SYS_RESET
693 li r7, .L_ProgramCheck - _start + EXC_OFF_SYS_RESET
696 li r7, .L_FPUnavailable - _start + EXC_OFF_SYS_RESET
697 li r8, SystemCall - _start + EXC_OFF_SYS_RESET
700 addi r7, r7, 0x100 /* next exception vector */
704 li r7, .L_Trace - _start + EXC_OFF_SYS_RESET
705 li r8, _end_of_vectors - _start + EXC_OFF_SYS_RESET
708 addi r7, r7, 0x100 /* next exception vector */
712 mfmsr r3 /* now that the vectors have */
713 lis r7, MSR_IP@h /* relocated into low memory */
714 ori r7, r7, MSR_IP@l /* MSR[IP] can be turned off */
715 andc r3, r3, r7 /* (if it was on) */
716 SYNC /* Some chip revs need this... */
720 mtlr r4 /* restore link register */
724 * Function: relocate entries for one exception vector
727 lwz r0, 0(r7) /* hdlr ... */
728 add r0, r0, r3 /* ... += dest_addr */
731 lwz r0, 4(r7) /* int_return ... */
732 add r0, r0, r3 /* ... += dest_addr */