2 * Copyright (C) 1998 Dan Malek <dmalek@jlc.net>
3 * Copyright (C) 1999 Magnus Damm <kieraypc01.p.y.kie.era.ericsson.se>
4 * Copyright (C) 2000-2009 Wolfgang Denk <wd@denx.de>
5 * Copyright Freescale Semiconductor, Inc. 2004, 2006.
7 * See file CREDITS for list of people who contributed to this
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25 * Based on the MPC83xx code.
29 * U-Boot - Startup Code for MPC512x based Embedded Boards
33 #include <timestamp.h>
36 #define CONFIG_521X 1 /* needed for Linux kernel header files*/
38 #include <asm/immap_512x.h>
39 #include "asm-offsets.h"
41 #include <ppc_asm.tmpl>
44 #include <asm/cache.h>
47 #ifndef CONFIG_IDENT_STRING
48 #define CONFIG_IDENT_STRING "MPC512X"
52 * Floating Point enable, Machine Check and Recoverable Interr.
56 #define MSR_KERNEL (MSR_FP|MSR_RI)
58 #define MSR_KERNEL (MSR_FP|MSR_ME|MSR_RI)
61 /* Macros for manipulating CSx_START/STOP */
62 #define START_REG(start) ((start) >> 16)
63 #define STOP_REG(start, size) (((start) + (size) - 1) >> 16)
66 * Set up GOT: Global Offset Table
68 * Use r14 to access the GOT
71 GOT_ENTRY(_GOT2_TABLE_)
72 GOT_ENTRY(_FIXUP_TABLE_)
75 GOT_ENTRY(_start_of_vectors)
76 GOT_ENTRY(_end_of_vectors)
77 GOT_ENTRY(transfer_to_handler)
81 GOT_ENTRY(__bss_start)
85 * Magic number and version string
87 .long 0x27051956 /* U-Boot Magic Number */
91 .ascii " (", U_BOOT_DATE, " - ", U_BOOT_TIME, ")"
92 .ascii " ", CONFIG_IDENT_STRING, "\0"
101 /* Start from here after reset/power on */
103 li r21, BOOTFLAG_COLD /* Normal Power-On: Boot from FLASH */
106 .globl _start_of_vectors
110 STD_EXCEPTION(0x200, MachineCheck, MachineCheckException)
112 /* Data Storage exception. */
113 STD_EXCEPTION(0x300, DataStorage, UnknownException)
115 /* Instruction Storage exception. */
116 STD_EXCEPTION(0x400, InstStorage, UnknownException)
118 /* External Interrupt exception. */
119 STD_EXCEPTION(0x500, ExtInterrupt, UnknownException)
121 /* Alignment exception. */
124 EXCEPTION_PROLOG(SRR0, SRR1)
129 addi r3,r1,STACK_FRAME_OVERHEAD
131 rlwimi r20,r23,0,16,16 /* copy EE bit from saved MSR */
132 rlwimi r20,r23,0,25,25 /* copy IP bit from saved MSR */
133 lwz r6,GOT(transfer_to_handler)
137 .long AlignmentException - _start + EXC_OFF_SYS_RESET
138 .long int_return - _start + EXC_OFF_SYS_RESET
140 /* Program check exception */
143 EXCEPTION_PROLOG(SRR0, SRR1)
144 addi r3,r1,STACK_FRAME_OVERHEAD
146 rlwimi r20,r23,0,16,16 /* copy EE bit from saved MSR */
147 rlwimi r20,r23,0,25,25 /* copy IP bit from saved MSR */
148 lwz r6,GOT(transfer_to_handler)
152 .long ProgramCheckException - _start + EXC_OFF_SYS_RESET
153 .long int_return - _start + EXC_OFF_SYS_RESET
155 /* Floating Point Unit unavailable exception */
156 STD_EXCEPTION(0x800, FPUnavailable, UnknownException)
159 STD_EXCEPTION(0x900, Decrementer, timer_interrupt)
161 /* Critical interrupt */
162 STD_EXCEPTION(0xa00, Critical, UnknownException)
165 STD_EXCEPTION(0xc00, SystemCall, UnknownException)
167 /* Trace interrupt */
168 STD_EXCEPTION(0xd00, Trace, UnknownException)
170 /* Performance Monitor interrupt */
171 STD_EXCEPTION(0xf00, PerfMon, UnknownException)
173 /* Intruction Translation Miss */
174 STD_EXCEPTION(0x1000, InstructionTLBMiss, UnknownException)
176 /* Data Load Translation Miss */
177 STD_EXCEPTION(0x1100, DataLoadTLBMiss, UnknownException)
179 /* Data Store Translation Miss */
180 STD_EXCEPTION(0x1200, DataStoreTLBMiss, UnknownException)
182 /* Instruction Address Breakpoint */
183 STD_EXCEPTION(0x1300, InstructionAddrBreakpoint, DebugException)
185 /* System Management interrupt */
186 STD_EXCEPTION(0x1400, SystemMgmtInterrupt, UnknownException)
188 .globl _end_of_vectors
193 /* Save msr contents */
196 /* Set IMMR area to our preferred location */
197 lis r4, CONFIG_DEFAULT_IMMR@h
198 lis r3, CONFIG_SYS_IMMR@h
199 ori r3, r3, CONFIG_SYS_IMMR@l
201 mtspr MBAR, r3 /* IMMRBAR is mirrored into the MBAR SPR (311) */
203 /* Initialise the machine */
207 * Set up Local Access Windows:
209 * 1) Boot/CS0 (boot FLASH)
210 * 2) On-chip SRAM (initial stack purposes)
213 /* Boot CS/CS0 window range */
214 lis r3, CONFIG_SYS_IMMR@h
215 ori r3, r3, CONFIG_SYS_IMMR@l
217 lis r4, START_REG(CONFIG_SYS_FLASH_BASE)
218 ori r4, r4, STOP_REG(CONFIG_SYS_FLASH_BASE, CONFIG_SYS_FLASH_SIZE)
222 * The SRAM window has a fixed size (256K), so only the start address
225 lis r4, START_REG(CONFIG_SYS_SRAM_BASE) & 0xff00
229 * According to MPC5121e RM, configuring local access windows should
230 * be followed by a dummy read of the config register that was
231 * modified last and an isync
237 * Set configuration of the Boot/CS0, the SRAM window does not have a
238 * config register so no params can be set for it
240 lis r3, (CONFIG_SYS_IMMR + LPC_OFFSET)@h
241 ori r3, r3, (CONFIG_SYS_IMMR + LPC_OFFSET)@l
243 lis r4, CONFIG_SYS_CS0_CFG@h
244 ori r4, r4, CONFIG_SYS_CS0_CFG@l
245 stw r4, CS0_CONFIG(r3)
247 /* Master enable all CS's */
249 ori r4, r4, CS_CTRL_ME@l
252 lis r4, (CONFIG_SYS_MONITOR_BASE)@h
253 ori r4, r4, (CONFIG_SYS_MONITOR_BASE)@l
254 addi r5, r4, in_flash - _start + EXC_OFF_SYS_RESET
259 lis r1, (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET)@h
260 ori r1, r1, (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET)@l
262 li r0, 0 /* Make room for stack frame header and */
263 stwu r0, -4(r1) /* clear final stack frame so that */
264 stwu r0, -4(r1) /* stack backtraces terminate cleanly */
266 /* let the C-code set up the rest */
268 /* Be careful to keep code relocatable & stack humble */
269 /*------------------------------------------------------*/
271 GET_GOT /* initialize GOT access */
274 lis r3, CONFIG_SYS_IMMR@h
275 /* run low-level CPU init code (in Flash) */
280 /* run 1st part of board init code (in Flash) */
283 /* NOTREACHED - board_init_f() does not return */
286 * This code finishes saving the registers to the exception frame
287 * and jumps to the appropriate handler for the exception.
288 * Register r21 is pointer into trap frame, r1 has new stack pointer.
290 .globl transfer_to_handler
301 andi. r24,r23,0x3f00 /* get vector offset */
305 lwz r24,0(r23) /* virtual address of handler */
306 lwz r23,4(r23) /* where to go when done */
311 rfi /* jump to handler, enable MMU */
314 mfmsr r28 /* Disable interrupts */
318 SYNC /* Some chip revs need this... */
333 lwz r2,_NIP(r1) /* Restore environment */
344 * This code initialises the machine, it expects original MSR contents to be in r5.
347 /* Initialize machine status; enable machine check interrupt */
348 /*-----------------------------------------------------------*/
350 li r3, MSR_KERNEL /* Set ME and RI flags */
351 rlwimi r3, r5, 0, 25, 25 /* preserve IP bit */
353 rlwimi r3, r5, 0, 21, 22 /* debugger might set SE, BE bits */
357 mtspr SRR1, r3 /* Mirror current MSR state in SRR1 */
359 lis r3, CONFIG_SYS_IMMR@h
361 #if defined(CONFIG_WATCHDOG)
362 /* Initialise the watchdog and reset it */
363 /*--------------------------------------*/
364 lis r4, CONFIG_SYS_WATCHDOG_VALUE
365 ori r4, r4, (SWCRR_SWEN | SWCRR_SWRI | SWCRR_SWPR)
375 /* Disable the watchdog */
376 /*----------------------*/
379 * Check to see if it's enabled for disabling: once disabled by s/w
380 * it's not possible to re-enable it
387 #endif /* CONFIG_WATCHDOG */
389 /* Initialize the Hardware Implementation-dependent Registers */
390 /* HID0 also contains cache control */
391 /*------------------------------------------------------*/
392 lis r3, CONFIG_SYS_HID0_INIT@h
393 ori r3, r3, CONFIG_SYS_HID0_INIT@l
397 lis r3, CONFIG_SYS_HID0_FINAL@h
398 ori r3, r3, CONFIG_SYS_HID0_FINAL@l
402 lis r3, CONFIG_SYS_HID2@h
403 ori r3, r3, CONFIG_SYS_HID2@l
412 * Note: requires that all cache bits in
413 * HID0 are in the low half word.
420 ori r4, r4, HID0_ILOCK
422 ori r4, r3, HID0_ICFI
424 mtspr HID0, r4 /* sets enable and invalidate, clears lock */
426 mtspr HID0, r3 /* clears invalidate */
429 .globl icache_disable
433 ori r4, r4, HID0_ICE|HID0_ILOCK
435 ori r4, r3, HID0_ICFI
437 mtspr HID0, r4 /* sets invalidate, clears enable and lock*/
439 mtspr HID0, r3 /* clears invalidate */
445 rlwinm r3, r3, (31 - HID0_ICE_SHIFT + 1), 31, 31
451 li r5, HID0_DCFI|HID0_DLOCK
453 mtspr HID0, r3 /* no invalidate, unlock */
455 ori r5, r3, HID0_DCFI
456 mtspr HID0, r5 /* enable + invalidate */
457 mtspr HID0, r3 /* enable */
461 .globl dcache_disable
465 ori r4, r4, HID0_DCE|HID0_DLOCK
469 mtspr HID0, r4 /* sets invalidate, clears enable and lock */
471 mtspr HID0, r3 /* clears invalidate */
477 rlwinm r3, r3, (31 - HID0_DCE_SHIFT + 1), 31, 31
485 /*-------------------------------------------------------------------*/
488 * void relocate_code (addr_sp, gd, addr_moni)
490 * This "function" does not return, instead it continues in RAM
491 * after relocating the monitor code.
495 * r5 = length in bytes
500 mr r1, r3 /* Set new stack pointer */
501 mr r9, r4 /* Save copy of Global Data pointer */
502 mr r10, r5 /* Save copy of Destination Address */
504 mr r3, r5 /* Destination Address */
505 lis r4, CONFIG_SYS_MONITOR_BASE@h /* Source Address */
506 ori r4, r4, CONFIG_SYS_MONITOR_BASE@l
507 lwz r5, GOT(__init_end)
509 li r6, CONFIG_SYS_CACHELINE_SIZE /* Cache Line Size */
514 * New GOT-PTR = (old GOT-PTR - CONFIG_SYS_MONITOR_BASE)
515 * + Destination Address
521 /* First our own GOT */
523 /* then the one used by the C code */
532 beq cr1,4f /* In place copy is not necessary */
533 beq 7f /* Protect against 0 count */
562 2: slwi r0,r0,2 /* re copy in reverse order ... y do we needed it? */
570 * Now flush the cache: note that we must start from a cache aligned
571 * address. Otherwise we might miss one cache line.
575 beq 7f /* Always flush prefetch queue in any case */
583 sync /* Wait for all dcbst to complete on bus */
589 7: sync /* Wait for all icbi to complete on bus */
593 * We are done. Do not return, instead branch to second part of board
594 * initialization, now running from RAM.
596 addi r0, r10, in_ram - _start + EXC_OFF_SYS_RESET
602 * Relocation Function, r14 point to got2+0x8000
604 * Adjust got2 pointers, no need to check for 0, this code
605 * already puts a few entries in the table.
607 li r0,__got2_entries@sectoff@l
608 la r3,GOT(_GOT2_TABLE_)
609 lwz r11,GOT(_GOT2_TABLE_)
619 * Now adjust the fixups and the pointers to the fixups
620 * in case we need to move ourselves again.
622 2: li r0,__fixup_entries@sectoff@l
623 lwz r3,GOT(_FIXUP_TABLE_)
637 * Now clear BSS segment
639 lwz r3,GOT(__bss_start)
652 mr r3, r9 /* Global Data pointer */
653 mr r4, r10 /* Destination Address */
657 * Copy exception vector code to low memory
660 * r7: source address, r8: end address, r9: target address
665 lwz r8, GOT(_end_of_vectors)
667 li r9, 0x100 /* reset vector at 0x100 */
670 bgelr /* return if r7>=r8 - just in case */
672 mflr r4 /* save link register */
682 * relocate `hdlr' and `int_return' entries
684 li r7, .L_MachineCheck - _start + EXC_OFF_SYS_RESET
685 li r8, Alignment - _start + EXC_OFF_SYS_RESET
688 addi r7, r7, 0x100 /* next exception vector */
692 li r7, .L_Alignment - _start + EXC_OFF_SYS_RESET
695 li r7, .L_ProgramCheck - _start + EXC_OFF_SYS_RESET
698 li r7, .L_FPUnavailable - _start + EXC_OFF_SYS_RESET
699 li r8, SystemCall - _start + EXC_OFF_SYS_RESET
702 addi r7, r7, 0x100 /* next exception vector */
706 li r7, .L_Trace - _start + EXC_OFF_SYS_RESET
707 li r8, _end_of_vectors - _start + EXC_OFF_SYS_RESET
710 addi r7, r7, 0x100 /* next exception vector */
714 mfmsr r3 /* now that the vectors have */
715 lis r7, MSR_IP@h /* relocated into low memory */
716 ori r7, r7, MSR_IP@l /* MSR[IP] can be turned off */
717 andc r3, r3, r7 /* (if it was on) */
718 SYNC /* Some chip revs need this... */
722 mtlr r4 /* restore link register */
726 * Function: relocate entries for one exception vector
729 lwz r0, 0(r7) /* hdlr ... */
730 add r0, r0, r3 /* ... += dest_addr */
733 lwz r0, 4(r7) /* int_return ... */
734 add r0, r0, r3 /* ... += dest_addr */