2 * Copyright (C) 2004-2006 Freescale Semiconductor, Inc.
3 * (C) Copyright 2007 DENX Software Engineering
5 * See file CREDITS for list of people who contributed to this
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25 * CPU specific code for the MPC512x family.
27 * Derived from the MPC83xx code.
34 #include <asm/processor.h>
36 #if defined(CONFIG_OF_LIBFDT)
37 #include <fdt_support.h>
40 DECLARE_GLOBAL_DATA_PTR;
44 volatile immap_t *immr = (immap_t *) CFG_IMMR;
45 ulong clock = gd->cpu_clk;
47 u32 spridr = immr->sysconf.spridr;
52 switch (spridr & 0xffff0000) {
57 printf ("Unknown part ID %08x ", spridr & 0xffff0000);
59 printf ("rev. %d.%d, Core ", SVR_MJREV (spridr), SVR_MNREV (spridr));
61 switch (pvr & 0xffff0000) {
68 printf ("at %s MHz, CSB at %3d MHz\n", strmhz(buf, clock),
69 gd->csb_clk / 1000000);
75 do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
78 volatile immap_t *immap = (immap_t *) CFG_IMMR;
80 /* Interrupts and MMU off */
81 __asm__ __volatile__ ("mfmsr %0":"=r" (msr):);
83 msr &= ~( MSR_EE | MSR_IR | MSR_DR);
84 __asm__ __volatile__ ("mtmsr %0"::"r" (msr));
87 * Enable Reset Control Reg - "RSTE" is the magic word that let us go
89 immap->reset.rpr = 0x52535445;
91 /* Verify Reset Control Reg is enabled */
92 while (!((immap->reset.rcer) & RCER_CRE))
95 printf ("Resetting the board.\n");
99 immap->reset.rcr = RCR_SWHR;
107 * Get timebase clock frequency (like cpu_clk in Hz)
109 unsigned long get_tbclk (void)
113 tbclk = (gd->bus_clk + 3L) / 4L;
119 #if defined(CONFIG_WATCHDOG)
120 void watchdog_reset (void)
122 int re_enable = disable_interrupts ();
125 volatile immap_t *immr = (immap_t *) CFG_IMMR;
126 immr->wdt.swsrr = 0x556c;
127 immr->wdt.swsrr = 0xaa39;
130 enable_interrupts ();
134 #ifdef CONFIG_OF_LIBFDT
136 #ifdef CONFIG_OF_SUPPORT_OLD_DEVICE_TREES
138 * fdt setup for old device trees
144 static void old_ft_cpu_setup(void *blob, bd_t *bd)
147 * avoid fixing up by path because that
148 * produces scary error messages
152 * old device trees have ethernet nodes with
153 * device_type = "network"
155 do_fixup_by_prop(blob, "device_type", "network", 8,
156 "local-mac-address", bd->bi_enetaddr, 6, 0);
157 do_fixup_by_prop(blob, "device_type", "network", 8,
158 "address", bd->bi_enetaddr, 6, 0);
160 * old device trees have soc nodes with
161 * device_type = "soc"
163 do_fixup_by_prop_u32(blob, "device_type", "soc", 4,
164 "bus-frequency", bd->bi_ipsfreq, 0);
168 static void ft_clock_setup(void *blob, bd_t *bd)
170 char *cpu_path = "/cpus/" OF_CPU;
173 * fixup cpu clocks using path
175 do_fixup_by_path_u32(blob, cpu_path,
176 "timebase-frequency", OF_TBCLK, 1);
177 do_fixup_by_path_u32(blob, cpu_path,
178 "bus-frequency", bd->bi_busfreq, 1);
179 do_fixup_by_path_u32(blob, cpu_path,
180 "clock-frequency", bd->bi_intfreq, 1);
182 * fixup soc clocks using compatible
184 do_fixup_by_compat_u32(blob, OF_SOC_COMPAT,
185 "bus-frequency", bd->bi_ipsfreq, 1);
188 void ft_cpu_setup(void *blob, bd_t *bd)
190 #ifdef CONFIG_OF_SUPPORT_OLD_DEVICE_TREES
191 old_ft_cpu_setup(blob, bd);
193 ft_clock_setup(blob, bd);
194 #ifdef CONFIG_HAS_ETH0
195 fdt_fixup_ethernet(blob);
200 #ifdef CONFIG_MPC512x_FEC
201 /* Default initializations for FEC controllers. To override,
202 * create a board-specific function called:
203 * int board_eth_init(bd_t *bis)
206 int cpu_eth_init(bd_t *bis)
208 return mpc512x_fec_initialize(bis);