2 * Copyright (C) 2004-2006 Freescale Semiconductor, Inc.
3 * (C) Copyright 2007 DENX Software Engineering
5 * See file CREDITS for list of people who contributed to this
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25 * CPU specific code for the MPC512x family.
27 * Derived from the MPC83xx code.
35 #include <asm/processor.h>
37 #if defined(CONFIG_OF_LIBFDT)
38 #include <fdt_support.h>
41 DECLARE_GLOBAL_DATA_PTR;
45 volatile immap_t *immr = (immap_t *) CONFIG_SYS_IMMR;
46 ulong clock = gd->cpu_clk;
48 u32 spridr = immr->sysconf.spridr;
49 char buf1[32], buf2[32];
53 switch (spridr & 0xffff0000) {
58 printf ("Unknown part ID %08x ", spridr & 0xffff0000);
60 printf ("rev. %d.%d, Core ", SVR_MJREV (spridr), SVR_MNREV (spridr));
62 switch (pvr & 0xffff0000) {
69 printf ("at %s MHz, CSB at %s MHz\n",
71 strmhz(buf2, gd->csb_clk) );
77 do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
80 volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
82 /* Interrupts and MMU off */
83 __asm__ __volatile__ ("mfmsr %0":"=r" (msr):);
85 msr &= ~( MSR_EE | MSR_IR | MSR_DR);
86 __asm__ __volatile__ ("mtmsr %0"::"r" (msr));
89 * Enable Reset Control Reg - "RSTE" is the magic word that let us go
91 immap->reset.rpr = 0x52535445;
93 /* Verify Reset Control Reg is enabled */
94 while (!((immap->reset.rcer) & RCER_CRE))
97 printf ("Resetting the board.\n");
101 immap->reset.rcr = RCR_SWHR;
109 * Get timebase clock frequency (like cpu_clk in Hz)
111 unsigned long get_tbclk (void)
115 tbclk = (gd->bus_clk + 3L) / 4L;
121 #if defined(CONFIG_WATCHDOG)
122 void watchdog_reset (void)
124 int re_enable = disable_interrupts ();
127 volatile immap_t *immr = (immap_t *) CONFIG_SYS_IMMR;
128 immr->wdt.swsrr = 0x556c;
129 immr->wdt.swsrr = 0xaa39;
132 enable_interrupts ();
136 #ifdef CONFIG_OF_LIBFDT
138 #ifdef CONFIG_OF_SUPPORT_OLD_DEVICE_TREES
140 * fdt setup for old device trees
146 static void old_ft_cpu_setup(void *blob, bd_t *bd)
149 * avoid fixing up by path because that
150 * produces scary error messages
155 * old device trees have ethernet nodes with
156 * device_type = "network"
158 eth_getenv_enetaddr("ethaddr", enetaddr);
159 do_fixup_by_prop(blob, "device_type", "network", 8,
160 "local-mac-address", enetaddr, 6, 0);
161 do_fixup_by_prop(blob, "device_type", "network", 8,
162 "address", enetaddr, 6, 0);
164 * old device trees have soc nodes with
165 * device_type = "soc"
167 do_fixup_by_prop_u32(blob, "device_type", "soc", 4,
168 "bus-frequency", bd->bi_ipsfreq, 0);
172 static void ft_clock_setup(void *blob, bd_t *bd)
174 char *cpu_path = "/cpus/" OF_CPU;
177 * fixup cpu clocks using path
179 do_fixup_by_path_u32(blob, cpu_path,
180 "timebase-frequency", OF_TBCLK, 1);
181 do_fixup_by_path_u32(blob, cpu_path,
182 "bus-frequency", bd->bi_busfreq, 1);
183 do_fixup_by_path_u32(blob, cpu_path,
184 "clock-frequency", bd->bi_intfreq, 1);
186 * fixup soc clocks using compatible
188 do_fixup_by_compat_u32(blob, OF_SOC_COMPAT,
189 "bus-frequency", bd->bi_ipsfreq, 1);
192 void ft_cpu_setup(void *blob, bd_t *bd)
194 #ifdef CONFIG_OF_SUPPORT_OLD_DEVICE_TREES
195 old_ft_cpu_setup(blob, bd);
197 ft_clock_setup(blob, bd);
198 #ifdef CONFIG_HAS_ETH0
199 fdt_fixup_ethernet(blob);
204 #ifdef CONFIG_MPC512x_FEC
205 /* Default initializations for FEC controllers. To override,
206 * create a board-specific function called:
207 * int board_eth_init(bd_t *bis)
210 int cpu_eth_init(bd_t *bis)
212 return mpc512x_fec_initialize(bis);