cpu/mips/au1x00_usb_ohci.c

   1 /*
   2  * URB OHCI HCD (Host Controller Driver) for USB on the AU1x00.
   3  *
   4  * (C) Copyright 2003
   5  * Gary Jennejohn, DENX Software Engineering <gj@denx.de>
   6  *
   7  * See file CREDITS for list of people who contributed to this
   8  * project.
   9  *
  10  * This program is free software; you can redistribute it and/or
  11  * modify it under the terms of the GNU General Public License as
  12  * published by the Free Software Foundation; either version 2 of
  13  * the License, or (at your option) any later version.
  14  *
  15  * This program is distributed in the hope that it will be useful,
  16  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  18  * GNU General Public License for more details.
  19  *
  20  * You should have received a copy of the GNU General Public License
  21  * along with this program; if not, write to the Free Software
  22  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  23  * MA 02111-1307 USA
  24  *
  25  * Note: Part of this code has been derived from linux
  26  *
  27  */
  28 /*
  29  * IMPORTANT NOTES
  30  * 1 - you MUST define LITTLEENDIAN in the configuration file for the
  31  *     board or this driver will NOT work!
  32  * 2 - this driver is intended for use with USB Mass Storage Devices
  33  *     (BBB) ONLY. There is NO support for Interrupt or Isochronous pipes!
  34  */
  35
  36 #include <config.h>
  37
  38 #ifdef CONFIG_USB_OHCI
  39
  40 /* #include <pci.h> no PCI on the AU1x00 */
  41
  42 #include <common.h>
  43 #include <malloc.h>
  44 #include <asm/io.h>
  45 #include <asm/au1x00.h>
  46 #include <usb.h>
  47 #include "au1x00_usb_ohci.h"
  48
  49 #define OHCI_USE_NPS            /* force NoPowerSwitching mode */
  50 #define OHCI_VERBOSE_DEBUG      /* not always helpful */
  51 #define OHCI_FILL_TRACE
  52
  53 #define USBH_ENABLE_BE (1<<0)
  54 #define USBH_ENABLE_C  (1<<1)
  55 #define USBH_ENABLE_E  (1<<2)
  56 #define USBH_ENABLE_CE (1<<3)
  57 #define USBH_ENABLE_RD (1<<4)
  58
  59 #ifdef LITTLEENDIAN
  60 #define USBH_ENABLE_INIT (USBH_ENABLE_CE | USBH_ENABLE_E | USBH_ENABLE_C)
  61 #else
  62 #define USBH_ENABLE_INIT (USBH_ENABLE_CE | USBH_ENABLE_E | USBH_ENABLE_C | USBH_ENABLE_BE)
  63 #endif
  64
  65
  66 /* For initializing controller (mask in an HCFS mode too) */
  67 #define OHCI_CONTROL_INIT \
  68         (OHCI_CTRL_CBSR & 0x3) | OHCI_CTRL_IE | OHCI_CTRL_PLE
  69
  70 #undef readl
  71 #undef writel
  72
  73 #define readl(a)     au_readl((long)(a))
  74 #define writel(v,a)  au_writel((v),(int)(a))
  75
  76 #define min_t(type,x,y) ({ type __x = (x); type __y = (y); __x < __y ? __x: __y; })
  77
  78 #define DEBUG
  79 #ifdef DEBUG
  80 #define dbg(format, arg...) printf("DEBUG: " format "\n", ## arg)
  81 #else
  82 #define dbg(format, arg...) do {} while(0)
  83 #endif /* DEBUG */
  84 #define err(format, arg...) printf("ERROR: " format "\n", ## arg)
  85 #define SHOW_INFO
  86 #ifdef SHOW_INFO
  87 #define info(format, arg...) printf("INFO: " format "\n", ## arg)
  88 #else
  89 #define info(format, arg...) do {} while(0)
  90 #endif
  91
  92 #define m16_swap(x) swap_16(x)
  93 #define m32_swap(x) swap_32(x)
  94
  95 /* global ohci_t */
  96 static ohci_t gohci;
  97 /* this must be aligned to a 256 byte boundary */
  98 struct ohci_hcca ghcca[1];
  99 /* a pointer to the aligned storage */
 100 struct ohci_hcca *phcca;
 101 /* this allocates EDs for all possible endpoints */
 102 struct ohci_device ohci_dev;
 103 /* urb_priv */
 104 urb_priv_t urb_priv;
 105 /* RHSC flag */
 106 int got_rhsc;
 107 /* device which was disconnected */
 108 struct usb_device *devgone;
 109
 110 /*-------------------------------------------------------------------------*/
 111
 112 /* AMD-756 (D2 rev) reports corrupt register contents in some cases.
 113  * The erratum (#4) description is incorrect.  AMD's workaround waits
 114  * till some bits (mostly reserved) are clear; ok for all revs.
 115  */
 116 #define OHCI_QUIRK_AMD756 0xabcd
 117 #define read_roothub(hc, register, mask) ({ \
 118         u32 temp = readl (&hc->regs->roothub.register); \
 119         if (hc->flags & OHCI_QUIRK_AMD756) \
 120                 while (temp & mask) \
 121                         temp = readl (&hc->regs->roothub.register); \
 122         temp; })
 123
 124 static u32 roothub_a (struct ohci *hc)
 125         { return read_roothub (hc, a, 0xfc0fe000); }
 126 static inline u32 roothub_b (struct ohci *hc)
 127         { return readl (&hc->regs->roothub.b); }
 128 static inline u32 roothub_status (struct ohci *hc)
 129         { return readl (&hc->regs->roothub.status); }
 130 static u32 roothub_portstatus (struct ohci *hc, int i)
 131         { return read_roothub (hc, portstatus [i], 0xffe0fce0); }
 132
 133
 134 /* forward declaration */
 135 static int hc_interrupt (void);
 136 static void
 137 td_submit_job (struct usb_device * dev, unsigned long pipe, void * buffer,
 138         int transfer_len, struct devrequest * setup, urb_priv_t * urb, int interval);
 139
 140 /*-------------------------------------------------------------------------*
 141  * URB support functions
 142  *-------------------------------------------------------------------------*/
 143
 144 /* free HCD-private data associated with this URB */
 145
 146 static void urb_free_priv (urb_priv_t * urb)
 147 {
 148         int             i;
 149         int             last;
 150         struct td       * td;
 151
 152         last = urb->length - 1;
 153         if (last >= 0) {
 154                 for (i = 0; i <= last; i++) {
 155                         td = urb->td[i];
 156                         if (td) {
 157                                 td->usb_dev = NULL;
 158                                 urb->td[i] = NULL;
 159                         }
 160                 }
 161         }
 162 }
 163
 164 /*-------------------------------------------------------------------------*/
 165
 166 #ifdef DEBUG
 167 static int sohci_get_current_frame_number (struct usb_device * dev);
 168
 169 /* debug| print the main components of an URB
 170  * small: 0) header + data packets 1) just header */
 171
 172 static void pkt_print (struct usb_device * dev, unsigned long pipe, void * buffer,
 173         int transfer_len, struct devrequest * setup, char * str, int small)
 174 {
 175         urb_priv_t * purb = &urb_priv;
 176
 177         dbg("%s URB:[%4x] dev:%2d,ep:%2d-%c,type:%s,len:%d/%d stat:%#lx",
 178                         str,
 179                         sohci_get_current_frame_number (dev),
 180                         usb_pipedevice (pipe),
 181                         usb_pipeendpoint (pipe),
 182                         usb_pipeout (pipe)? 'O': 'I',
 183                         usb_pipetype (pipe) < 2? (usb_pipeint (pipe)? "INTR": "ISOC"):
 184                                 (usb_pipecontrol (pipe)? "CTRL": "BULK"),
 185                         purb->actual_length,
 186                         transfer_len, dev->status);
 187 #ifdef  OHCI_VERBOSE_DEBUG
 188         if (!small) {
 189                 int i, len;
 190
 191                 if (usb_pipecontrol (pipe)) {
 192                         printf (__FILE__ ": cmd(8):");
 193                         for (i = 0; i < 8 ; i++)
 194                                 printf (" %02x", ((__u8 *) setup) [i]);
 195                         printf ("\n");
 196                 }
 197                 if (transfer_len > 0 && buffer) {
 198                         printf (__FILE__ ": data(%d/%d):",
 199                                 purb->actual_length,
 200                                 transfer_len);
 201                         len = usb_pipeout (pipe)?
 202                                         transfer_len: purb->actual_length;
 203                         for (i = 0; i < 16 && i < len; i++)
 204                                 printf (" %02x", ((__u8 *) buffer) [i]);
 205                         printf ("%s\n", i < len? "...": "");
 206                 }
 207         }
 208 #endif
 209 }
 210
 211 /* just for debugging; prints non-empty branches of the int ed tree inclusive iso eds*/
 212 void ep_print_int_eds (ohci_t *ohci, char * str) {
 213         int i, j;
 214          __u32 * ed_p;
 215         for (i= 0; i < 32; i++) {
 216                 j = 5;
 217                 ed_p = &(ohci->hcca->int_table [i]);
 218                 if (*ed_p == 0)
 219                     continue;
 220                 printf (__FILE__ ": %s branch int %2d(%2x):", str, i, i);
 221                 while (*ed_p != 0 && j--) {
 222                         ed_t *ed = (ed_t *)m32_swap(ed_p);
 223                         printf (" ed: %4x;", ed->hwINFO);
 224                         ed_p = &ed->hwNextED;
 225                 }
 226                 printf ("\n");
 227         }
 228 }
 229
 230 static void ohci_dump_intr_mask (char *label, __u32 mask)
 231 {
 232         dbg ("%s: 0x%08x%s%s%s%s%s%s%s%s%s",
 233                 label,
 234                 mask,
 235                 (mask & OHCI_INTR_MIE) ? " MIE" : "",
 236                 (mask & OHCI_INTR_OC) ? " OC" : "",
 237                 (mask & OHCI_INTR_RHSC) ? " RHSC" : "",
 238                 (mask & OHCI_INTR_FNO) ? " FNO" : "",
 239                 (mask & OHCI_INTR_UE) ? " UE" : "",
 240                 (mask & OHCI_INTR_RD) ? " RD" : "",
 241                 (mask & OHCI_INTR_SF) ? " SF" : "",
 242                 (mask & OHCI_INTR_WDH) ? " WDH" : "",
 243                 (mask & OHCI_INTR_SO) ? " SO" : ""
 244                 );
 245 }
 246
 247 static void maybe_print_eds (char *label, __u32 value)
 248 {
 249         ed_t *edp = (ed_t *)value;
 250
 251         if (value) {
 252                 dbg ("%s %08x", label, value);
 253                 dbg ("%08x", edp->hwINFO);
 254                 dbg ("%08x", edp->hwTailP);
 255                 dbg ("%08x", edp->hwHeadP);
 256                 dbg ("%08x", edp->hwNextED);
 257         }
 258 }
 259
 260 static char * hcfs2string (int state)
 261 {
 262         switch (state) {
 263                 case OHCI_USB_RESET:    return "reset";
 264                 case OHCI_USB_RESUME:   return "resume";
 265                 case OHCI_USB_OPER:     return "operational";
 266                 case OHCI_USB_SUSPEND:  return "suspend";
 267         }
 268         return "?";
 269 }
 270
 271 /* dump control and status registers */
 272 static void ohci_dump_status (ohci_t *controller)
 273 {
 274         struct ohci_regs        *regs = controller->regs;
 275         __u32                   temp;
 276
 277         temp = readl (&regs->revision) & 0xff;
 278         if (temp != 0x10)
 279                 dbg ("spec %d.%d", (temp >> 4), (temp & 0x0f));
 280
 281         temp = readl (&regs->control);
 282         dbg ("control: 0x%08x%s%s%s HCFS=%s%s%s%s%s CBSR=%d", temp,
 283                 (temp & OHCI_CTRL_RWE) ? " RWE" : "",
 284                 (temp & OHCI_CTRL_RWC) ? " RWC" : "",
 285                 (temp & OHCI_CTRL_IR) ? " IR" : "",
 286                 hcfs2string (temp & OHCI_CTRL_HCFS),
 287                 (temp & OHCI_CTRL_BLE) ? " BLE" : "",
 288                 (temp & OHCI_CTRL_CLE) ? " CLE" : "",
 289                 (temp & OHCI_CTRL_IE) ? " IE" : "",
 290                 (temp & OHCI_CTRL_PLE) ? " PLE" : "",
 291                 temp & OHCI_CTRL_CBSR
 292                 );
 293
 294         temp = readl (&regs->cmdstatus);
 295         dbg ("cmdstatus: 0x%08x SOC=%d%s%s%s%s", temp,
 296                 (temp & OHCI_SOC) >> 16,
 297                 (temp & OHCI_OCR) ? " OCR" : "",
 298                 (temp & OHCI_BLF) ? " BLF" : "",
 299                 (temp & OHCI_CLF) ? " CLF" : "",
 300                 (temp & OHCI_HCR) ? " HCR" : ""
 301                 );
 302
 303         ohci_dump_intr_mask ("intrstatus", readl (&regs->intrstatus));
 304         ohci_dump_intr_mask ("intrenable", readl (&regs->intrenable));
 305
 306         maybe_print_eds ("ed_periodcurrent", readl (&regs->ed_periodcurrent));
 307
 308         maybe_print_eds ("ed_controlhead", readl (&regs->ed_controlhead));
 309         maybe_print_eds ("ed_controlcurrent", readl (&regs->ed_controlcurrent));
 310
 311         maybe_print_eds ("ed_bulkhead", readl (&regs->ed_bulkhead));
 312         maybe_print_eds ("ed_bulkcurrent", readl (&regs->ed_bulkcurrent));
 313
 314         maybe_print_eds ("donehead", readl (&regs->donehead));
 315 }
 316
 317 static void ohci_dump_roothub (ohci_t *controller, int verbose)
 318 {
 319         __u32                   temp, ndp, i;
 320
 321         temp = roothub_a (controller);
 322         ndp = (temp & RH_A_NDP);
 323
 324         if (verbose) {
 325                 dbg ("roothub.a: %08x POTPGT=%d%s%s%s%s%s NDP=%d", temp,
 326                         ((temp & RH_A_POTPGT) >> 24) & 0xff,
 327                         (temp & RH_A_NOCP) ? " NOCP" : "",
 328                         (temp & RH_A_OCPM) ? " OCPM" : "",
 329                         (temp & RH_A_DT) ? " DT" : "",
 330                         (temp & RH_A_NPS) ? " NPS" : "",
 331                         (temp & RH_A_PSM) ? " PSM" : "",
 332                         ndp
 333                         );
 334                 temp = roothub_b (controller);
 335                 dbg ("roothub.b: %08x PPCM=%04x DR=%04x",
 336                         temp,
 337                         (temp & RH_B_PPCM) >> 16,
 338                         (temp & RH_B_DR)
 339                         );
 340                 temp = roothub_status (controller);
 341                 dbg ("roothub.status: %08x%s%s%s%s%s%s",
 342                         temp,
 343                         (temp & RH_HS_CRWE) ? " CRWE" : "",
 344                         (temp & RH_HS_OCIC) ? " OCIC" : "",
 345                         (temp & RH_HS_LPSC) ? " LPSC" : "",
 346                         (temp & RH_HS_DRWE) ? " DRWE" : "",
 347                         (temp & RH_HS_OCI) ? " OCI" : "",
 348                         (temp & RH_HS_LPS) ? " LPS" : ""
 349                         );
 350         }
 351
 352         for (i = 0; i < ndp; i++) {
 353                 temp = roothub_portstatus (controller, i);
 354                 dbg ("roothub.portstatus [%d] = 0x%08x%s%s%s%s%s%s%s%s%s%s%s%s",
 355                         i,
 356                         temp,
 357                         (temp & RH_PS_PRSC) ? " PRSC" : "",
 358                         (temp & RH_PS_OCIC) ? " OCIC" : "",
 359                         (temp & RH_PS_PSSC) ? " PSSC" : "",
 360                         (temp & RH_PS_PESC) ? " PESC" : "",
 361                         (temp & RH_PS_CSC) ? " CSC" : "",
 362
 363                         (temp & RH_PS_LSDA) ? " LSDA" : "",
 364                         (temp & RH_PS_PPS) ? " PPS" : "",
 365                         (temp & RH_PS_PRS) ? " PRS" : "",
 366                         (temp & RH_PS_POCI) ? " POCI" : "",
 367                         (temp & RH_PS_PSS) ? " PSS" : "",
 368
 369                         (temp & RH_PS_PES) ? " PES" : "",
 370                         (temp & RH_PS_CCS) ? " CCS" : ""
 371                         );
 372         }
 373 }
 374
 375 static void ohci_dump (ohci_t *controller, int verbose)
 376 {
 377         dbg ("OHCI controller usb-%s state", controller->slot_name);
 378
 379         /* dumps some of the state we know about */
 380         ohci_dump_status (controller);
 381         if (verbose)
 382                 ep_print_int_eds (controller, "hcca");
 383         dbg ("hcca frame #%04x", controller->hcca->frame_no);
 384         ohci_dump_roothub (controller, 1);
 385 }
 386
 387
 388 #endif /* DEBUG */
 389
 390 /*-------------------------------------------------------------------------*
 391  * Interface functions (URB)
 392  *-------------------------------------------------------------------------*/
 393
 394 /* get a transfer request */
 395
 396 int sohci_submit_job(struct usb_device *dev, unsigned long pipe, void *buffer,
 397                 int transfer_len, struct devrequest *setup, int interval)
 398 {
 399         ohci_t *ohci;
 400         ed_t * ed;
 401         urb_priv_t *purb_priv;
 402         int i, size = 0;
 403
 404         ohci = &gohci;
 405
 406         /* when controller's hung, permit only roothub cleanup attempts
 407          * such as powering down ports */
 408         if (ohci->disabled) {
 409                 err("sohci_submit_job: EPIPE");
 410                 return -1;
 411         }
 412
 413         /* every endpoint has a ed, locate and fill it */
 414         if (!(ed = ep_add_ed (dev, pipe))) {
 415                 err("sohci_submit_job: ENOMEM");
 416                 return -1;
 417         }
 418
 419         /* for the private part of the URB we need the number of TDs (size) */
 420         switch (usb_pipetype (pipe)) {
 421                 case PIPE_BULK: /* one TD for every 4096 Byte */
 422                         size = (transfer_len - 1) / 4096 + 1;
 423                         break;
 424                 case PIPE_CONTROL: /* 1 TD for setup, 1 for ACK and 1 for every 4096 B */
 425                         size = (transfer_len == 0)? 2:
 426                                                 (transfer_len - 1) / 4096 + 3;
 427                         break;
 428         }
 429
 430         if (size >= (N_URB_TD - 1)) {
 431                 err("need %d TDs, only have %d", size, N_URB_TD);
 432                 return -1;
 433         }
 434         purb_priv = &urb_priv;
 435         purb_priv->pipe = pipe;
 436
 437         /* fill the private part of the URB */
 438         purb_priv->length = size;
 439         purb_priv->ed = ed;
 440         purb_priv->actual_length = 0;
 441
 442         /* allocate the TDs */
 443         /* note that td[0] was allocated in ep_add_ed */
 444         for (i = 0; i < size; i++) {
 445                 purb_priv->td[i] = td_alloc (dev);
 446                 if (!purb_priv->td[i]) {
 447                         purb_priv->length = i;
 448                         urb_free_priv (purb_priv);
 449                         err("sohci_submit_job: ENOMEM");
 450                         return -1;
 451                 }
 452         }
 453
 454         if (ed->state == ED_NEW || (ed->state & ED_DEL)) {
 455                 urb_free_priv (purb_priv);
 456                 err("sohci_submit_job: EINVAL");
 457                 return -1;
 458         }
 459
 460         /* link the ed into a chain if is not already */
 461         if (ed->state != ED_OPER)
 462                 ep_link (ohci, ed);
 463
 464         /* fill the TDs and link it to the ed */
 465         td_submit_job(dev, pipe, buffer, transfer_len, setup, purb_priv, interval);
 466
 467         return 0;
 468 }
 469
 470 /*-------------------------------------------------------------------------*/
 471
 472 #ifdef DEBUG
 473 /* tell us the current USB frame number */
 474
 475 static int sohci_get_current_frame_number (struct usb_device *usb_dev)
 476 {
 477         ohci_t *ohci = &gohci;
 478
 479         return m16_swap (ohci->hcca->frame_no);
 480 }
 481 #endif
 482
 483 /*-------------------------------------------------------------------------*
 484  * ED handling functions
 485  *-------------------------------------------------------------------------*/
 486
 487 /* link an ed into one of the HC chains */
 488
 489 static int ep_link (ohci_t *ohci, ed_t *edi)
 490 {
 491         volatile ed_t *ed = edi;
 492
 493         ed->state = ED_OPER;
 494
 495         switch (ed->type) {
 496         case PIPE_CONTROL:
 497                 ed->hwNextED = 0;
 498                 if (ohci->ed_controltail == NULL) {
 499                         writel ((long)ed, &ohci->regs->ed_controlhead);
 500                 } else {
 501                         ohci->ed_controltail->hwNextED = m32_swap (ed);
 502                 }
 503                 ed->ed_prev = ohci->ed_controltail;
 504                 if (!ohci->ed_controltail && !ohci->ed_rm_list[0] &&
 505                         !ohci->ed_rm_list[1] && !ohci->sleeping) {
 506                         ohci->hc_control |= OHCI_CTRL_CLE;
 507                         writel (ohci->hc_control, &ohci->regs->control);
 508                 }
 509                 ohci->ed_controltail = edi;
 510                 break;
 511
 512         case PIPE_BULK:
 513                 ed->hwNextED = 0;
 514                 if (ohci->ed_bulktail == NULL) {
 515                         writel ((long)ed, &ohci->regs->ed_bulkhead);
 516                 } else {
 517                         ohci->ed_bulktail->hwNextED = m32_swap (ed);
 518                 }
 519                 ed->ed_prev = ohci->ed_bulktail;
 520                 if (!ohci->ed_bulktail && !ohci->ed_rm_list[0] &&
 521                         !ohci->ed_rm_list[1] && !ohci->sleeping) {
 522                         ohci->hc_control |= OHCI_CTRL_BLE;
 523                         writel (ohci->hc_control, &ohci->regs->control);
 524                 }
 525                 ohci->ed_bulktail = edi;
 526                 break;
 527         }
 528         return 0;
 529 }
 530
 531 /*-------------------------------------------------------------------------*/
 532
 533 /* unlink an ed from one of the HC chains.
 534  * just the link to the ed is unlinked.
 535  * the link from the ed still points to another operational ed or 0
 536  * so the HC can eventually finish the processing of the unlinked ed */
 537
 538 static int ep_unlink (ohci_t *ohci, ed_t *ed)
 539 {
 540         ed->hwINFO |= m32_swap (OHCI_ED_SKIP);
 541
 542         switch (ed->type) {
 543         case PIPE_CONTROL:
 544                 if (ed->ed_prev == NULL) {
 545                         if (!ed->hwNextED) {
 546                                 ohci->hc_control &= ~OHCI_CTRL_CLE;
 547                                 writel (ohci->hc_control, &ohci->regs->control);
 548                         }
 549                         writel (m32_swap (*((__u32 *)&ed->hwNextED)), &ohci->regs->ed_controlhead);
 550                 } else {
 551                         ed->ed_prev->hwNextED = ed->hwNextED;
 552                 }
 553                 if (ohci->ed_controltail == ed) {
 554                         ohci->ed_controltail = ed->ed_prev;
 555                 } else {
 556                         ((ed_t *)m32_swap (*((__u32 *)&ed->hwNextED)))->ed_prev = ed->ed_prev;
 557                 }
 558                 break;
 559
 560         case PIPE_BULK:
 561                 if (ed->ed_prev == NULL) {
 562                         if (!ed->hwNextED) {
 563                                 ohci->hc_control &= ~OHCI_CTRL_BLE;
 564                                 writel (ohci->hc_control, &ohci->regs->control);
 565                         }
 566                         writel (m32_swap (*((__u32 *)&ed->hwNextED)), &ohci->regs->ed_bulkhead);
 567                 } else {
 568                         ed->ed_prev->hwNextED = ed->hwNextED;
 569                 }
 570                 if (ohci->ed_bulktail == ed) {
 571                         ohci->ed_bulktail = ed->ed_prev;
 572                 } else {
 573                         ((ed_t *)m32_swap (*((__u32 *)&ed->hwNextED)))->ed_prev = ed->ed_prev;
 574                 }
 575                 break;
 576         }
 577         ed->state = ED_UNLINK;
 578         return 0;
 579 }
 580
 581
 582 /*-------------------------------------------------------------------------*/
 583
 584 /* add/reinit an endpoint; this should be done once at the usb_set_configuration command,
 585  * but the USB stack is a little bit stateless  so we do it at every transaction
 586  * if the state of the ed is ED_NEW then a dummy td is added and the state is changed to ED_UNLINK
 587  * in all other cases the state is left unchanged
 588  * the ed info fields are setted anyway even though most of them should not change */
 589
 590 static ed_t * ep_add_ed (struct usb_device *usb_dev, unsigned long pipe)
 591 {
 592         td_t *td;
 593         ed_t *ed_ret;
 594         volatile ed_t *ed;
 595
 596         ed = ed_ret = &ohci_dev.ed[(usb_pipeendpoint (pipe) << 1) |
 597                         (usb_pipecontrol (pipe)? 0: usb_pipeout (pipe))];
 598
 599         if ((ed->state & ED_DEL) || (ed->state & ED_URB_DEL)) {
 600                 err("ep_add_ed: pending delete");
 601                 /* pending delete request */
 602                 return NULL;
 603         }
 604
 605         if (ed->state == ED_NEW) {
 606                 ed->hwINFO = m32_swap (OHCI_ED_SKIP); /* skip ed */
 607                 /* dummy td; end of td list for ed */
 608                 td = td_alloc (usb_dev);
 609                 ed->hwTailP = m32_swap (td);
 610                 ed->hwHeadP = ed->hwTailP;
 611                 ed->state = ED_UNLINK;
 612                 ed->type = usb_pipetype (pipe);
 613                 ohci_dev.ed_cnt++;
 614         }
 615
 616         ed->hwINFO = m32_swap (usb_pipedevice (pipe)
 617                         | usb_pipeendpoint (pipe) << 7
 618                         | (usb_pipeisoc (pipe)? 0x8000: 0)
 619                         | (usb_pipecontrol (pipe)? 0: (usb_pipeout (pipe)? 0x800: 0x1000))
 620                         | usb_pipeslow (pipe) << 13
 621                         | usb_maxpacket (usb_dev, pipe) << 16);
 622
 623         return ed_ret;
 624 }
 625
 626 /*-------------------------------------------------------------------------*
 627  * TD handling functions
 628  *-------------------------------------------------------------------------*/
 629
 630 /* enqueue next TD for this URB (OHCI spec 5.2.8.2) */
 631
 632 static void td_fill (ohci_t *ohci, unsigned int info,
 633         void *data, int len,
 634         struct usb_device *dev, int index, urb_priv_t *urb_priv)
 635 {
 636         volatile td_t  *td, *td_pt;
 637 #ifdef OHCI_FILL_TRACE
 638         int i;
 639 #endif
 640
 641         if (index > urb_priv->length) {
 642                 err("index > length");
 643                 return;
 644         }
 645         /* use this td as the next dummy */
 646         td_pt = urb_priv->td [index];
 647         td_pt->hwNextTD = 0;
 648
 649         /* fill the old dummy TD */
 650         td = urb_priv->td [index] = (td_t *)(m32_swap (urb_priv->ed->hwTailP) & ~0xf);
 651
 652         td->ed = urb_priv->ed;
 653         td->next_dl_td = NULL;
 654         td->index = index;
 655         td->data = (__u32)data;
 656 #ifdef OHCI_FILL_TRACE
 657         if (1 || (usb_pipebulk(urb_priv->pipe) &&
 658                                 usb_pipeout(urb_priv->pipe))) {
 659                 for (i = 0; i < len; i++)
 660                 printf("td->data[%d] %#2x\n",i, ((unsigned char *)(td->data+0x80000000))[i]);
 661         }
 662 #endif
 663         if (!len)
 664                 data = 0;
 665
 666         td->hwINFO = m32_swap (info);
 667         td->hwCBP = m32_swap (data);
 668         if (data)
 669                 td->hwBE = m32_swap (data + len - 1);
 670         else
 671                 td->hwBE = 0;
 672         td->hwNextTD = m32_swap (td_pt);
 673         td->hwPSW [0] = m16_swap (((__u32)data & 0x0FFF) | 0xE000);
 674
 675         /* append to queue */
 676         td->ed->hwTailP = td->hwNextTD;
 677 }
 678
 679 /*-------------------------------------------------------------------------*/
 680
 681 /* prepare all TDs of a transfer */
 682
 683 #define kseg_to_phys(x)   ((void *)((__u32)(x) - 0x80000000))
 684
 685 static void td_submit_job (struct usb_device *dev, unsigned long pipe, void *buffer,
 686         int transfer_len, struct devrequest *setup, urb_priv_t *urb, int interval)
 687 {
 688         ohci_t *ohci = &gohci;
 689         int data_len = transfer_len;
 690         void *data;
 691         int cnt = 0;
 692         __u32 info = 0;
 693         unsigned int toggle = 0;
 694
 695         /* OHCI handles the DATA-toggles itself, we just use the USB-toggle bits for reseting */
 696         if(usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe))) {
 697                 toggle = TD_T_TOGGLE;
 698         } else {
 699                 toggle = TD_T_DATA0;
 700                 usb_settoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe), 1);
 701         }
 702         urb->td_cnt = 0;
 703         if (data_len)
 704                 data = kseg_to_phys(buffer);
 705         else
 706                 data = 0;
 707
 708         switch (usb_pipetype (pipe)) {
 709         case PIPE_BULK:
 710                 info = usb_pipeout (pipe)?
 711                         TD_CC | TD_DP_OUT : TD_CC | TD_DP_IN ;
 712                 while(data_len > 4096) {
 713                         td_fill (ohci, info | (cnt? TD_T_TOGGLE:toggle), data, 4096, dev, cnt, urb);
 714                         data += 4096; data_len -= 4096; cnt++;
 715                 }
 716                 info = usb_pipeout (pipe)?
 717                         TD_CC | TD_DP_OUT : TD_CC | TD_R | TD_DP_IN ;
 718                 td_fill (ohci, info | (cnt? TD_T_TOGGLE:toggle), data, data_len, dev, cnt, urb);
 719                 cnt++;
 720
 721                 if (!ohci->sleeping)
 722                         writel (OHCI_BLF, &ohci->regs->cmdstatus); /* start bulk list */
 723                 break;
 724
 725         case PIPE_CONTROL:
 726                 info = TD_CC | TD_DP_SETUP | TD_T_DATA0;
 727                 td_fill (ohci, info, kseg_to_phys(setup), 8, dev, cnt++, urb);
 728                 if (data_len > 0) {
 729                         info = usb_pipeout (pipe)?
 730                                 TD_CC | TD_R | TD_DP_OUT | TD_T_DATA1 : TD_CC | TD_R | TD_DP_IN | TD_T_DATA1;
 731                         /* NOTE:  mishandles transfers >8K, some >4K */
 732                         td_fill (ohci, info, data, data_len, dev, cnt++, urb);
 733                 }
 734                 info = usb_pipeout (pipe)?
 735                         TD_CC | TD_DP_IN | TD_T_DATA1: TD_CC | TD_DP_OUT | TD_T_DATA1;
 736                 td_fill (ohci, info, data, 0, dev, cnt++, urb);
 737                 if (!ohci->sleeping)
 738                         writel (OHCI_CLF, &ohci->regs->cmdstatus); /* start Control list */
 739                 break;
 740         }
 741         if (urb->length != cnt)
 742                 dbg("TD LENGTH %d != CNT %d", urb->length, cnt);
 743 }
 744
 745 /*-------------------------------------------------------------------------*
 746  * Done List handling functions
 747  *-------------------------------------------------------------------------*/
 748
 749
 750 /* calculate the transfer length and update the urb */
 751
 752 static void dl_transfer_length(td_t * td)
 753 {
 754         __u32 tdINFO, tdBE, tdCBP;
 755         urb_priv_t *lurb_priv = &urb_priv;
 756
 757         tdINFO = m32_swap (td->hwINFO);
 758         tdBE   = m32_swap (td->hwBE);
 759         tdCBP  = m32_swap (td->hwCBP);
 760
 761
 762         if (!(usb_pipecontrol(lurb_priv->pipe) &&
 763             ((td->index == 0) || (td->index == lurb_priv->length - 1)))) {
 764                 if (tdBE != 0) {
 765                         if (td->hwCBP == 0)
 766                                 lurb_priv->actual_length += tdBE - td->data + 1;
 767                         else
 768                                 lurb_priv->actual_length += tdCBP - td->data;
 769                 }
 770         }
 771 }
 772
 773 /*-------------------------------------------------------------------------*/
 774
 775 /* replies to the request have to be on a FIFO basis so
 776  * we reverse the reversed done-list */
 777
 778 static td_t * dl_reverse_done_list (ohci_t *ohci)
 779 {
 780         __u32 td_list_hc;
 781         td_t *td_rev = NULL;
 782         td_t *td_list = NULL;
 783         urb_priv_t *lurb_priv = NULL;
 784
 785         td_list_hc = m32_swap (ohci->hcca->done_head) & 0xfffffff0;
 786         ohci->hcca->done_head = 0;
 787
 788         while (td_list_hc) {
 789                 td_list = (td_t *)td_list_hc;
 790
 791                 if (TD_CC_GET (m32_swap (td_list->hwINFO))) {
 792                         lurb_priv = &urb_priv;
 793                         dbg(" USB-error/status: %x : %p",
 794                                         TD_CC_GET (m32_swap (td_list->hwINFO)), td_list);
 795                         if (td_list->ed->hwHeadP & m32_swap (0x1)) {
 796                                 if (lurb_priv && ((td_list->index + 1) < lurb_priv->length)) {
 797                                         td_list->ed->hwHeadP =
 798                                                 (lurb_priv->td[lurb_priv->length - 1]->hwNextTD & m32_swap (0xfffffff0)) |
 799                                                                         (td_list->ed->hwHeadP & m32_swap (0x2));
 800                                         lurb_priv->td_cnt += lurb_priv->length - td_list->index - 1;
 801                                 } else
 802                                         td_list->ed->hwHeadP &= m32_swap (0xfffffff2);
 803                         }
 804                 }
 805
 806                 td_list->next_dl_td = td_rev;
 807                 td_rev = td_list;
 808                 td_list_hc = m32_swap (td_list->hwNextTD) & 0xfffffff0;
 809         }
 810         return td_list;
 811 }
 812
 813 /*-------------------------------------------------------------------------*/
 814
 815 /* td done list */
 816 static int dl_done_list (ohci_t *ohci, td_t *td_list)
 817 {
 818         td_t *td_list_next = NULL;
 819         ed_t *ed;
 820         int cc = 0;
 821         int stat = 0;
 822         /* urb_t *urb; */
 823         urb_priv_t *lurb_priv;
 824         __u32 tdINFO, edHeadP, edTailP;
 825
 826         while (td_list) {
 827                 td_list_next = td_list->next_dl_td;
 828
 829                 lurb_priv = &urb_priv;
 830                 tdINFO = m32_swap (td_list->hwINFO);
 831
 832                 ed = td_list->ed;
 833
 834                 dl_transfer_length(td_list);
 835
 836                 /* error code of transfer */
 837                 cc = TD_CC_GET (tdINFO);
 838                 if (cc != 0) {
 839                         dbg("ConditionCode %#x", cc);
 840                         stat = cc_to_error[cc];
 841                 }
 842
 843                 if (ed->state != ED_NEW) {
 844                         edHeadP = m32_swap (ed->hwHeadP) & 0xfffffff0;
 845                         edTailP = m32_swap (ed->hwTailP);
 846
 847                         /* unlink eds if they are not busy */
 848                         if ((edHeadP == edTailP) && (ed->state == ED_OPER))
 849                                 ep_unlink (ohci, ed);
 850                 }
 851
 852                 td_list = td_list_next;
 853         }
 854         return stat;
 855 }
 856
 857 /*-------------------------------------------------------------------------*
 858  * Virtual Root Hub
 859  *-------------------------------------------------------------------------*/
 860
 861 /* Device descriptor */
 862 static __u8 root_hub_dev_des[] =
 863 {
 864         0x12,       /*  __u8  bLength; */
 865         0x01,       /*  __u8  bDescriptorType; Device */
 866         0x10,       /*  __u16 bcdUSB; v1.1 */
 867         0x01,
 868         0x09,       /*  __u8  bDeviceClass; HUB_CLASSCODE */
 869         0x00,       /*  __u8  bDeviceSubClass; */
 870         0x00,       /*  __u8  bDeviceProtocol; */
 871         0x08,       /*  __u8  bMaxPacketSize0; 8 Bytes */
 872         0x00,       /*  __u16 idVendor; */
 873         0x00,
 874         0x00,       /*  __u16 idProduct; */
 875         0x00,
 876         0x00,       /*  __u16 bcdDevice; */
 877         0x00,
 878         0x00,       /*  __u8  iManufacturer; */
 879         0x01,       /*  __u8  iProduct; */
 880         0x00,       /*  __u8  iSerialNumber; */
 881         0x01        /*  __u8  bNumConfigurations; */
 882 };
 883
 884
 885 /* Configuration descriptor */
 886 static __u8 root_hub_config_des[] =
 887 {
 888         0x09,       /*  __u8  bLength; */
 889         0x02,       /*  __u8  bDescriptorType; Configuration */
 890         0x19,       /*  __u16 wTotalLength; */
 891         0x00,
 892         0x01,       /*  __u8  bNumInterfaces; */
 893         0x01,       /*  __u8  bConfigurationValue; */
 894         0x00,       /*  __u8  iConfiguration; */
 895         0x40,       /*  __u8  bmAttributes;
 896                  Bit 7: Bus-powered, 6: Self-powered, 5 Remote-wakwup, 4..0: resvd */
 897         0x00,       /*  __u8  MaxPower; */
 898
 899         /* interface */
 900         0x09,       /*  __u8  if_bLength; */
 901         0x04,       /*  __u8  if_bDescriptorType; Interface */
 902         0x00,       /*  __u8  if_bInterfaceNumber; */
 903         0x00,       /*  __u8  if_bAlternateSetting; */
 904         0x01,       /*  __u8  if_bNumEndpoints; */
 905         0x09,       /*  __u8  if_bInterfaceClass; HUB_CLASSCODE */
 906         0x00,       /*  __u8  if_bInterfaceSubClass; */
 907         0x00,       /*  __u8  if_bInterfaceProtocol; */
 908         0x00,       /*  __u8  if_iInterface; */
 909
 910         /* endpoint */
 911         0x07,       /*  __u8  ep_bLength; */
 912         0x05,       /*  __u8  ep_bDescriptorType; Endpoint */
 913         0x81,       /*  __u8  ep_bEndpointAddress; IN Endpoint 1 */
 914         0x03,       /*  __u8  ep_bmAttributes; Interrupt */
 915         0x02,       /*  __u16 ep_wMaxPacketSize; ((MAX_ROOT_PORTS + 1) / 8 */
 916         0x00,
 917         0xff        /*  __u8  ep_bInterval; 255 ms */
 918 };
 919
 920 static unsigned char root_hub_str_index0[] =
 921 {
 922         0x04,                   /*  __u8  bLength; */
 923         0x03,                   /*  __u8  bDescriptorType; String-descriptor */
 924         0x09,                   /*  __u8  lang ID */
 925         0x04,                   /*  __u8  lang ID */
 926 };
 927
 928 static unsigned char root_hub_str_index1[] =
 929 {
 930         28,                     /*  __u8  bLength; */
 931         0x03,                   /*  __u8  bDescriptorType; String-descriptor */
 932         'O',                    /*  __u8  Unicode */
 933         0,                              /*  __u8  Unicode */
 934         'H',                    /*  __u8  Unicode */
 935         0,                              /*  __u8  Unicode */
 936         'C',                    /*  __u8  Unicode */
 937         0,                              /*  __u8  Unicode */
 938         'I',                    /*  __u8  Unicode */
 939         0,                              /*  __u8  Unicode */
 940         ' ',                    /*  __u8  Unicode */
 941         0,                              /*  __u8  Unicode */
 942         'R',                    /*  __u8  Unicode */
 943         0,                              /*  __u8  Unicode */
 944         'o',                    /*  __u8  Unicode */
 945         0,                              /*  __u8  Unicode */
 946         'o',                    /*  __u8  Unicode */
 947         0,                              /*  __u8  Unicode */
 948         't',                    /*  __u8  Unicode */
 949         0,                              /*  __u8  Unicode */
 950         ' ',                    /*  __u8  Unicode */
 951         0,                              /*  __u8  Unicode */
 952         'H',                    /*  __u8  Unicode */
 953         0,                              /*  __u8  Unicode */
 954         'u',                    /*  __u8  Unicode */
 955         0,                              /*  __u8  Unicode */
 956         'b',                    /*  __u8  Unicode */
 957         0,                              /*  __u8  Unicode */
 958 };
 959
 960 /* Hub class-specific descriptor is constructed dynamically */
 961
 962
 963 /*-------------------------------------------------------------------------*/
 964
 965 #define OK(x)                   len = (x); break
 966 #ifdef DEBUG
 967 #define WR_RH_STAT(x)           {info("WR:status %#8x", (x));writel((x), &gohci.regs->roothub.status);}
 968 #define WR_RH_PORTSTAT(x)       {info("WR:portstatus[%d] %#8x", wIndex-1, (x));writel((x), &gohci.regs->roothub.portstatus[wIndex-1]);}
 969 #else
 970 #define WR_RH_STAT(x)           writel((x), &gohci.regs->roothub.status)
 971 #define WR_RH_PORTSTAT(x)       writel((x), &gohci.regs->roothub.portstatus[wIndex-1])
 972 #endif
 973 #define RD_RH_STAT              roothub_status(&gohci)
 974 #define RD_RH_PORTSTAT          roothub_portstatus(&gohci,wIndex-1)
 975
 976 /* request to virtual root hub */
 977
 978 int rh_check_port_status(ohci_t *controller)
 979 {
 980         __u32 temp, ndp, i;
 981         int res;
 982
 983         res = -1;
 984         temp = roothub_a (controller);
 985         ndp = (temp & RH_A_NDP);
 986         for (i = 0; i < ndp; i++) {
 987                 temp = roothub_portstatus (controller, i);
 988                 /* check for a device disconnect */
 989                 if (((temp & (RH_PS_PESC | RH_PS_CSC)) ==
 990                         (RH_PS_PESC | RH_PS_CSC)) &&
 991                         ((temp & RH_PS_CCS) == 0)) {
 992                         res = i;
 993                         break;
 994                 }
 995         }
 996         return res;
 997 }
 998
 999 static int ohci_submit_rh_msg(struct usb_device *dev, unsigned long pipe,
1000                 void *buffer, int transfer_len, struct devrequest *cmd)
1001 {
1002         void * data = buffer;
1003         int leni = transfer_len;
1004         int len = 0;
1005         int stat = 0;
1006         __u32 datab[4];
1007         __u8 *data_buf = (__u8 *)datab;
1008         __u16 bmRType_bReq;
1009         __u16 wValue;
1010         __u16 wIndex;
1011         __u16 wLength;
1012
1013 #ifdef DEBUG
1014 urb_priv.actual_length = 0;
1015 pkt_print(dev, pipe, buffer, transfer_len, cmd, "SUB(rh)", usb_pipein(pipe));
1016 #else
1017         wait_ms(1);
1018 #endif
1019         if (usb_pipeint(pipe)) {
1020                 info("Root-Hub submit IRQ: NOT implemented");
1021                 return 0;
1022         }
1023
1024         bmRType_bReq  = cmd->requesttype | (cmd->request << 8);
1025         wValue        = m16_swap (cmd->value);
1026         wIndex        = m16_swap (cmd->index);
1027         wLength       = m16_swap (cmd->length);
1028
1029         info("Root-Hub: adr: %2x cmd(%1x): %08x %04x %04x %04x",
1030                 dev->devnum, 8, bmRType_bReq, wValue, wIndex, wLength);
1031
1032         switch (bmRType_bReq) {
1033         /* Request Destination:
1034            without flags: Device,
1035            RH_INTERFACE: interface,
1036            RH_ENDPOINT: endpoint,
1037            RH_CLASS means HUB here,
1038            RH_OTHER | RH_CLASS  almost ever means HUB_PORT here
1039         */
1040
1041         case RH_GET_STATUS:
1042                         *(__u16 *) data_buf = m16_swap (1); OK (2);
1043         case RH_GET_STATUS | RH_INTERFACE:
1044                         *(__u16 *) data_buf = m16_swap (0); OK (2);
1045         case RH_GET_STATUS | RH_ENDPOINT:
1046                         *(__u16 *) data_buf = m16_swap (0); OK (2);
1047         case RH_GET_STATUS | RH_CLASS:
1048                         *(__u32 *) data_buf = m32_swap (
1049                                 RD_RH_STAT & ~(RH_HS_CRWE | RH_HS_DRWE));
1050                         OK (4);
1051         case RH_GET_STATUS | RH_OTHER | RH_CLASS:
1052                         *(__u32 *) data_buf = m32_swap (RD_RH_PORTSTAT); OK (4);
1053
1054         case RH_CLEAR_FEATURE | RH_ENDPOINT:
1055                 switch (wValue) {
1056                         case (RH_ENDPOINT_STALL): OK (0);
1057                 }
1058                 break;
1059
1060         case RH_CLEAR_FEATURE | RH_CLASS:
1061                 switch (wValue) {
1062                         case RH_C_HUB_LOCAL_POWER:
1063                                 OK(0);
1064                         case (RH_C_HUB_OVER_CURRENT):
1065                                         WR_RH_STAT(RH_HS_OCIC); OK (0);
1066                 }
1067                 break;
1068
1069         case RH_CLEAR_FEATURE | RH_OTHER | RH_CLASS:
1070                 switch (wValue) {
1071                         case (RH_PORT_ENABLE):
1072                                         WR_RH_PORTSTAT (RH_PS_CCS ); OK (0);
1073                         case (RH_PORT_SUSPEND):
1074                                         WR_RH_PORTSTAT (RH_PS_POCI); OK (0);
1075                         case (RH_PORT_POWER):
1076                                         WR_RH_PORTSTAT (RH_PS_LSDA); OK (0);
1077                         case (RH_C_PORT_CONNECTION):
1078                                         WR_RH_PORTSTAT (RH_PS_CSC ); OK (0);
1079                         case (RH_C_PORT_ENABLE):
1080                                         WR_RH_PORTSTAT (RH_PS_PESC); OK (0);
1081                         case (RH_C_PORT_SUSPEND):
1082                                         WR_RH_PORTSTAT (RH_PS_PSSC); OK (0);
1083                         case (RH_C_PORT_OVER_CURRENT):
1084                                         WR_RH_PORTSTAT (RH_PS_OCIC); OK (0);
1085                         case (RH_C_PORT_RESET):
1086                                         WR_RH_PORTSTAT (RH_PS_PRSC); OK (0);
1087                 }
1088                 break;
1089
1090         case RH_SET_FEATURE | RH_OTHER | RH_CLASS:
1091                 switch (wValue) {
1092                         case (RH_PORT_SUSPEND):
1093                                         WR_RH_PORTSTAT (RH_PS_PSS ); OK (0);
1094                         case (RH_PORT_RESET): /* BUG IN HUP CODE *********/
1095                                         if (RD_RH_PORTSTAT & RH_PS_CCS)
1096                                             WR_RH_PORTSTAT (RH_PS_PRS);
1097                                         OK (0);
1098                         case (RH_PORT_POWER):
1099                                         WR_RH_PORTSTAT (RH_PS_PPS ); OK (0);
1100                         case (RH_PORT_ENABLE): /* BUG IN HUP CODE *********/
1101                                         if (RD_RH_PORTSTAT & RH_PS_CCS)
1102                                             WR_RH_PORTSTAT (RH_PS_PES );
1103                                         OK (0);
1104                 }
1105                 break;
1106
1107         case RH_SET_ADDRESS: gohci.rh.devnum = wValue; OK(0);
1108
1109         case RH_GET_DESCRIPTOR:
1110                 switch ((wValue & 0xff00) >> 8) {
1111                         case (0x01): /* device descriptor */
1112                                 len = min_t(unsigned int,
1113                                           leni,
1114                                           min_t(unsigned int,
1115                                               sizeof (root_hub_dev_des),
1116                                               wLength));
1117                                 data_buf = root_hub_dev_des; OK(len);
1118                         case (0x02): /* configuration descriptor */
1119                                 len = min_t(unsigned int,
1120                                           leni,
1121                                           min_t(unsigned int,
1122                                               sizeof (root_hub_config_des),
1123                                               wLength));
1124                                 data_buf = root_hub_config_des; OK(len);
1125                         case (0x03): /* string descriptors */
1126                                 if(wValue==0x0300) {
1127                                         len = min_t(unsigned int,
1128                                                   leni,
1129                                                   min_t(unsigned int,
1130                                                       sizeof (root_hub_str_index0),
1131                                                       wLength));
1132                                         data_buf = root_hub_str_index0;
1133                                         OK(len);
1134                                 }
1135                                 if(wValue==0x0301) {
1136                                         len = min_t(unsigned int,
1137                                                   leni,
1138                                                   min_t(unsigned int,
1139                                                       sizeof (root_hub_str_index1),
1140                                                       wLength));
1141                                         data_buf = root_hub_str_index1;
1142                                         OK(len);
1143                         }
1144                         default:
1145                                 stat = USB_ST_STALLED;
1146                 }
1147                 break;
1148
1149         case RH_GET_DESCRIPTOR | RH_CLASS:
1150             {
1151                     __u32 temp = roothub_a (&gohci);
1152
1153                     data_buf [0] = 9;           /* min length; */
1154                     data_buf [1] = 0x29;
1155                     data_buf [2] = temp & RH_A_NDP;
1156                     data_buf [3] = 0;
1157                     if (temp & RH_A_PSM)        /* per-port power switching? */
1158                         data_buf [3] |= 0x1;
1159                     if (temp & RH_A_NOCP)       /* no overcurrent reporting? */
1160                         data_buf [3] |= 0x10;
1161                     else if (temp & RH_A_OCPM)  /* per-port overcurrent reporting? */
1162                         data_buf [3] |= 0x8;
1163
1164                     /* corresponds to data_buf[4-7] */
1165                     datab [1] = 0;
1166                     data_buf [5] = (temp & RH_A_POTPGT) >> 24;
1167                     temp = roothub_b (&gohci);
1168                     data_buf [7] = temp & RH_B_DR;
1169                     if (data_buf [2] < 7) {
1170                         data_buf [8] = 0xff;
1171                     } else {
1172                         data_buf [0] += 2;
1173                         data_buf [8] = (temp & RH_B_DR) >> 8;
1174                         data_buf [10] = data_buf [9] = 0xff;
1175                     }
1176
1177                     len = min_t(unsigned int, leni,
1178                               min_t(unsigned int, data_buf [0], wLength));
1179                     OK (len);
1180                 }
1181
1182         case RH_GET_CONFIGURATION:      *(__u8 *) data_buf = 0x01; OK (1);
1183
1184         case RH_SET_CONFIGURATION:      WR_RH_STAT (0x10000); OK (0);
1185
1186         default:
1187                 dbg ("unsupported root hub command");
1188                 stat = USB_ST_STALLED;
1189         }
1190
1191 #ifdef  DEBUG
1192         ohci_dump_roothub (&gohci, 1);
1193 #else
1194         wait_ms(1);
1195 #endif
1196
1197         len = min_t(int, len, leni);
1198         if (data != data_buf)
1199             memcpy (data, data_buf, len);
1200         dev->act_len = len;
1201         dev->status = stat;
1202
1203 #ifdef DEBUG
1204         if (transfer_len)
1205                 urb_priv.actual_length = transfer_len;
1206         pkt_print(dev, pipe, buffer, transfer_len, cmd, "RET(rh)", 0/*usb_pipein(pipe)*/);
1207 #else
1208         wait_ms(1);
1209 #endif
1210
1211         return stat;
1212 }
1213
1214 /*-------------------------------------------------------------------------*/
1215
1216 /* common code for handling submit messages - used for all but root hub */
1217 /* accesses. */
1218 int submit_common_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1219                 int transfer_len, struct devrequest *setup, int interval)
1220 {
1221         int stat = 0;
1222         int maxsize = usb_maxpacket(dev, pipe);
1223         int timeout;
1224
1225         /* device pulled? Shortcut the action. */
1226         if (devgone == dev) {
1227                 dev->status = USB_ST_CRC_ERR;
1228                 return 0;
1229         }
1230
1231 #ifdef DEBUG
1232         urb_priv.actual_length = 0;
1233         pkt_print(dev, pipe, buffer, transfer_len, setup, "SUB", usb_pipein(pipe));
1234 #else
1235         wait_ms(1);
1236 #endif
1237         if (!maxsize) {
1238                 err("submit_common_message: pipesize for pipe %lx is zero",
1239                         pipe);
1240                 return -1;
1241         }
1242
1243         if (sohci_submit_job(dev, pipe, buffer, transfer_len, setup, interval) < 0) {
1244                 err("sohci_submit_job failed");
1245                 return -1;
1246         }
1247
1248         wait_ms(10);
1249         /* ohci_dump_status(&gohci); */
1250
1251         /* allow more time for a BULK device to react - some are slow */
1252 #define BULK_TO  5000   /* timeout in milliseconds */
1253         if (usb_pipebulk(pipe))
1254                 timeout = BULK_TO;
1255         else
1256                 timeout = 100;
1257
1258         timeout *= 4;
1259         /* wait for it to complete */
1260         for (;;) {
1261                 /* check whether the controller is done */
1262                 stat = hc_interrupt();
1263                 if (stat < 0) {
1264                         stat = USB_ST_CRC_ERR;
1265                         break;
1266                 }
1267                 if (stat >= 0 && stat != 0xff) {
1268                         /* 0xff is returned for an SF-interrupt */
1269                         break;
1270                 }
1271                 if (--timeout) {
1272                         udelay(250); /* wait_ms(1); */
1273                 } else {
1274                         err("CTL:TIMEOUT ");
1275                         stat = USB_ST_CRC_ERR;
1276                         break;
1277                 }
1278         }
1279         /* we got an Root Hub Status Change interrupt */
1280         if (got_rhsc) {
1281 #ifdef DEBUG
1282                 ohci_dump_roothub (&gohci, 1);
1283 #endif
1284                 got_rhsc = 0;
1285                 /* abuse timeout */
1286                 timeout = rh_check_port_status(&gohci);
1287                 if (timeout >= 0) {
1288 #if 0 /* this does nothing useful, but leave it here in case that changes */
1289                         /* the called routine adds 1 to the passed value */
1290                         usb_hub_port_connect_change(gohci.rh.dev, timeout - 1);
1291 #endif
1292                         /*
1293                          * XXX
1294                          * This is potentially dangerous because it assumes
1295                          * that only one device is ever plugged in!
1296                          */
1297                         devgone = dev;
1298                 }
1299         }
1300
1301         dev->status = stat;
1302         dev->act_len = transfer_len;
1303
1304 #ifdef DEBUG
1305         pkt_print(dev, pipe, buffer, transfer_len, setup, "RET(ctlr)", usb_pipein(pipe));
1306 #else
1307         wait_ms(1);
1308 #endif
1309
1310         /* free TDs in urb_priv */
1311         urb_free_priv (&urb_priv);
1312         return 0;
1313 }
1314
1315 /* submit routines called from usb.c */
1316 int submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1317                 int transfer_len)
1318 {
1319         info("submit_bulk_msg");
1320         return submit_common_msg(dev, pipe, buffer, transfer_len, NULL, 0);
1321 }
1322
1323 int submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1324                 int transfer_len, struct devrequest *setup)
1325 {
1326         int maxsize = usb_maxpacket(dev, pipe);
1327
1328         info("submit_control_msg");
1329 #ifdef DEBUG
1330         urb_priv.actual_length = 0;
1331         pkt_print(dev, pipe, buffer, transfer_len, setup, "SUB", usb_pipein(pipe));
1332 #else
1333         wait_ms(1);
1334 #endif
1335         if (!maxsize) {
1336                 err("submit_control_message: pipesize for pipe %lx is zero",
1337                         pipe);
1338                 return -1;
1339         }
1340         if (((pipe >> 8) & 0x7f) == gohci.rh.devnum) {
1341                 gohci.rh.dev = dev;
1342                 /* root hub - redirect */
1343                 return ohci_submit_rh_msg(dev, pipe, buffer, transfer_len,
1344                         setup);
1345         }
1346
1347         return submit_common_msg(dev, pipe, buffer, transfer_len, setup, 0);
1348 }
1349
1350 int submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1351                 int transfer_len, int interval)
1352 {
1353         info("submit_int_msg");
1354         return -1;
1355 }
1356
1357 /*-------------------------------------------------------------------------*
1358  * HC functions
1359  *-------------------------------------------------------------------------*/
1360
1361 /* reset the HC and BUS */
1362
1363 static int hc_reset (ohci_t *ohci)
1364 {
1365         int timeout = 30;
1366         int smm_timeout = 50; /* 0,5 sec */
1367
1368         if (readl (&ohci->regs->control) & OHCI_CTRL_IR) { /* SMM owns the HC */
1369                 writel (OHCI_OCR, &ohci->regs->cmdstatus); /* request ownership */
1370                 info("USB HC TakeOver from SMM");
1371                 while (readl (&ohci->regs->control) & OHCI_CTRL_IR) {
1372                         wait_ms (10);
1373                         if (--smm_timeout == 0) {
1374                                 err("USB HC TakeOver failed!");
1375                                 return -1;
1376                         }
1377                 }
1378         }
1379
1380         /* Disable HC interrupts */
1381         writel (OHCI_INTR_MIE, &ohci->regs->intrdisable);
1382
1383         dbg("USB HC reset_hc usb-%s: ctrl = 0x%X ;",
1384                 ohci->slot_name,
1385                 readl (&ohci->regs->control));
1386
1387         /* Reset USB (needed by some controllers) */
1388         writel (0, &ohci->regs->control);
1389
1390         /* HC Reset requires max 10 us delay */
1391         writel (OHCI_HCR,  &ohci->regs->cmdstatus);
1392         while ((readl (&ohci->regs->cmdstatus) & OHCI_HCR) != 0) {
1393                 if (--timeout == 0) {
1394                         err("USB HC reset timed out!");
1395                         return -1;
1396                 }
1397                 udelay (1);
1398         }
1399         return 0;
1400 }
1401
1402 /*-------------------------------------------------------------------------*/
1403
1404 /* Start an OHCI controller, set the BUS operational
1405  * enable interrupts
1406  * connect the virtual root hub */
1407
1408 static int hc_start (ohci_t * ohci)
1409 {
1410         __u32 mask;
1411         unsigned int fminterval;
1412
1413         ohci->disabled = 1;
1414
1415         /* Tell the controller where the control and bulk lists are
1416          * The lists are empty now. */
1417
1418         writel (0, &ohci->regs->ed_controlhead);
1419         writel (0, &ohci->regs->ed_bulkhead);
1420
1421         writel ((__u32)ohci->hcca, &ohci->regs->hcca); /* a reset clears this */
1422
1423         fminterval = 0x2edf;
1424         writel ((fminterval * 9) / 10, &ohci->regs->periodicstart);
1425         fminterval |= ((((fminterval - 210) * 6) / 7) << 16);
1426         writel (fminterval, &ohci->regs->fminterval);
1427         writel (0x628, &ohci->regs->lsthresh);
1428
1429         /* start controller operations */
1430         ohci->hc_control = OHCI_CONTROL_INIT | OHCI_USB_OPER;
1431         ohci->disabled = 0;
1432         writel (ohci->hc_control, &ohci->regs->control);
1433
1434         /* disable all interrupts */
1435         mask = (OHCI_INTR_SO | OHCI_INTR_WDH | OHCI_INTR_SF | OHCI_INTR_RD |
1436                         OHCI_INTR_UE | OHCI_INTR_FNO | OHCI_INTR_RHSC |
1437                         OHCI_INTR_OC | OHCI_INTR_MIE);
1438         writel (mask, &ohci->regs->intrdisable);
1439         /* clear all interrupts */
1440         mask &= ~OHCI_INTR_MIE;
1441         writel (mask, &ohci->regs->intrstatus);
1442         /* Choose the interrupts we care about now  - but w/o MIE */
1443         mask = OHCI_INTR_RHSC | OHCI_INTR_UE | OHCI_INTR_WDH | OHCI_INTR_SO;
1444         writel (mask, &ohci->regs->intrenable);
1445
1446 #ifdef  OHCI_USE_NPS
1447         /* required for AMD-756 and some Mac platforms */
1448         writel ((roothub_a (ohci) | RH_A_NPS) & ~RH_A_PSM,
1449                 &ohci->regs->roothub.a);
1450         writel (RH_HS_LPSC, &ohci->regs->roothub.status);
1451 #endif  /* OHCI_USE_NPS */
1452
1453 #define mdelay(n) ({unsigned long msec=(n); while (msec--) udelay(1000);})
1454         /* POTPGT delay is bits 24-31, in 2 ms units. */
1455         mdelay ((roothub_a (ohci) >> 23) & 0x1fe);
1456
1457         /* connect the virtual root hub */
1458         ohci->rh.devnum = 0;
1459
1460         return 0;
1461 }
1462
1463 /*-------------------------------------------------------------------------*/
1464
1465 /* an interrupt happens */
1466
1467 static int
1468 hc_interrupt (void)
1469 {
1470         ohci_t *ohci = &gohci;
1471         struct ohci_regs *regs = ohci->regs;
1472         int ints;
1473         int stat = -1;
1474
1475         if ((ohci->hcca->done_head != 0) && !(m32_swap (ohci->hcca->done_head) & 0x01)) {
1476                 ints =  OHCI_INTR_WDH;
1477         } else {
1478                 ints = readl (&regs->intrstatus);
1479         }
1480
1481         /* dbg("Interrupt: %x frame: %x", ints, le16_to_cpu (ohci->hcca->frame_no)); */
1482
1483         if (ints & OHCI_INTR_RHSC) {
1484                 got_rhsc = 1;
1485         }
1486
1487         if (ints & OHCI_INTR_UE) {
1488                 ohci->disabled++;
1489                 err ("OHCI Unrecoverable Error, controller usb-%s disabled",
1490                         ohci->slot_name);
1491                 /* e.g. due to PCI Master/Target Abort */
1492
1493 #ifdef  DEBUG
1494                 ohci_dump (ohci, 1);
1495 #else
1496         wait_ms(1);
1497 #endif
1498                 /* FIXME: be optimistic, hope that bug won't repeat often. */
1499                 /* Make some non-interrupt context restart the controller. */
1500                 /* Count and limit the retries though; either hardware or */
1501                 /* software errors can go forever... */
1502                 hc_reset (ohci);
1503                 return -1;
1504         }
1505
1506         if (ints & OHCI_INTR_WDH) {
1507                 wait_ms(1);
1508                 writel (OHCI_INTR_WDH, &regs->intrdisable);
1509                 stat = dl_done_list (&gohci, dl_reverse_done_list (&gohci));
1510                 writel (OHCI_INTR_WDH, &regs->intrenable);
1511         }
1512
1513         if (ints & OHCI_INTR_SO) {
1514                 dbg("USB Schedule overrun\n");
1515                 writel (OHCI_INTR_SO, &regs->intrenable);
1516                 stat = -1;
1517         }
1518
1519         /* FIXME:  this assumes SOF (1/ms) interrupts don't get lost... */
1520         if (ints & OHCI_INTR_SF) {
1521                 unsigned int frame = m16_swap (ohci->hcca->frame_no) & 1;
1522                 wait_ms(1);
1523                 writel (OHCI_INTR_SF, &regs->intrdisable);
1524                 if (ohci->ed_rm_list[frame] != NULL)
1525                         writel (OHCI_INTR_SF, &regs->intrenable);
1526                 stat = 0xff;
1527         }
1528
1529         writel (ints, &regs->intrstatus);
1530         return stat;
1531 }
1532
1533 /*-------------------------------------------------------------------------*/
1534
1535 /*-------------------------------------------------------------------------*/
1536
1537 /* De-allocate all resources.. */
1538
1539 static void hc_release_ohci (ohci_t *ohci)
1540 {
1541         dbg ("USB HC release ohci usb-%s", ohci->slot_name);
1542
1543         if (!ohci->disabled)
1544                 hc_reset (ohci);
1545 }
1546
1547 /*-------------------------------------------------------------------------*/
1548
1549 #define __read_32bit_c0_register(source, sel)                           \
1550 ({ int __res;                                                           \
1551         if (sel == 0)                                                   \
1552                 __asm__ __volatile__(                                   \
1553                         "mfc0\t%0, " #source "\n\t"                     \
1554                         : "=r" (__res));                                \
1555         else                                                            \
1556                 __asm__ __volatile__(                                   \
1557                         ".set\tmips32\n\t"                              \
1558                         "mfc0\t%0, " #source ", " #sel "\n\t"           \
1559                         ".set\tmips0\n\t"                               \
1560                         : "=r" (__res));                                \
1561         __res;                                                          \
1562 })
1563
1564 #define read_c0_prid()          __read_32bit_c0_register($15, 0)
1565
1566 /*
1567  * low level initalisation routine, called from usb.c
1568  */
1569 static char ohci_inited = 0;
1570
1571 int usb_lowlevel_init(void)
1572 {
1573         u32 pin_func;
1574         u32 sys_freqctrl, sys_clksrc;
1575         u32 prid = read_c0_prid();
1576
1577         dbg("in usb_lowlevel_init\n");
1578
1579         /* zero and disable FREQ2 */
1580         sys_freqctrl = au_readl(SYS_FREQCTRL0);
1581         sys_freqctrl &= ~0xFFF00000;
1582         au_writel(sys_freqctrl, SYS_FREQCTRL0);
1583
1584         /* zero and disable USBH/USBD clocks */
1585         sys_clksrc = au_readl(SYS_CLKSRC);
1586         sys_clksrc &= ~0x00007FE0;
1587         au_writel(sys_clksrc, SYS_CLKSRC);
1588
1589         sys_freqctrl = au_readl(SYS_FREQCTRL0);
1590         sys_freqctrl &= ~0xFFF00000;
1591
1592         sys_clksrc = au_readl(SYS_CLKSRC);
1593         sys_clksrc &= ~0x00007FE0;
1594
1595         switch (prid & 0x000000FF) {
1596         case 0x00: /* DA */
1597         case 0x01: /* HA */
1598         case 0x02: /* HB */
1599                 /* CPU core freq to 48MHz to slow it way down... */
1600                 au_writel(4, SYS_CPUPLL);
1601
1602                 /*
1603                  * Setup 48MHz FREQ2 from CPUPLL for USB Host
1604                  */
1605                 /* FRDIV2=3 -> div by 8 of 384MHz -> 48MHz */
1606                 sys_freqctrl |= ((3<<22) | (1<<21) | (0<<20));
1607                 au_writel(sys_freqctrl, SYS_FREQCTRL0);
1608
1609                 /* CPU core freq to 384MHz */
1610                 au_writel(0x20, SYS_CPUPLL);
1611
1612                 printf("Au1000: 48MHz OHCI workaround enabled\n");
1613                 break;
1614
1615         default:  /* HC and newer */
1616                 /* FREQ2 = aux/2 = 48 MHz */
1617                 sys_freqctrl |= ((0<<22) | (1<<21) | (1<<20));
1618                 au_writel(sys_freqctrl, SYS_FREQCTRL0);
1619                 break;
1620         }
1621
1622         /*
1623          * Route 48MHz FREQ2 into USB Host and/or Device
1624          */
1625         sys_clksrc |= ((4<<12) | (0<<11) | (0<<10));
1626         au_writel(sys_clksrc, SYS_CLKSRC);
1627
1628         /* configure pins GPIO[14:9] as GPIO */
1629         pin_func = au_readl(SYS_PINFUNC) & (u32)(~0x8080);
1630
1631         au_writel(pin_func, SYS_PINFUNC);
1632         au_writel(0x2800, SYS_TRIOUTCLR);
1633         au_writel(0x0030, SYS_OUTPUTCLR);
1634
1635         dbg("OHCI board setup complete\n");
1636
1637         /* enable host controller */
1638         au_writel(USBH_ENABLE_CE, USB_HOST_CONFIG);
1639         udelay(1000);
1640         au_writel(USBH_ENABLE_INIT, USB_HOST_CONFIG);
1641         udelay(1000);
1642
1643         /* wait for reset complete (read register twice; see au1500 errata) */
1644         while (au_readl(USB_HOST_CONFIG),
1645                !(au_readl(USB_HOST_CONFIG) & USBH_ENABLE_RD))
1646                 udelay(1000);
1647
1648         dbg("OHCI clock running\n");
1649
1650         memset (&gohci, 0, sizeof (ohci_t));
1651         memset (&urb_priv, 0, sizeof (urb_priv_t));
1652
1653         /* align the storage */
1654         if ((__u32)&ghcca[0] & 0xff) {
1655                 err("HCCA not aligned!!");
1656                 return -1;
1657         }
1658         phcca = &ghcca[0];
1659         info("aligned ghcca %p", phcca);
1660         memset(&ohci_dev, 0, sizeof(struct ohci_device));
1661         if ((__u32)&ohci_dev.ed[0] & 0x7) {
1662                 err("EDs not aligned!!");
1663                 return -1;
1664         }
1665         memset(gtd, 0, sizeof(td_t) * (NUM_TD + 1));
1666         if ((__u32)gtd & 0x7) {
1667                 err("TDs not aligned!!");
1668                 return -1;
1669         }
1670         ptd = gtd;
1671         gohci.hcca = phcca;
1672         memset (phcca, 0, sizeof (struct ohci_hcca));
1673
1674         gohci.disabled = 1;
1675         gohci.sleeping = 0;
1676         gohci.irq = -1;
1677         gohci.regs = (struct ohci_regs *)(USB_OHCI_BASE | 0xA0000000);
1678
1679         gohci.flags = 0;
1680         gohci.slot_name = "au1x00";
1681
1682         dbg("OHCI revision: 0x%08x\n"
1683                "  RH: a: 0x%08x b: 0x%08x\n",
1684                readl(&gohci.regs->revision),
1685                readl(&gohci.regs->roothub.a), readl(&gohci.regs->roothub.b));
1686
1687         if (hc_reset (&gohci) < 0)
1688                 goto errout;
1689
1690         /* FIXME this is a second HC reset; why?? */
1691         writel (gohci.hc_control = OHCI_USB_RESET, &gohci.regs->control);
1692         wait_ms (10);
1693
1694         if (hc_start (&gohci) < 0)
1695                 goto errout;
1696
1697 #ifdef  DEBUG
1698         ohci_dump (&gohci, 1);
1699 #else
1700         wait_ms(1);
1701 #endif
1702         ohci_inited = 1;
1703         return 0;
1704
1705   errout:
1706         err("OHCI initialization error\n");
1707         hc_release_ohci (&gohci);
1708         /* Initialization failed */
1709         au_writel(readl(USB_HOST_CONFIG) & ~USBH_ENABLE_CE, USB_HOST_CONFIG);
1710         return -1;
1711 }
1712
1713 int usb_lowlevel_stop(void)
1714 {
1715         /* this gets called really early - before the controller has */
1716         /* even been initialized! */
1717         if (!ohci_inited)
1718                 return 0;
1719         /* TODO release any interrupts, etc. */
1720         /* call hc_release_ohci() here ? */
1721         hc_reset (&gohci);
1722         /* may not want to do this */
1723         /* Disable clock */
1724         au_writel(readl(USB_HOST_CONFIG) & ~USBH_ENABLE_CE, USB_HOST_CONFIG);
1725         return 0;
1726 }
1727
1728 #endif /* CONFIG_USB_OHCI */