2 * Copyright (C) 2003 Josef Baumgartner <josef.baumgartner@telex.de>
3 * Based on code from Bernhard Kuhn <bkuhn@metrowerks.com>
5 * See file CREDITS for list of people who contributed to this
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25 #include <timestamp.h>
28 #ifndef CONFIG_IDENT_STRING
29 #define CONFIG_IDENT_STRING ""
38 move.w #0x2700,%sr; /* disable intrs */ \
39 subl #60,%sp; /* space for 15 regs */ \
40 moveml %d0-%d7/%a0-%a6,%sp@; \
43 moveml %sp@,%d0-%d7/%a0-%a6; \
44 addl #60,%sp; /* space for 15 regs */ \
47 /* If we come from a pre-loader we don't need an initial exception
50 #if !defined(CONFIG_MONITOR_IS_IN_RAM)
54 * Vector table. This is used for initial platform startup.
55 * These vectors are to catch any un-intended traps.
59 .long 0x00000000 /* Flash offset is 0 until we setup CS0 */
60 #if defined(CONFIG_M5282) && (TEXT_BASE == CONFIG_SYS_INT_FLASH_BASE)
61 .long _start - TEXT_BASE
66 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
67 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
68 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
69 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
70 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
71 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
72 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
73 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
75 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
76 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
77 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
78 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
79 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
80 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
81 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
82 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
84 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
85 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
86 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
87 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
88 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
89 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
90 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
91 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
93 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
94 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
95 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
96 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
97 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
98 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
99 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
100 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
107 #if defined(CONFIG_SYS_INT_FLASH_BASE) && \
108 (defined(CONFIG_M5282) || defined(CONFIG_M5281))
109 #if (TEXT_BASE == CONFIG_SYS_INT_FLASH_BASE)
110 .long 0x55AA55AA,0xAA55AA55 /* CFM Backdoorkey */
111 .long 0xFFFFFFFF /* all sectors protected */
112 .long 0x00000000 /* supervisor/User restriction */
113 .long 0x00000000 /* programm/data space restriction */
114 .long 0x00000000 /* Flash security */
123 #if defined(CONFIG_M5272) || defined(CONFIG_M5249) || defined(CONFIG_M5253)
124 move.l #(CONFIG_SYS_MBAR + 1), %d0 /* set MBAR address + valid flag */
127 /*** The 5249 has MBAR2 as well ***/
128 #ifdef CONFIG_SYS_MBAR2
129 move.l #(CONFIG_SYS_MBAR2 + 1), %d0 /* Get MBAR2 address */
130 movec %d0, #0xc0e /* Set MBAR2 */
133 move.l #(CONFIG_SYS_INIT_RAM_ADDR + 1), %d0
135 #endif /* CONFIG_M5272 || CONFIG_M5249 || CONFIG_M5253 */
137 #if defined(CONFIG_M5282) || defined(CONFIG_M5271)
138 /* Initialize IPSBAR */
139 move.l #(CONFIG_SYS_MBAR + 1), %d0 /* set IPSBAR address + valid flag */
140 move.l %d0, 0x40000000
142 /* Initialize RAMBAR1: locate SRAM and validate it */
143 move.l #(CONFIG_SYS_INIT_RAM_ADDR + 0x21), %d0
146 #if defined(CONFIG_M5282)
147 #if (TEXT_BASE == CONFIG_SYS_INT_FLASH_BASE)
148 /* Setup code in SRAM to initialize FLASHBAR, if start from internal Flash */
150 move.l #(_flashbar_setup-CONFIG_SYS_INT_FLASH_BASE), %a0
151 move.l #(_flashbar_setup_end-CONFIG_SYS_INT_FLASH_BASE), %a1
152 move.l #(CONFIG_SYS_INIT_RAM_ADDR), %a2
154 move.l (%a0)+, (%a2)+
157 jmp CONFIG_SYS_INIT_RAM_ADDR
160 /* Initialize FLASHBAR: locate internal Flash and validate it */
161 move.l #(CONFIG_SYS_INT_FLASH_BASE + CONFIG_SYS_INT_FLASH_ENABLE), %d0
163 jmp _after_flashbar_copy.L /* Force jump to absolute address */
166 _after_flashbar_copy:
168 /* Setup code to initialize FLASHBAR, if start from external Memory */
169 move.l #(CONFIG_SYS_INT_FLASH_BASE + CONFIG_SYS_INT_FLASH_ENABLE), %d0
171 #endif /* (TEXT_BASE == CONFIG_SYS_INT_FLASH_BASE) */
175 /* if we come from a pre-loader we have no exception table and
176 * therefore no VBR to set
178 #if !defined(CONFIG_MONITOR_IS_IN_RAM)
179 #if defined(CONFIG_M5282) && (TEXT_BASE == CONFIG_SYS_INT_FLASH_BASE)
180 move.l #CONFIG_SYS_INT_FLASH_BASE, %d0
182 move.l #CONFIG_SYS_FLASH_BASE, %d0
188 /* Initialize IPSBAR */
189 move.l #(CONFIG_SYS_MBAR + 1), %d0 /* set IPSBAR address + valid flag */
190 move.l %d0, 0x40000000
191 /* movec %d0, %MBAR */
193 /* Initialize RAMBAR: locate SRAM and validate it */
194 move.l #(CONFIG_SYS_INIT_RAM_ADDR + 0x21), %d0
199 /* invalidate and disable cache */
200 move.l #0x01000000, %d0 /* Invalidate cache cmd */
201 movec %d0, %CACR /* Invalidate cache */
207 /* set stackpointer to end of internal ram to get some stackspace for the first c-code */
208 move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET), %sp
211 move.l #__got_start, %a5 /* put relocation table address to a5 */
213 bsr cpu_init_f /* run low-level CPU init code (from flash) */
214 bsr board_init_f /* run low-level board init code (from flash) */
216 /* board_init_f() does not return */
218 /*------------------------------------------------------------------------------*/
221 * void relocate_code (addr_sp, gd, addr_moni)
223 * This "function" does not return, instead it continues in RAM
224 * after relocating the monitor code.
228 * r5 = length in bytes
234 move.l 8(%a6), %sp /* set new stack pointer */
236 move.l 12(%a6), %d0 /* Save copy of Global Data pointer */
237 move.l 16(%a6), %a0 /* Save copy of Destination Address */
239 move.l #CONFIG_SYS_MONITOR_BASE, %a1
240 move.l #__init_end, %a2
242 /* copy the code to RAM */
244 move.l (%a1)+, (%a3)+
249 * We are done. Do not return, instead branch to second part of board
250 * initialization, now running from RAM.
253 add.l #(in_ram - CONFIG_SYS_MONITOR_BASE), %a1
260 * Now clear BSS segment
263 add.l #(_sbss - CONFIG_SYS_MONITOR_BASE),%a1
265 add.l #(_ebss - CONFIG_SYS_MONITOR_BASE),%d1
272 * fix got table in RAM
275 add.l #(__got_start - CONFIG_SYS_MONITOR_BASE),%a1
276 move.l %a1,%a5 /* * fix got pointer register a5 */
279 add.l #(__got_end - CONFIG_SYS_MONITOR_BASE),%a2
289 #if defined(CONFIG_M5281) || defined(CONFIG_M5282)
290 /* patch the 3 accesspoints to 3 ichache_state */
291 /* quick and dirty */
294 add.l #(icache_state - CONFIG_SYS_MONITOR_BASE),%d1
296 add.l #(icache_state_access_1+2 - CONFIG_SYS_MONITOR_BASE),%a1
299 add.l #(icache_state_access_2+2 - CONFIG_SYS_MONITOR_BASE),%a1
302 add.l #(icache_state_access_3+2 - CONFIG_SYS_MONITOR_BASE),%a1
306 /* calculate relative jump to board_init_r in ram */
308 add.l #(board_init_r - CONFIG_SYS_MONITOR_BASE), %a1
310 /* set parameters for board_init_r */
311 move.l %a0,-(%sp) /* dest_addr */
312 move.l %d0,-(%sp) /* gd */
313 #if defined(DEBUG) && (TEXT_BASE != CONFIG_SYS_INT_FLASH_BASE) && \
314 defined(CONFIG_SYS_HALT_BEFOR_RAM_JUMP)
319 /*------------------------------------------------------------------------------*/
341 /*------------------------------------------------------------------------------*/
342 /* cache functions */
346 move.l #0x01000000, %d0 /* Invalidate cache cmd */
347 movec %d0, %CACR /* Invalidate cache */
348 move.l #(CONFIG_SYS_SDRAM_BASE + 0xc000), %d0 /* Setup cache mask */
349 movec %d0, %ACR0 /* Enable cache */
351 move.l #0x80000200, %d0 /* Setup cache mask */
352 movec %d0, %CACR /* Enable cache */
355 move.l #(CONFIG_SYS_INIT_RAM_ADDR+CONFIG_SYS_INIT_RAM_END-8), %a1
364 move.l #0x01000000, %d0 /* Invalidate cache cmd */
365 movec %d0, %CACR /* Invalidate cache */
366 move.l #0x0000c000, %d0 /* Setup cache mask */
367 movec %d0, %ACR0 /* Enable cache */
368 move.l #0xff00c000, %d0 /* Setup cache mask */
369 movec %d0, %ACR1 /* Enable cache */
370 move.l #0x80000100, %d0 /* Setup cache mask */
371 movec %d0, %CACR /* Enable cache */
373 move.l %d0, icache_state
377 #if defined(CONFIG_M5275)
379 * Instruction cache only
383 move.l #0x01400000, %d0 /* Invalidate cache cmd */
384 movec %d0, %CACR /* Invalidate cache */
385 move.l #0x0000c000, %d0 /* Setup SDRAM caching */
386 movec %d0, %ACR0 /* Enable cache */
387 move.l #0x00000000, %d0 /* No other caching */
388 movec %d0, %ACR1 /* Enable cache */
389 move.l #0x80400100, %d0 /* Setup cache mask */
390 movec %d0, %CACR /* Enable cache */
392 move.l %d0, icache_state
399 move.l #0x01000000, %d0 /* Invalidate cache cmd */
400 movec %d0, %CACR /* Invalidate cache */
401 move.l #0x0000c000, %d0 /* Setup cache mask */
402 movec %d0, %ACR0 /* Enable cache */
403 move.l #0xff00c000, %d0 /* Setup cache mask */
404 movec %d0, %ACR1 /* Enable cache */
405 move.l #0x80400100, %d0 /* Setup cache mask, data cache disabel*/
406 movec %d0, %CACR /* Enable cache */
408 icache_state_access_1:
409 move.l %d0, icache_state
413 #if defined(CONFIG_M5249) || defined(CONFIG_M5253)
417 * Note: The 5249 Documentation doesn't give a bit position for CINV!
418 * From the 5272 and the 5307 documentation, I have deduced that it is
419 * probably CACR[24]. Should someone say something to Motorola?
422 move.l #0x01000000, %d0 /* Invalidate whole cache */
424 move.l #0xff00c000, %d0 /* Set FLASH cachable: always match (SM=0b10) */
426 move.l #0x0000c000, %d0 /* Set SDRAM cachable: always match (SM=0b10) */
428 move.l #0x90000200, %d0 /* Set cache enable cmd */
431 move.l %d0, icache_state
435 .globl icache_disable
437 move.l #0x00000100, %d0 /* Setup cache mask */
438 movec %d0, %CACR /* Enable cache */
439 clr.l %d0 /* Setup cache mask */
440 movec %d0, %ACR0 /* Enable cache */
441 movec %d0, %ACR1 /* Enable cache */
443 icache_state_access_2:
444 move.l %d0, icache_state
449 icache_state_access_3:
450 move.l #(icache_state), %a0
456 .long 0 /* cache is diabled on inirialization */
463 .globl dcache_disable
473 /*------------------------------------------------------------------------------*/
475 .globl version_string
477 .ascii U_BOOT_VERSION
478 .ascii " (", U_BOOT_DATE, " - ", U_BOOT_TIME, ")"
479 .ascii CONFIG_IDENT_STRING, "\0"