2 * Copyright (C) 2003 Josef Baumgartner <josef.baumgartner@telex.de>
3 * Based on code from Bernhard Kuhn <bkuhn@metrowerks.com>
5 * See file CREDITS for list of people who contributed to this
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
27 #ifndef CONFIG_IDENT_STRING
28 #define CONFIG_IDENT_STRING ""
37 move.w #0x2700,%sr; /* disable intrs */ \
38 subl #60,%sp; /* space for 15 regs */ \
39 moveml %d0-%d7/%a0-%a6,%sp@; \
42 moveml %sp@,%d0-%d7/%a0-%a6; \
43 addl #60,%sp; /* space for 15 regs */ \
46 /* If we come from a pre-loader we don't need an initial exception
49 #if !defined(CONFIG_MONITOR_IS_IN_RAM)
53 * Vector table. This is used for initial platform startup.
54 * These vectors are to catch any un-intended traps.
58 .long 0x00000000 /* Flash offset is 0 until we setup CS0 */
59 #if defined(CONFIG_M5282) && (TEXT_BASE == CFG_INT_FLASH_BASE)
60 .long _start - TEXT_BASE
65 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
66 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
67 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
68 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
69 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
70 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
71 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
72 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
74 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
75 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
76 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
77 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
78 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
79 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
80 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
81 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
83 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
84 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
85 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
86 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
87 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
88 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
89 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
90 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
92 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
93 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
94 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
95 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
96 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
97 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
98 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
99 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
106 #if defined(CFG_INT_FLASH_BASE) && \
107 (defined(CONFIG_M5282) || defined(CONFIG_M5281))
108 #if (TEXT_BASE == CFG_INT_FLASH_BASE)
109 .long 0x55AA55AA,0xAA55AA55 /* CFM Backdoorkey */
110 .long 0xFFFFFFFF /* all sectors protected */
111 .long 0x00000000 /* supervisor/User restriction */
112 .long 0x00000000 /* programm/data space restriction */
113 .long 0x00000000 /* Flash security */
122 #if defined(CONFIG_M5272) || defined(CONFIG_M5249) || defined(CONFIG_M5253)
123 move.l #(CFG_MBAR + 1), %d0 /* set MBAR address + valid flag */
126 /*** The 5249 has MBAR2 as well ***/
128 move.l #(CFG_MBAR2 + 1), %d0 /* Get MBAR2 address */
129 movec %d0, #0xc0e /* Set MBAR2 */
132 move.l #(CFG_INIT_RAM_ADDR + 1), %d0
134 #endif /* CONFIG_M5272 || CONFIG_M5249 || CONFIG_M5253 */
136 #if defined(CONFIG_M5282) || defined(CONFIG_M5271)
137 /* Initialize IPSBAR */
138 move.l #(CFG_MBAR + 1), %d0 /* set IPSBAR address + valid flag */
139 move.l %d0, 0x40000000
141 /* Initialize RAMBAR1: locate SRAM and validate it */
142 move.l #(CFG_INIT_RAM_ADDR + 0x21), %d0
145 #if defined(CONFIG_M5282)
146 #if (TEXT_BASE == CFG_INT_FLASH_BASE)
147 /* Setup code in SRAM to initialize FLASHBAR, if start from internal Flash */
149 move.l #(_flashbar_setup-CFG_INT_FLASH_BASE), %a0
150 move.l #(_flashbar_setup_end-CFG_INT_FLASH_BASE), %a1
151 move.l #(CFG_INIT_RAM_ADDR), %a2
153 move.l (%a0)+, (%a2)+
156 jmp CFG_INIT_RAM_ADDR
159 /* Initialize FLASHBAR: locate internal Flash and validate it */
160 move.l #(CFG_INT_FLASH_BASE + CFG_INT_FLASH_ENABLE), %d0
162 jmp _after_flashbar_copy.L /* Force jump to absolute address */
165 _after_flashbar_copy:
167 /* Setup code to initialize FLASHBAR, if start from external Memory */
168 move.l #(CFG_INT_FLASH_BASE + CFG_INT_FLASH_ENABLE), %d0
170 #endif /* (TEXT_BASE == CFG_INT_FLASH_BASE) */
174 /* if we come from a pre-loader we have no exception table and
175 * therefore no VBR to set
177 #if !defined(CONFIG_MONITOR_IS_IN_RAM)
178 #if defined(CONFIG_M5282) && (TEXT_BASE == CFG_INT_FLASH_BASE)
179 move.l #CFG_INT_FLASH_BASE, %d0
181 move.l #CFG_FLASH_BASE, %d0
187 /* Initialize IPSBAR */
188 move.l #(CFG_MBAR + 1), %d0 /* set IPSBAR address + valid flag */
189 move.l %d0, 0x40000000
190 /* movec %d0, %MBAR */
192 /* Initialize RAMBAR: locate SRAM and validate it */
193 move.l #(CFG_INIT_RAM_ADDR + 0x21), %d0
198 /* invalidate and disable cache */
199 move.l #0x01000000, %d0 /* Invalidate cache cmd */
200 movec %d0, %CACR /* Invalidate cache */
206 /* set stackpointer to end of internal ram to get some stackspace for the first c-code */
207 move.l #(CFG_INIT_RAM_ADDR + CFG_INIT_SP_OFFSET), %sp
210 move.l #__got_start, %a5 /* put relocation table address to a5 */
212 bsr cpu_init_f /* run low-level CPU init code (from flash) */
213 bsr board_init_f /* run low-level board init code (from flash) */
215 /* board_init_f() does not return */
217 /*------------------------------------------------------------------------------*/
220 * void relocate_code (addr_sp, gd, addr_moni)
222 * This "function" does not return, instead it continues in RAM
223 * after relocating the monitor code.
227 * r5 = length in bytes
233 move.l 8(%a6), %sp /* set new stack pointer */
235 move.l 12(%a6), %d0 /* Save copy of Global Data pointer */
236 move.l 16(%a6), %a0 /* Save copy of Destination Address */
238 move.l #CFG_MONITOR_BASE, %a1
239 move.l #__init_end, %a2
241 /* copy the code to RAM */
243 move.l (%a1)+, (%a3)+
248 * We are done. Do not return, instead branch to second part of board
249 * initialization, now running from RAM.
252 add.l #(in_ram - CFG_MONITOR_BASE), %a1
259 * Now clear BSS segment
262 add.l #(_sbss - CFG_MONITOR_BASE),%a1
264 add.l #(_ebss - CFG_MONITOR_BASE),%d1
271 * fix got table in RAM
274 add.l #(__got_start - CFG_MONITOR_BASE),%a1
275 move.l %a1,%a5 /* * fix got pointer register a5 */
278 add.l #(__got_end - CFG_MONITOR_BASE),%a2
288 #if defined(CONFIG_M5281) || defined(CONFIG_M5282)
289 /* patch the 3 accesspoints to 3 ichache_state */
290 /* quick and dirty */
293 add.l #(icache_state - CFG_MONITOR_BASE),%d1
295 add.l #(icache_state_access_1+2 - CFG_MONITOR_BASE),%a1
298 add.l #(icache_state_access_2+2 - CFG_MONITOR_BASE),%a1
301 add.l #(icache_state_access_3+2 - CFG_MONITOR_BASE),%a1
305 /* calculate relative jump to board_init_r in ram */
307 add.l #(board_init_r - CFG_MONITOR_BASE), %a1
309 /* set parameters for board_init_r */
310 move.l %a0,-(%sp) /* dest_addr */
311 move.l %d0,-(%sp) /* gd */
312 #if defined(DEBUG) && (TEXT_BASE != CFG_INT_FLASH_BASE) && \
313 defined(CFG_HALT_BEFOR_RAM_JUMP)
318 /*------------------------------------------------------------------------------*/
340 /*------------------------------------------------------------------------------*/
341 /* cache functions */
345 move.l #0x01000000, %d0 /* Invalidate cache cmd */
346 movec %d0, %CACR /* Invalidate cache */
347 move.l #(CFG_SDRAM_BASE + 0xc000), %d0 /* Setup cache mask */
348 movec %d0, %ACR0 /* Enable cache */
350 move.l #0x80000200, %d0 /* Setup cache mask */
351 movec %d0, %CACR /* Enable cache */
354 move.l #(CFG_INIT_RAM_ADDR+CFG_INIT_RAM_END-8), %a1
363 move.l #0x01000000, %d0 /* Invalidate cache cmd */
364 movec %d0, %CACR /* Invalidate cache */
365 move.l #0x0000c000, %d0 /* Setup cache mask */
366 movec %d0, %ACR0 /* Enable cache */
367 move.l #0xff00c000, %d0 /* Setup cache mask */
368 movec %d0, %ACR1 /* Enable cache */
369 move.l #0x80000100, %d0 /* Setup cache mask */
370 movec %d0, %CACR /* Enable cache */
372 move.l %d0, icache_state
376 #if defined(CONFIG_M5275)
378 * Instruction cache only
382 move.l #0x01400000, %d0 /* Invalidate cache cmd */
383 movec %d0, %CACR /* Invalidate cache */
384 move.l #0x0000c000, %d0 /* Setup SDRAM caching */
385 movec %d0, %ACR0 /* Enable cache */
386 move.l #0x00000000, %d0 /* No other caching */
387 movec %d0, %ACR1 /* Enable cache */
388 move.l #0x80400100, %d0 /* Setup cache mask */
389 movec %d0, %CACR /* Enable cache */
391 move.l %d0, icache_state
398 move.l #0x01000000, %d0 /* Invalidate cache cmd */
399 movec %d0, %CACR /* Invalidate cache */
400 move.l #0x0000c000, %d0 /* Setup cache mask */
401 movec %d0, %ACR0 /* Enable cache */
402 move.l #0xff00c000, %d0 /* Setup cache mask */
403 movec %d0, %ACR1 /* Enable cache */
404 move.l #0x80400100, %d0 /* Setup cache mask, data cache disabel*/
405 movec %d0, %CACR /* Enable cache */
407 icache_state_access_1:
408 move.l %d0, icache_state
412 #if defined(CONFIG_M5249) || defined(CONFIG_M5253)
416 * Note: The 5249 Documentation doesn't give a bit position for CINV!
417 * From the 5272 and the 5307 documentation, I have deduced that it is
418 * probably CACR[24]. Should someone say something to Motorola?
421 move.l #0x01000000, %d0 /* Invalidate whole cache */
423 move.l #0xff00c000, %d0 /* Set FLASH cachable: always match (SM=0b10) */
425 move.l #0x0000c000, %d0 /* Set SDRAM cachable: always match (SM=0b10) */
427 move.l #0x90000200, %d0 /* Set cache enable cmd */
430 move.l %d0, icache_state
434 .globl icache_disable
436 move.l #0x00000100, %d0 /* Setup cache mask */
437 movec %d0, %CACR /* Enable cache */
438 clr.l %d0 /* Setup cache mask */
439 movec %d0, %ACR0 /* Enable cache */
440 movec %d0, %ACR1 /* Enable cache */
442 icache_state_access_2:
443 move.l %d0, icache_state
448 icache_state_access_3:
449 move.l #(icache_state), %a0
455 .long 0 /* cache is diabled on inirialization */
462 .globl dcache_disable
472 /*------------------------------------------------------------------------------*/
474 .globl version_string
476 .ascii U_BOOT_VERSION
477 .ascii " (", __DATE__, " - ", __TIME__, ")"
478 .ascii CONFIG_IDENT_STRING, "\0"