3 * Josef Baumgartner <josef.baumgartner@telex.de>
7 * BuS Elektronik GmbH & Co. KG <esw@bus-elektronik.de>
9 * See file CREDITS for list of people who contributed to this
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License as
14 * published by the Free Software Foundation; either version 2 of
15 * the License, or (at your option) any later version.
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
33 #include <asm/immap_5271.h>
34 #include <asm/m5271.h>
38 #include <asm/immap_5272.h>
39 #include <asm/m5272.h>
43 #include <asm/m5282.h>
44 #include <asm/immap_5282.h>
48 #include <asm/m5249.h>
53 * Both MCF5270 and MCF5271 are members of the MPC5271 family. Try to
54 * determine which one we are running on, based on the Chip Identification
60 unsigned short cir; /* Chip Identification Register */
61 unsigned short pin; /* Part identification number */
62 unsigned char prn; /* Part revision number */
65 cir = mbar_readShort(MCF_CCM_CIR);
66 pin = cir >> MCF_CCM_CIR_PIN_LEN;
67 prn = cir & MCF_CCM_CIR_PRN_MASK;
70 case MCF_CCM_CIR_PIN_MCF5270:
73 case MCF_CCM_CIR_PIN_MCF5271:
82 printf("CPU: Freescale ColdFire MCF%s rev. %hu, at %s MHz\n",
83 cpu_model, prn, strmhz(buf, CFG_CLK));
85 printf("CPU: Unknown - Freescale ColdFire MCF5271 family"
86 " (PIN: 0x%x) rev. %hu, at %s MHz\n",
87 pin, prn, strmhz(buf, CFG_CLK));
92 int do_reset (cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[]) {
93 mbar_writeByte(MCF_RCM_RCR,
94 MCF_RCM_RCR_SOFTRST | MCF_RCM_RCR_FRCRSTOUT);
98 #if defined(CONFIG_WATCHDOG)
99 void watchdog_reset (void)
101 mbar_writeShort(MCF_WTM_WSR, 0x5555);
102 mbar_writeShort(MCF_WTM_WSR, 0xAAAA);
105 int watchdog_disable (void)
107 mbar_writeShort(MCF_WTM_WCR, 0);
111 int watchdog_init (void)
113 mbar_writeShort(MCF_WTM_WCR, MCF_WTM_WCR_EN);
116 #endif /* #ifdef CONFIG_WATCHDOG */
121 int do_reset (cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[]) {
122 volatile wdog_t * wdp = (wdog_t *)(CFG_MBAR + MCFSIM_WRRR);
127 /* enable watchdog, set timeout to 0 and wait */
131 /* we don't return! */
136 ulong *dirp = (ulong *)(CFG_MBAR + MCFSIM_DIR);
141 msk = (*dirp > 28) & 0xf;
143 case 0x2: suf = "1K75N"; break;
144 case 0x4: suf = "3K75N"; break;
147 printf ("Freescale MCF5272 (Mask:%01x)\n", msk);
152 printf ("Freescale MCF5272 %s\n", suf);
156 #if defined(CONFIG_WATCHDOG)
157 /* Called by macro WATCHDOG_RESET */
158 void watchdog_reset (void)
160 volatile immap_t * regp = (volatile immap_t *)CFG_MBAR;
161 regp->wdog_reg.wdog_wcr = 0;
164 int watchdog_disable (void)
166 volatile immap_t *regp = (volatile immap_t *)CFG_MBAR;
168 regp->wdog_reg.wdog_wcr = 0; /* reset watchdog counter */
169 regp->wdog_reg.wdog_wirr = 0; /* disable watchdog interrupt */
170 regp->wdog_reg.wdog_wrrr = 0; /* disable watchdog timer */
172 puts ("WATCHDOG:disabled\n");
176 int watchdog_init (void)
178 volatile immap_t *regp = (volatile immap_t *)CFG_MBAR;
180 regp->wdog_reg.wdog_wirr = 0; /* disable watchdog interrupt */
182 /* set timeout and enable watchdog */
183 regp->wdog_reg.wdog_wrrr = ((CONFIG_WATCHDOG_TIMEOUT * CFG_HZ) / (32768 * 1000)) - 1;
184 regp->wdog_reg.wdog_wcr = 0; /* reset watchdog counter */
186 puts ("WATCHDOG:enabled\n");
189 #endif /* #ifdef CONFIG_WATCHDOG */
191 #endif /* #ifdef CONFIG_M5272 */
197 unsigned char resetsource = MCFRESET_RSR;
199 printf ("CPU: Freescale Coldfire MCF5282 (PIN: %2.2x REV: %2.2x)\n",
200 MCFCCM_CIR>>8,MCFCCM_CIR & MCFCCM_CIR_PRN_MASK);
201 printf ("Reset:%s%s%s%s%s%s%s\n",
202 (resetsource & MCFRESET_RSR_LOL) ? " Loss of Lock" : "",
203 (resetsource & MCFRESET_RSR_LOC) ? " Loss of Clock" : "",
204 (resetsource & MCFRESET_RSR_EXT) ? " External" : "",
205 (resetsource & MCFRESET_RSR_POR) ? " Power On" : "",
206 (resetsource & MCFRESET_RSR_WDR) ? " Watchdog" : "",
207 (resetsource & MCFRESET_RSR_SOFT) ? " Software" : "",
208 (resetsource & MCFRESET_RSR_LVD) ? " Low Voltage" : ""
213 int do_reset (cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[])
215 MCFRESET_RCR = MCFRESET_RCR_SOFTRST;
220 #ifdef CONFIG_M5249 /* test-only: todo... */
225 printf ("CPU: Freescale Coldfire MCF5249 at %s MHz\n", strmhz(buf, CFG_CLK));
229 int do_reset (cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[]) {
230 /* enable watchdog, set timeout to 0 and wait */
231 mbar_writeByte(MCFSIM_SYPCR, 0xc0);
234 /* we don't return! */