2 * Copyright (C) 2003 Josef Baumgartner <josef.baumgartner@telex.de>
3 * Based on code from Bernhard Kuhn <bkuhn@metrowerks.com>
5 * See file CREDITS for list of people who contributed to this
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25 #include <timestamp.h>
28 #ifndef CONFIG_IDENT_STRING
29 #define CONFIG_IDENT_STRING ""
32 /* last three long word reserved for cache status */
33 #define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR+CONFIG_SYS_INIT_RAM_END- 4)
34 #define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR+CONFIG_SYS_INIT_RAM_END- 8)
35 #define CACR_STATUS (CONFIG_SYS_INIT_RAM_ADDR+CONFIG_SYS_INIT_RAM_END-12)
41 move.w #0x2700,%sr; /* disable intrs */ \
42 subl #60,%sp; /* space for 15 regs */ \
43 moveml %d0-%d7/%a0-%a6,%sp@;
46 moveml %sp@,%d0-%d7/%a0-%a6; \
47 addl #60,%sp; /* space for 15 regs */ \
50 #if defined(CONFIG_CF_SBF)
51 #define ASM_DRAMINIT (asm_dram_init - TEXT_BASE + CONFIG_SYS_INIT_RAM_ADDR)
52 #define ASM_SBF_IMG_HDR (asm_sbf_img_hdr - TEXT_BASE + CONFIG_SYS_INIT_RAM_ADDR)
57 * Vector table. This is used for initial platform startup.
58 * These vectors are to catch any un-intended traps.
62 #if defined(CONFIG_CF_SBF)
63 INITSP: .long 0 /* Initial SP */
64 INITPC: .long ASM_DRAMINIT /* Initial PC */
66 INITSP: .long 0 /* Initial SP */
67 INITPC: .long _START /* Initial PC */
70 vector02: .long _FAULT /* Access Error */
71 vector03: .long _FAULT /* Address Error */
72 vector04: .long _FAULT /* Illegal Instruction */
73 vector05: .long _FAULT /* Reserved */
74 vector06: .long _FAULT /* Reserved */
75 vector07: .long _FAULT /* Reserved */
76 vector08: .long _FAULT /* Privilege Violation */
77 vector09: .long _FAULT /* Trace */
78 vector0A: .long _FAULT /* Unimplemented A-Line */
79 vector0B: .long _FAULT /* Unimplemented F-Line */
80 vector0C: .long _FAULT /* Debug Interrupt */
81 vector0D: .long _FAULT /* Reserved */
82 vector0E: .long _FAULT /* Format Error */
83 vector0F: .long _FAULT /* Unitialized Int. */
87 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
89 vector18: .long _FAULT /* Spurious Interrupt */
90 vector19: .long _FAULT /* Autovector Level 1 */
91 vector1A: .long _FAULT /* Autovector Level 2 */
92 vector1B: .long _FAULT /* Autovector Level 3 */
93 vector1C: .long _FAULT /* Autovector Level 4 */
94 vector1D: .long _FAULT /* Autovector Level 5 */
95 vector1E: .long _FAULT /* Autovector Level 6 */
96 vector1F: .long _FAULT /* Autovector Level 7 */
98 #if !defined(CONFIG_CF_SBF)
101 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
102 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
106 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
107 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
110 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
111 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
112 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
113 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
114 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
115 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
116 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
117 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
120 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
121 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
122 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
123 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
124 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
125 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
126 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
127 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
130 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
131 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
132 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
133 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
134 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
135 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
136 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
137 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
140 #if defined(CONFIG_CF_SBF)
141 /* Image header: chksum 4 bytes, len 4 bytes, img dest 4 bytes */
143 .long 0x00000000 /* checksum, not yet implemented */
144 .long 0x00020000 /* image length */
145 .long TEXT_BASE /* image to be relocated at */
148 move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_CTRL), %d0
149 movec %d0, %RAMBAR1 /* init Rambar */
150 move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET), %sp
153 /* Must disable global address */
154 move.l #0xFC008000, %a1
155 move.l #(CONFIG_SYS_CS0_BASE), (%a1)
156 move.l #0xFC008008, %a1
157 move.l #(CONFIG_SYS_CS0_CTRL), (%a1)
158 move.l #0xFC008004, %a1
159 move.l #(CONFIG_SYS_CS0_MASK), (%a1)
162 * Dram Initialization
166 move.l #0xFC0A4074, %a1
167 move.b #(CONFIG_SYS_SDRAM_DRV_STRENGTH), (%a1)
170 /* SDRAM Chip 0 and 1 */
171 move.l #0xFC0B8110, %a1
172 move.l #0xFC0B8114, %a2
174 /* calculate the size */
176 move.l #(CONFIG_SYS_SDRAM_SIZE), %d2
177 #ifdef CONFIG_SYS_SDRAM_BASE1
187 /* SDRAM Chip 0 and 1 */
188 move.l #(CONFIG_SYS_SDRAM_BASE), (%a1)
190 #ifdef CONFIG_SYS_SDRAM_BASE1
191 move.l #(CONFIG_SYS_SDRAM_BASE1), (%a2)
196 /* dram cfg1 and cfg2 */
197 move.l #0xFC0B8008, %a1
198 move.l #(CONFIG_SYS_SDRAM_CFG1), (%a1)
200 move.l #0xFC0B800C, %a2
201 move.l #(CONFIG_SYS_SDRAM_CFG2), (%a2)
204 move.l #0xFC0B8000, %a1 /* Mode */
205 move.l #0xFC0B8004, %a2 /* Ctrl */
208 move.l #(CONFIG_SYS_SDRAM_CTRL + 2), (%a2)
212 move.l #(CONFIG_SYS_SDRAM_MODE), (%a1)
214 move.l #(CONFIG_SYS_SDRAM_EMOD), (%a1)
224 move.l #(CONFIG_SYS_SDRAM_CTRL + 2), (%a2)
227 /* Perform two refresh cycles */
228 move.l #(CONFIG_SYS_SDRAM_CTRL + 4), %d0
234 move.l #(CONFIG_SYS_SDRAM_CTRL), %d0
235 and.l #0x7FFFFFFF, %d0
236 or.l #0x10000c00, %d0
241 * DSPI Initialization
242 * a0 - general, sram - 0x80008000 - 32, see M52277EVB.h
249 /* Enable pins for DSPI mode - chip-selects are enabled later */
250 move.l #0xFC0A4036, %a0
255 #ifdef CONFIG_SYS_DSPI_CS0
260 #ifdef CONFIG_SYS_DSPI_CS2
261 move.l #0xFC0A4037, %a0
268 /* Configure DSPI module */
269 move.l #0xFC05C000, %a0
270 move.l #0x80FF0C00, (%a0) /* Master, clear TX/RX FIFO */
272 move.l #0xFC05C00C, %a0
273 move.l #0x3E000011, (%a0)
275 move.l #0xFC05C034, %a2 /* dtfr */
276 move.l #0xFC05C03B, %a3 /* drfr */
278 move.l #(ASM_SBF_IMG_HDR + 4), %a1
282 move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_SBFHDR_DATA_OFFSET), %a0
283 move.l #(CONFIG_SYS_SBFHDR_SIZE), %d4
285 move.l #0xFC05C02C, %a1 /* dspi status */
287 /* Issue commands and address */
288 move.l #0x8004000B, %d2 /* Fast Read Cmd */
289 jsr asm_dspi_wr_status
290 jsr asm_dspi_rd_status
292 move.l #0x80040000, %d2 /* Address byte 2 */
293 jsr asm_dspi_wr_status
294 jsr asm_dspi_rd_status
296 move.l #0x80040000, %d2 /* Address byte 1 */
297 jsr asm_dspi_wr_status
298 jsr asm_dspi_rd_status
300 move.l #0x80040000, %d2 /* Address byte 0 */
301 jsr asm_dspi_wr_status
302 jsr asm_dspi_rd_status
304 move.l #0x80040000, %d2 /* Dummy Wr and Rd */
305 jsr asm_dspi_wr_status
306 jsr asm_dspi_rd_status
308 /* Transfer serial boot header to sram */
310 move.l #0x80040000, %d2
311 jsr asm_dspi_wr_status
312 jsr asm_dspi_rd_status
314 move.b %d1, (%a0) /* read, copy to dst */
316 add.l #1, %a0 /* inc dst by 1 */
317 sub.l #1, %d4 /* dec cnt by 1 */
318 bne asm_dspi_rd_loop1
320 /* Transfer u-boot from serial flash to memory */
322 move.l #0x80040000, %d2
323 jsr asm_dspi_wr_status
324 jsr asm_dspi_rd_status
326 move.b %d1, (%a4) /* read, copy to dst */
328 add.l #1, %a4 /* inc dst by 1 */
329 sub.l #1, %d5 /* dec cnt by 1 */
330 bne asm_dspi_rd_loop2
332 move.l #0x00040000, %d2 /* Terminate */
333 jsr asm_dspi_wr_status
334 jsr asm_dspi_rd_status
336 /* jump to memory and execute */
337 move.l #(TEXT_BASE + 0x400), %a0
342 move.l (%a1), %d0 /* status */
343 and.l #0x0000F000, %d0
344 cmp.l #0x00003000, %d0
345 bgt asm_dspi_wr_status
351 move.l (%a1), %d0 /* status */
352 and.l #0x000000F0, %d0
355 beq asm_dspi_rd_status
359 #endif /* CONFIG_CF_SBF */
367 move.w #0x2700,%sr /* Mask off Interrupt */
369 /* Set vector base register at the beginning of the Flash */
370 #if defined(CONFIG_CF_SBF)
371 move.l #TEXT_BASE, %d0
374 move.l #CONFIG_SYS_FLASH_BASE, %d0
377 move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_CTRL), %d0
381 /* initialize general use internal ram */
383 move.l #(ICACHE_STATUS), %a1 /* icache */
384 move.l #(DCACHE_STATUS), %a2 /* icache */
385 move.l #(CACR_STATUS), %a3 /* CACR */
390 /* invalidate and disable cache */
391 move.l #0x01000000, %d0 /* Invalidate cache cmd */
392 movec %d0, %CACR /* Invalidate cache */
397 /* set stackpointer to end of internal ram to get some stackspace for
399 move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET), %sp
402 move.l #__got_start, %a5 /* put relocation table address to a5 */
404 bsr cpu_init_f /* run low-level CPU init code (from flash) */
405 bsr board_init_f /* run low-level board init code (from flash) */
407 /* board_init_f() does not return */
409 /*------------------------------------------------------------------------------*/
412 * void relocate_code (addr_sp, gd, addr_moni)
414 * This "function" does not return, instead it continues in RAM
415 * after relocating the monitor code.
419 * r5 = length in bytes
425 move.l 8(%a6), %sp /* set new stack pointer */
427 move.l 12(%a6), %d0 /* Save copy of Global Data pointer */
428 move.l 16(%a6), %a0 /* Save copy of Destination Address */
430 move.l #CONFIG_SYS_MONITOR_BASE, %a1
431 move.l #__init_end, %a2
434 /* copy the code to RAM */
436 move.l (%a1)+, (%a3)+
441 * We are done. Do not return, instead branch to second part of board
442 * initialization, now running from RAM.
445 add.l #(in_ram - CONFIG_SYS_MONITOR_BASE), %a1
452 * Now clear BSS segment
455 add.l #(_sbss - CONFIG_SYS_MONITOR_BASE),%a1
457 add.l #(_ebss - CONFIG_SYS_MONITOR_BASE),%d1
464 * fix got table in RAM
467 add.l #(__got_start - CONFIG_SYS_MONITOR_BASE),%a1
468 move.l %a1,%a5 /* * fix got pointer register a5 */
471 add.l #(__got_end - CONFIG_SYS_MONITOR_BASE),%a2
481 /* calculate relative jump to board_init_r in ram */
483 add.l #(board_init_r - CONFIG_SYS_MONITOR_BASE), %a1
485 /* set parameters for board_init_r */
486 move.l %a0,-(%sp) /* dest_addr */
487 move.l %d0,-(%sp) /* gd */
490 /*------------------------------------------------------------------------------*/
512 /*------------------------------------------------------------------------------*/
513 /* cache functions */
516 move.l #0x01200000, %d0 /* Invalid cache */
519 move.l #(CONFIG_SYS_SDRAM_BASE + 0x1c000), %d0
522 move.l #0x81600610, %d0 /* Enable cache */
525 move.l #(ICACHE_STATUS), %a1
530 .globl icache_disable
532 move.l #0x01F00000, %d0 /* Setup cache mask */
533 movec %d0, %CACR /* Invalidate icache */
538 move.l #(ICACHE_STATUS), %a1
545 move.l #(ICACHE_STATUS), %a1
549 .globl icache_invalid
551 move.l #0x80600610, %d0 /* Invalidate icache */
552 movec %d0, %CACR /* Enable and invalidate cache */
557 move.l #0x01200000, %d0 /* Invalid cache */
560 move.l #0x81300610, %d0
563 move.l #(DCACHE_STATUS), %a1
568 .globl dcache_disable
570 move.l #0x81600610, %d0 /* Setup cache mask */
571 movec %d0, %CACR /* Invalidate icache */
573 move.l #(DCACHE_STATUS), %a1
578 .globl dcache_invalid
580 move.l #0x81100610, %d0 /* Setup cache mask */
581 movec %d0, %CACR /* Enable and invalidate cache */
586 move.l #(DCACHE_STATUS), %a1
590 /*------------------------------------------------------------------------------*/
592 .globl version_string
594 .ascii U_BOOT_VERSION
595 .ascii " (", U_BOOT_DATE, " - ", U_BOOT_TIME, ")"
596 .ascii CONFIG_IDENT_STRING, "\0"