3 * (C) Copyright 2000-2003
4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
6 * Copyright (C) 2004-2008 Freescale Semiconductor, Inc.
7 * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
9 * See file CREDITS for list of people who contributed to this
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License as
14 * published by the Free Software Foundation; either version 2 of
15 * the License, or (at your option) any later version.
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
32 #if defined(CONFIG_CF_DSPI)
33 #include <asm/immap.h>
37 volatile gpio_t *gpio = (gpio_t *) MMAP_GPIO;
38 volatile dspi_t *dspi = (dspi_t *) MMAP_DSPI;
41 GPIO_PAR_DSPI_SIN_SIN | GPIO_PAR_DSPI_SOUT_SOUT |
42 GPIO_PAR_DSPI_SCK_SCK;
44 dspi->dmcr = DSPI_DMCR_MSTR | DSPI_DMCR_CSIS7 | DSPI_DMCR_CSIS6 |
45 DSPI_DMCR_CSIS5 | DSPI_DMCR_CSIS4 | DSPI_DMCR_CSIS3 |
46 DSPI_DMCR_CSIS2 | DSPI_DMCR_CSIS1 | DSPI_DMCR_CSIS0 |
47 DSPI_DMCR_CRXF | DSPI_DMCR_CTXF;
49 #ifdef CONFIG_SYS_DSPI_DCTAR0
50 dspi->dctar0 = CONFIG_SYS_DSPI_DCTAR0;
52 #ifdef CONFIG_SYS_DSPI_DCTAR1
53 dspi->dctar1 = CONFIG_SYS_DSPI_DCTAR1;
55 #ifdef CONFIG_SYS_DSPI_DCTAR2
56 dspi->dctar2 = CONFIG_SYS_DSPI_DCTAR2;
58 #ifdef CONFIG_SYS_DSPI_DCTAR3
59 dspi->dctar3 = CONFIG_SYS_DSPI_DCTAR3;
61 #ifdef CONFIG_SYS_DSPI_DCTAR4
62 dspi->dctar4 = CONFIG_SYS_DSPI_DCTAR4;
64 #ifdef CONFIG_SYS_DSPI_DCTAR5
65 dspi->dctar5 = CONFIG_SYS_DSPI_DCTAR5;
67 #ifdef CONFIG_SYS_DSPI_DCTAR6
68 dspi->dctar6 = CONFIG_SYS_DSPI_DCTAR6;
70 #ifdef CONFIG_SYS_DSPI_DCTAR7
71 dspi->dctar7 = CONFIG_SYS_DSPI_DCTAR7;
75 void dspi_tx(int chipsel, u8 attrib, u16 data)
77 volatile dspi_t *dspi = (dspi_t *) MMAP_DSPI;
79 while ((dspi->dsr & 0x0000F000) >= 4) ;
81 dspi->dtfr = (attrib << 24) | ((1 << chipsel) << 16) | data;
86 volatile dspi_t *dspi = (dspi_t *) MMAP_DSPI;
88 while ((dspi->dsr & 0x000000F0) == 0) ;
90 return (dspi->drfr & 0xFFFF);
93 #if defined(CONFIG_CMD_SPI)
107 struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
108 unsigned int max_hz, unsigned int mode)
110 volatile gpio_t *gpio = (gpio_t *) MMAP_GPIO;
111 struct spi_slave *slave;
113 slave = malloc(sizeof(struct spi_slave));
119 gpio->par_dspi &= ~GPIO_PAR_DSPI_PCS0_PCS0;
120 gpio->par_dspi |= GPIO_PAR_DSPI_PCS0_PCS0;
123 gpio->par_timer &= GPIO_PAR_TIMER_T2IN_MASK;
124 gpio->par_timer |= GPIO_PAR_TIMER_T2IN_DSPIPCS2;
134 void spi_free_slave(struct spi_slave *slave)
136 volatile gpio_t *gpio = (gpio_t *) MMAP_GPIO;
140 gpio->par_dspi &= ~GPIO_PAR_DSPI_PCS0_PCS0;
143 gpio->par_timer &= GPIO_PAR_TIMER_T2IN_MASK;
150 int spi_claim_bus(struct spi_slave *slave)
155 void spi_release_bus(struct spi_slave *slave)
159 int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,
160 void *din, unsigned long flags)
162 static int bWrite = 0;
164 int len = bitlen >> 3;
167 spi_wr = (u8 *) dout;
169 /* command handling */
170 if (((len == 4) || (len == 1) || (len == 5)) && (dout != NULL)) {
172 case 0x02: /* Page Prog */
174 dspi_tx(slave->cs, 0x80, spi_wr[0]);
176 dspi_tx(slave->cs, 0x80, spi_wr[1]);
178 dspi_tx(slave->cs, 0x80, spi_wr[2]);
180 dspi_tx(slave->cs, 0x80, spi_wr[3]);
183 case 0x05: /* Read Status */
185 if ((spi_wr[1] == 0xFF) && (spi_wr[2] == 0xFF)
186 && (spi_wr[3] == 0xFF)) {
187 dspi_tx(slave->cs, 0x80, *spi_wr);
191 case 0x06: /* WREN */
192 dspi_tx(slave->cs, 0x00, *spi_wr);
195 case 0x0B: /* Fast read */
196 if ((len == 5) && (spi_wr[4] == 0)) {
197 dspi_tx(slave->cs, 0x80, spi_wr[0]);
199 dspi_tx(slave->cs, 0x80, spi_wr[1]);
201 dspi_tx(slave->cs, 0x80, spi_wr[2]);
203 dspi_tx(slave->cs, 0x80, spi_wr[3]);
205 dspi_tx(slave->cs, 0x80, spi_wr[4]);
209 case 0x9F: /* RDID */
210 dspi_tx(slave->cs, 0x80, *spi_wr);
213 case 0xD8: /* Sector erase */
215 if ((spi_wr[2] == 0) && (spi_wr[3] == 0)) {
216 dspi_tx(slave->cs, 0x80, spi_wr[0]);
218 dspi_tx(slave->cs, 0x80, spi_wr[1]);
220 dspi_tx(slave->cs, 0x80, spi_wr[2]);
222 dspi_tx(slave->cs, 0x00, spi_wr[3]);
234 dspi_tx(slave->cs, 0x80, *spi_wr);
240 dspi_tx(slave->cs, 0x80, 0);
246 if (flags == SPI_XFER_END) {
248 dspi_tx(slave->cs, 0x00, *spi_wr);
252 dspi_tx(slave->cs, 0x00, 0);
259 #endif /* CONFIG_CMD_SPI */
261 #endif /* CONFIG_CF_DSPI */