cpu/bf537/i2c.c

   1 /****************************************************************
   2  * $ID: i2c.c   24 Oct 2006 12:00:00 +0800 $                    *
   3  *                                                              *
   4  * Description:                                                 *
   5  *                                                              *
   6  * Maintainer:  sonicz  <sonic.zhang@analog.com>                *
   7  *                                                              *
   8  * CopyRight (c)  2006  Analog Device                           *
   9  * All rights reserved.                                         *
  10  *                                                              *
  11  * This file is free software;                                  *
  12  *      you are free to modify and/or redistribute it           *
  13  *      under the terms of the GNU General Public Licence (GPL).*
  14  *                                                              *
  15  ****************************************************************/
  16
  17 #include <common.h>
  18
  19 #ifdef CONFIG_HARD_I2C
  20
  21 #include <asm/blackfin.h>
  22 #include <i2c.h>
  23 #include <asm/io.h>
  24
  25 DECLARE_GLOBAL_DATA_PTR;
  26
  27 #define bfin_read16(addr) ({ unsigned __v; \
  28                         __asm__ __volatile__ (\
  29                         "%0 = w[%1] (z);\n\t"\
  30                         : "=d"(__v) : "a"(addr)); (unsigned short)__v; })
  31
  32 #define bfin_write16(addr,val) ({\
  33                         __asm__ __volatile__ (\
  34                         "w[%0] = %1;\n\t"\
  35                         : : "a"(addr) , "d"(val) : "memory");})
  36
  37 /* Two-Wire Interface           (0xFFC01400 - 0xFFC014FF) */
  38 #define bfin_read_TWI_CLKDIV()          bfin_read16(TWI_CLKDIV)
  39 #define bfin_write_TWI_CLKDIV(val)      bfin_write16(TWI_CLKDIV,val)
  40 #define bfin_read_TWI_CONTROL()         bfin_read16(TWI_CONTROL)
  41 #define bfin_write_TWI_CONTROL(val)     bfin_write16(TWI_CONTROL,val)
  42 #define bfin_read_TWI_SLAVE_CTL()       bfin_read16(TWI_SLAVE_CTL)
  43 #define bfin_write_TWI_SLAVE_CTL(val)   bfin_write16(TWI_SLAVE_CTL,val)
  44 #define bfin_read_TWI_SLAVE_STAT()      bfin_read16(TWI_SLAVE_STAT)
  45 #define bfin_write_TWI_SLAVE_STAT(val)  bfin_write16(TWI_SLAVE_STAT,val)
  46 #define bfin_read_TWI_SLAVE_ADDR()      bfin_read16(TWI_SLAVE_ADDR)
  47 #define bfin_write_TWI_SLAVE_ADDR(val)  bfin_write16(TWI_SLAVE_ADDR,val)
  48 #define bfin_read_TWI_MASTER_CTL()      bfin_read16(TWI_MASTER_CTL)
  49 #define bfin_write_TWI_MASTER_CTL(val)  bfin_write16(TWI_MASTER_CTL,val)
  50 #define bfin_read_TWI_MASTER_STAT()     bfin_read16(TWI_MASTER_STAT)
  51 #define bfin_write_TWI_MASTER_STAT(val) bfin_write16(TWI_MASTER_STAT,val)
  52 #define bfin_read_TWI_MASTER_ADDR()     bfin_read16(TWI_MASTER_ADDR)
  53 #define bfin_write_TWI_MASTER_ADDR(val) bfin_write16(TWI_MASTER_ADDR,val)
  54 #define bfin_read_TWI_INT_STAT()        bfin_read16(TWI_INT_STAT)
  55 #define bfin_write_TWI_INT_STAT(val)    bfin_write16(TWI_INT_STAT,val)
  56 #define bfin_read_TWI_INT_MASK()        bfin_read16(TWI_INT_MASK)
  57 #define bfin_write_TWI_INT_MASK(val)    bfin_write16(TWI_INT_MASK,val)
  58 #define bfin_read_TWI_FIFO_CTL()        bfin_read16(TWI_FIFO_CTL)
  59 #define bfin_write_TWI_FIFO_CTL(val)    bfin_write16(TWI_FIFO_CTL,val)
  60 #define bfin_read_TWI_FIFO_STAT()       bfin_read16(TWI_FIFO_STAT)
  61 #define bfin_write_TWI_FIFO_STAT(val)   bfin_write16(TWI_FIFO_STAT,val)
  62 #define bfin_read_TWI_XMT_DATA8()       bfin_read16(TWI_XMT_DATA8)
  63 #define bfin_write_TWI_XMT_DATA8(val)   bfin_write16(TWI_XMT_DATA8,val)
  64 #define bfin_read_TWI_XMT_DATA16()      bfin_read16(TWI_XMT_DATA16)
  65 #define bfin_write_TWI_XMT_DATA16(val)  bfin_write16(TWI_XMT_DATA16,val)
  66 #define bfin_read_TWI_RCV_DATA8()       bfin_read16(TWI_RCV_DATA8)
  67 #define bfin_write_TWI_RCV_DATA8(val)   bfin_write16(TWI_RCV_DATA8,val)
  68 #define bfin_read_TWI_RCV_DATA16()      bfin_read16(TWI_RCV_DATA16)
  69 #define bfin_write_TWI_RCV_DATA16(val)  bfin_write16(TWI_RCV_DATA16,val)
  70
  71 #ifdef DEBUG_I2C
  72 #define PRINTD(fmt,args...)     do {    \
  73         if (gd->have_console)           \
  74                 printf(fmt ,##args);    \
  75         } while (0)
  76 #else
  77 #define PRINTD(fmt,args...)
  78 #endif
  79
  80 #ifndef CONFIG_TWICLK_KHZ
  81 #define CONFIG_TWICLK_KHZ       50
  82 #endif
  83
  84 /* All transfers are described by this data structure */
  85 struct i2c_msg {
  86         u16 addr;               /* slave address */
  87         u16 flags;
  88 #define I2C_M_STOP              0x2
  89 #define I2C_M_RD                0x1
  90         u16 len;                /* msg length */
  91         u8 *buf;                /* pointer to msg data */
  92 };
  93
  94 /**
  95  * i2c_reset: - reset the host controller
  96  *
  97  */
  98
  99 static void i2c_reset(void)
 100 {
 101         /* Disable TWI */
 102         bfin_write_TWI_CONTROL(0);
 103         sync();
 104
 105         /* Set TWI internal clock as 10MHz */
 106         bfin_write_TWI_CONTROL(((get_sclk() / 1024 / 1024 + 5) / 10) & 0x7F);
 107
 108         /* Set Twi interface clock as specified */
 109         if (CONFIG_TWICLK_KHZ > 400)
 110                 bfin_write_TWI_CLKDIV(((5 * 1024 / 400) << 8) | ((5 * 1024 /
 111                                                 400) & 0xFF));
 112         else
 113                 bfin_write_TWI_CLKDIV(((5 * 1024 /
 114                                         CONFIG_TWICLK_KHZ) << 8) | ((5 * 1024 /
 115                                                 CONFIG_TWICLK_KHZ)
 116                                                 & 0xFF));
 117
 118         /* Enable TWI */
 119         bfin_write_TWI_CONTROL(bfin_read_TWI_CONTROL() | TWI_ENA);
 120         sync();
 121 }
 122
 123 int wait_for_completion(struct i2c_msg *msg, int timeout_count)
 124 {
 125         unsigned short twi_int_stat;
 126         unsigned short mast_stat;
 127         int i;
 128
 129         for (i = 0; i < timeout_count; i++) {
 130                 twi_int_stat = bfin_read_TWI_INT_STAT();
 131                 mast_stat = bfin_read_TWI_MASTER_STAT();
 132
 133                 if (XMTSERV & twi_int_stat) {
 134                         /* Transmit next data */
 135                         if (msg->len > 0) {
 136                                 bfin_write_TWI_XMT_DATA8(*(msg->buf++));
 137                                 msg->len--;
 138                         } else if (msg->flags & I2C_M_STOP)
 139                                 bfin_write_TWI_MASTER_CTL
 140                                     (bfin_read_TWI_MASTER_CTL() | STOP);
 141                         sync();
 142                         /* Clear status */
 143                         bfin_write_TWI_INT_STAT(XMTSERV);
 144                         sync();
 145                         i = 0;
 146                 }
 147                 if (RCVSERV & twi_int_stat) {
 148                         if (msg->len > 0) {
 149                                 /* Receive next data */
 150                                 *(msg->buf++) = bfin_read_TWI_RCV_DATA8();
 151                                 msg->len--;
 152                         } else if (msg->flags & I2C_M_STOP) {
 153                                 bfin_write_TWI_MASTER_CTL
 154                                     (bfin_read_TWI_MASTER_CTL() | STOP);
 155                                 sync();
 156                         }
 157                         /* Clear interrupt source */
 158                         bfin_write_TWI_INT_STAT(RCVSERV);
 159                         sync();
 160                         i = 0;
 161                 }
 162                 if (MERR & twi_int_stat) {
 163                         bfin_write_TWI_INT_STAT(MERR);
 164                         bfin_write_TWI_INT_MASK(0);
 165                         bfin_write_TWI_MASTER_STAT(0x3e);
 166                         bfin_write_TWI_MASTER_CTL(0);
 167                         sync();
 168                         /*
 169                          * if both err and complete int stats are set,
 170                          * return proper results.
 171                          */
 172                         if (MCOMP & twi_int_stat) {
 173                                 bfin_write_TWI_INT_STAT(MCOMP);
 174                                 bfin_write_TWI_INT_MASK(0);
 175                                 bfin_write_TWI_MASTER_CTL(0);
 176                                 sync();
 177                                 /*
 178                                  * If it is a quick transfer,
 179                                  * only address bug no data, not an err.
 180                                  */
 181                                 if (msg->len == 0 && mast_stat & BUFRDERR)
 182                                         return 0;
 183                                 /*
 184                                  * If address not acknowledged return -3,
 185                                  * else return 0.
 186                                  */
 187                                 else if (!(mast_stat & ANAK))
 188                                         return 0;
 189                                 else
 190                                         return -3;
 191                         }
 192                         return -1;
 193                 }
 194                 if (MCOMP & twi_int_stat) {
 195                         bfin_write_TWI_INT_STAT(MCOMP);
 196                         sync();
 197                         bfin_write_TWI_INT_MASK(0);
 198                         bfin_write_TWI_MASTER_CTL(0);
 199                         sync();
 200                         return 0;
 201                 }
 202         }
 203         if (msg->flags & I2C_M_RD)
 204                 return -4;
 205         else
 206                 return -2;
 207 }
 208
 209 /**
 210  * i2c_transfer: - Transfer one byte over the i2c bus
 211  *
 212  * This function can tranfer a byte over the i2c bus in both directions.
 213  * It is used by the public API functions.
 214  *
 215  * @return:      0: transfer successful
 216  *              -1: transfer fail
 217  *              -2: transmit timeout
 218  *              -3: ACK missing
 219  *              -4: receive timeout
 220  *              -5: controller not ready
 221  */
 222 int i2c_transfer(struct i2c_msg *msg)
 223 {
 224         int ret = 0;
 225         int timeout_count = 10000;
 226         int len = msg->len;
 227
 228         if (!(bfin_read_TWI_CONTROL() & TWI_ENA)) {
 229                 ret = -5;
 230                 goto transfer_error;
 231         }
 232
 233         while (bfin_read_TWI_MASTER_STAT() & BUSBUSY) ;
 234
 235         /* Set Transmit device address */
 236         bfin_write_TWI_MASTER_ADDR(msg->addr);
 237
 238         /*
 239          * FIFO Initiation.
 240          * Data in FIFO should be discarded before start a new operation.
 241          */
 242         bfin_write_TWI_FIFO_CTL(0x3);
 243         sync();
 244         bfin_write_TWI_FIFO_CTL(0);
 245         sync();
 246
 247         if (!(msg->flags & I2C_M_RD)) {
 248                 /* Transmit first data */
 249                 if (msg->len > 0) {
 250                         PRINTD("1 in i2c_transfer: buf=%d, len=%d\n", *msg->buf,
 251                                len);
 252                         bfin_write_TWI_XMT_DATA8(*(msg->buf++));
 253                         msg->len--;
 254                         sync();
 255                 }
 256         }
 257
 258         /* clear int stat */
 259         bfin_write_TWI_INT_STAT(MERR | MCOMP | XMTSERV | RCVSERV);
 260
 261         /* Interrupt mask . Enable XMT, RCV interrupt */
 262         bfin_write_TWI_INT_MASK(MCOMP | MERR |
 263                         ((msg->flags & I2C_M_RD) ? RCVSERV : XMTSERV));
 264         sync();
 265
 266         if (len > 0 && len <= 255)
 267                 bfin_write_TWI_MASTER_CTL((len << 6));
 268         else if (msg->len > 255) {
 269                 bfin_write_TWI_MASTER_CTL((0xff << 6));
 270                 msg->flags &= I2C_M_STOP;
 271         } else
 272                 bfin_write_TWI_MASTER_CTL(0);
 273
 274         /* Master enable */
 275         bfin_write_TWI_MASTER_CTL(bfin_read_TWI_MASTER_CTL() | MEN |
 276                         ((msg->flags & I2C_M_RD)
 277                          ? MDIR : 0) | ((CONFIG_TWICLK_KHZ >
 278                                          100) ? FAST : 0));
 279         sync();
 280
 281         ret = wait_for_completion(msg, timeout_count);
 282         PRINTD("3 in i2c_transfer: ret=%d\n", ret);
 283
 284 transfer_error:
 285         switch (ret) {
 286         case 1:
 287                 PRINTD(("i2c_transfer: error: transfer fail\n"));
 288                 break;
 289         case 2:
 290                 PRINTD(("i2c_transfer: error: transmit timeout\n"));
 291                 break;
 292         case 3:
 293                 PRINTD(("i2c_transfer: error: ACK missing\n"));
 294                 break;
 295         case 4:
 296                 PRINTD(("i2c_transfer: error: receive timeout\n"));
 297                 break;
 298         case 5:
 299                 PRINTD(("i2c_transfer: error: controller not ready\n"));
 300                 i2c_reset();
 301                 break;
 302         default:
 303                 break;
 304         }
 305         return ret;
 306
 307 }
 308
 309 /* ---------------------------------------------------------------------*/
 310 /* API Functions                                                        */
 311 /* ---------------------------------------------------------------------*/
 312
 313 void i2c_init(int speed, int slaveaddr)
 314 {
 315         i2c_reset();
 316 }
 317
 318 /**
 319  * i2c_probe: - Test if a chip answers for a given i2c address
 320  *
 321  * @chip:       address of the chip which is searched for
 322  * @return:     0 if a chip was found, -1 otherwhise
 323  */
 324
 325 int i2c_probe(uchar chip)
 326 {
 327         struct i2c_msg msg;
 328         u8 probebuf;
 329
 330         i2c_reset();
 331
 332         probebuf = 0;
 333         msg.addr = chip;
 334         msg.flags = 0;
 335         msg.len = 1;
 336         msg.buf = &probebuf;
 337         if (i2c_transfer(&msg))
 338                 return -1;
 339
 340         msg.addr = chip;
 341         msg.flags = I2C_M_RD;
 342         msg.len = 1;
 343         msg.buf = &probebuf;
 344         if (i2c_transfer(&msg))
 345                 return -1;
 346
 347         return 0;
 348 }
 349
 350 /**
 351  *   i2c_read: - Read multiple bytes from an i2c device
 352  *
 353  *   chip:    I2C chip address, range 0..127
 354  *   addr:    Memory (register) address within the chip
 355  *   alen:    Number of bytes to use for addr (typically 1, 2 for larger
 356  *              memories, 0 for register type devices with only one
 357  *              register)
 358  *   buffer:  Where to read/write the data
 359  *   len:     How many bytes to read/write
 360  *
 361  *   Returns: 0 on success, not 0 on failure
 362  */
 363
 364 int i2c_read(uchar chip, uint addr, int alen, uchar * buffer, int len)
 365 {
 366         struct i2c_msg msg;
 367         u8 addr_bytes[3];       /* lowest...highest byte of data address */
 368
 369         PRINTD("i2c_read: chip=0x%x, addr=0x%x, alen=0x%x, len=0x%x\n", chip,
 370                         addr, alen, len);
 371
 372         if (alen > 0) {
 373                 addr_bytes[0] = (u8) ((addr >> 0) & 0x000000FF);
 374                 addr_bytes[1] = (u8) ((addr >> 8) & 0x000000FF);
 375                 addr_bytes[2] = (u8) ((addr >> 16) & 0x000000FF);
 376                 msg.addr = chip;
 377                 msg.flags = 0;
 378                 msg.len = alen;
 379                 msg.buf = addr_bytes;
 380                 if (i2c_transfer(&msg))
 381                         return -1;
 382         }
 383
 384         /* start read sequence */
 385         PRINTD(("i2c_read: start read sequence\n"));
 386         msg.addr = chip;
 387         msg.flags = I2C_M_RD;
 388         msg.len = len;
 389         msg.buf = buffer;
 390         if (i2c_transfer(&msg))
 391                 return -1;
 392
 393         return 0;
 394 }
 395
 396 /**
 397  *   i2c_write: -  Write multiple bytes to an i2c device
 398  *
 399  *   chip:    I2C chip address, range 0..127
 400  *   addr:    Memory (register) address within the chip
 401  *   alen:    Number of bytes to use for addr (typically 1, 2 for larger
 402  *              memories, 0 for register type devices with only one
 403  *              register)
 404  *   buffer:  Where to read/write the data
 405  *   len:     How many bytes to read/write
 406  *
 407  *   Returns: 0 on success, not 0 on failure
 408  */
 409
 410 int i2c_write(uchar chip, uint addr, int alen, uchar * buffer, int len)
 411 {
 412         struct i2c_msg msg;
 413         u8 addr_bytes[3];       /* lowest...highest byte of data address */
 414
 415         PRINTD
 416                 ("i2c_write: chip=0x%x, addr=0x%x, alen=0x%x, len=0x%x, buf0=0x%x\n",
 417                  chip, addr, alen, len, buffer[0]);
 418
 419         /* chip address write */
 420         if (alen > 0) {
 421                 addr_bytes[0] = (u8) ((addr >> 0) & 0x000000FF);
 422                 addr_bytes[1] = (u8) ((addr >> 8) & 0x000000FF);
 423                 addr_bytes[2] = (u8) ((addr >> 16) & 0x000000FF);
 424                 msg.addr = chip;
 425                 msg.flags = 0;
 426                 msg.len = alen;
 427                 msg.buf = addr_bytes;
 428                 if (i2c_transfer(&msg))
 429                         return -1;
 430         }
 431
 432         /* start read sequence */
 433         PRINTD(("i2c_write: start write sequence\n"));
 434         msg.addr = chip;
 435         msg.flags = 0;
 436         msg.len = len;
 437         msg.buf = buffer;
 438         if (i2c_transfer(&msg))
 439                 return -1;
 440
 441         return 0;
 442
 443 }
 444
 445 uchar i2c_reg_read(uchar chip, uchar reg)
 446 {
 447         uchar buf;
 448
 449         PRINTD("i2c_reg_read: chip=0x%02x, reg=0x%02x\n", chip, reg);
 450         i2c_read(chip, reg, 0, &buf, 1);
 451         return (buf);
 452 }
 453
 454 void i2c_reg_write(uchar chip, uchar reg, uchar val)
 455 {
 456         PRINTD("i2c_reg_write: chip=0x%02x, reg=0x%02x, val=0x%02x\n", chip,
 457                         reg, val);
 458         i2c_write(chip, reg, 0, &val, 1);
 459 }
 460
 461 #endif                          /* CONFIG_HARD_I2C */