2 * U-boot - cpu.c CPU specific functions
4 * Copyright (c) 2005-2007 Analog Devices Inc.
6 * (C) Copyright 2000-2004
7 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
9 * See file CREDITS for list of people who contributed to this
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License as
14 * published by the Free Software Foundation; either version 2 of
15 * the License, or (at your option) any later version.
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
29 #include <asm/blackfin.h>
31 #include <asm/entry.h>
38 extern unsigned int icplb_table[page_descriptor_table_size][2];
39 extern unsigned int dcplb_table[page_descriptor_table_size][2];
41 int do_reset(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
43 __asm__ __volatile__("cli r3;" "P0 = %0;" "JUMP (P0);"::"r"(L1_INST_SRAM)
49 /* These functions are just used to satisfy the linker */
55 int cleanup_before_linux(void)
60 void icache_enable(void)
62 unsigned int *I0, *I1;
65 if ((*pCHIPID >> 28) < 2)
68 /* Before enable icache, disable it first */
70 I0 = (unsigned int *)ICPLB_ADDR0;
71 I1 = (unsigned int *)ICPLB_DATA0;
73 /* make sure the locked ones go in first */
74 for (i = 0; i < page_descriptor_table_size; i++) {
75 if (CPLB_LOCK & icplb_table[i][1]) {
76 debug("adding %02i %02i 0x%08x 0x%08x\n", i, j,
77 icplb_table[i][0], icplb_table[i][1]);
78 *I0++ = icplb_table[i][0];
79 *I1++ = icplb_table[i][1];
84 for (i = 0; i < page_descriptor_table_size; i++) {
85 if (!(CPLB_LOCK & icplb_table[i][1])) {
86 debug("adding %02i %02i 0x%08x 0x%08x\n", i, j,
87 icplb_table[i][0], icplb_table[i][1]);
88 *I0++ = icplb_table[i][0];
89 *I1++ = icplb_table[i][1];
97 /* Fill the rest with invalid entry */
100 debug("filling %i with 0", j);
108 *(unsigned int *)IMEM_CONTROL = IMC | ENICPLB;
112 void icache_disable(void)
114 if ((*pCHIPID >> 28) < 2)
118 *(unsigned int *)IMEM_CONTROL &= ~(IMC | ENICPLB);
122 int icache_status(void)
125 value = *(unsigned int *)IMEM_CONTROL;
127 if (value & (IMC | ENICPLB))
133 void dcache_enable(void)
135 unsigned int *I0, *I1;
139 /* Before enable dcache, disable it first */
141 I0 = (unsigned int *)DCPLB_ADDR0;
142 I1 = (unsigned int *)DCPLB_DATA0;
144 /* make sure the locked ones go in first */
145 for (i = 0; i < page_descriptor_table_size; i++) {
146 if (CPLB_LOCK & dcplb_table[i][1]) {
147 debug("adding %02i %02i 0x%08x 0x%08x\n", i, j,
148 dcplb_table[i][0], dcplb_table[i][1]);
149 *I0++ = dcplb_table[i][0];
150 *I1++ = dcplb_table[i][1];
153 debug("skip %02i %02i 0x%08x 0x%08x\n", i, j,
154 dcplb_table[i][0], dcplb_table[i][1]);
158 for (i = 0; i < page_descriptor_table_size; i++) {
159 if (!(CPLB_LOCK & dcplb_table[i][1])) {
160 debug("adding %02i %02i 0x%08x 0x%08x\n", i, j,
161 dcplb_table[i][0], dcplb_table[i][1]);
162 *I0++ = dcplb_table[i][0];
163 *I1++ = dcplb_table[i][1];
171 /* Fill the rest with invalid entry */
173 for (; j < 16; j++) {
174 debug("filling %i with 0", j);
179 temp = *(unsigned int *)DMEM_CONTROL;
182 *(unsigned int *)DMEM_CONTROL =
183 ACACHE_BCACHE | ENDCPLB | PORT_PREF0 | temp;
187 void dcache_disable(void)
189 unsigned int *I0, *I1;
194 *(unsigned int *)DMEM_CONTROL &=
195 ~(ACACHE_BCACHE | ENDCPLB | PORT_PREF0);
198 /* after disable dcache,
199 * clear it so we don't confuse the next application
201 I0 = (unsigned int *)DCPLB_ADDR0;
202 I1 = (unsigned int *)DCPLB_DATA0;
204 for (i = 0; i < 16; i++) {
210 int dcache_status(void)
213 value = *(unsigned int *)DMEM_CONTROL;
215 if (value & (ENDCPLB))