2 * armboot - Startup Code for ARM720 CPU-core
4 * Copyright (c) 2001 Marius Gröger <mag@sysgo.de>
5 * Copyright (c) 2002 Alex Züpke <azu@sysgo.de>
7 * See file CREDITS for list of people who contributed to this
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
32 *************************************************************************
34 * Jump vector table as in table 3.1 in [1]
36 *************************************************************************
42 ldr pc, _undefined_instruction
43 ldr pc, _software_interrupt
44 ldr pc, _prefetch_abort
50 _undefined_instruction: .word undefined_instruction
51 _software_interrupt: .word software_interrupt
52 _prefetch_abort: .word prefetch_abort
53 _data_abort: .word data_abort
54 _not_used: .word not_used
58 .balignl 16,0xdeadbeef
62 *************************************************************************
64 * Startup Code (reset vector)
66 * do important init only if we don't start from memory!
67 * relocate armboot to ram
69 * jump to second stage
71 *************************************************************************
82 * These are defined in the board-specific linker script.
93 /* IRQ stack memory (calculated at run-time) */
94 .globl IRQ_STACK_START
98 /* IRQ stack memory (calculated at run-time) */
99 .globl FIQ_STACK_START
106 * the actual reset code
111 * set the cpu to SVC32 mode
115 orr r0,r0,#0xd3 /* was 13 */
118 #ifdef CONFIG_BOOTBINFUNC
119 /* code based on entry.S from ATMEL */
120 #define AT91C_BASE_CKGR 0xFFFFFC20
122 /* Get the CKGR Base Address */
123 ldr r1, =AT91C_BASE_CKGR
125 /* Main oscillator Enable register APMC_MOR : Enable main oscillator , OSCOUNT = 0xFF */
126 /* ldr r0, = AT91C_CKGR_MOSCEN:OR:AT91C_CKGR_OSCOUNT */
128 str r0, [r1, #CKGR_MOR]
129 /* Add loop to compensate Main Oscillator startup time */
137 /* Insure word alignment */
142 * This does a lot more than just set up the memory, which
143 * is why it's called lowlevelinit
145 bl lowlevelinit /* in memsetup.S */
147 /*------------------------------------
148 Read/modify/write CP15 control register
149 -------------------------------------
150 read cp15 control register (cp15 r1) in r0
151 ------------------------------------*/
152 mrc p15, 0, r0, c1, c0, 0
153 /* Reset bit :Little Endian end fast bus mode */
155 /* Set bit :Asynchronous clock mode, Not Fast Bus */
159 /* write r0 in cp15 control register (cp15 r1) */
160 mcr p15, 0, r0, c1, c0, 0
161 #endif /* CONFIG_BOOTBINFUNC */
163 * relocate exeception table
175 * we do sys-critical inits only at reboot,
176 * not when booting from ram!
178 #ifdef CONFIG_INIT_CRITICAL
182 #ifdef CONFIG_BOOTBINFUNC
183 relocate: /* relocate U-Boot to RAM */
184 adr r0, _start /* r0 <- current position of code */
185 ldr r1, _TEXT_BASE /* test if we run from flash or RAM */
186 cmp r0, r1 /* don't reloc during debug */
189 ldr r2, _armboot_start
191 sub r2, r3, r2 /* r2 <- size of armboot */
192 add r2, r0, r2 /* r2 <- source end address */
195 ldmia r0!, {r3-r10} /* copy from source address [r0] */
196 stmia r1!, {r3-r10} /* copy to target address [r1] */
197 cmp r0, r2 /* until source end addreee [r2] */
199 #endif /* CONFIG_BOOTBINFUNC */
201 /* Set up the stack */
203 ldr r0, _TEXT_BASE /* upper 128 KiB: relocated uboot */
204 sub r0, r0, #CFG_MALLOC_LEN /* malloc area */
205 sub r0, r0, #CFG_GBL_DATA_SIZE /* bdinfo */
206 #ifdef CONFIG_USE_IRQ
207 sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ)
209 sub sp, r0, #12 /* leave 3 words for abort-stack */
212 ldr r0, _bss_start /* find start of bss segment */
213 ldr r1, _bss_end /* stop here */
214 mov r2, #0x00000000 /* clear */
216 clbss_l:str r2, [r0] /* clear loop... */
221 ldr pc,_start_armboot
223 _start_armboot: .word start_armboot
226 *************************************************************************
228 * CPU_init_critical registers
230 *************************************************************************
234 /* do nothing for now */
239 *************************************************************************
243 *************************************************************************
249 #define S_FRAME_SIZE 72
271 #define MODE_SVC 0x13
275 * use bad_save_user_regs for abort/prefetch/undef/swi ...
276 * use irq_save_user_regs / irq_restore_user_regs for IRQ/FIQ handling
279 .macro bad_save_user_regs
280 sub sp, sp, #S_FRAME_SIZE
281 stmia sp, {r0 - r12} @ Calling r0-r12
284 ldr r2, _armboot_start
285 sub r2, r2, #(CONFIG_STACKSIZE+CFG_MALLOC_LEN)
286 sub r2, r2, #(CFG_GBL_DATA_SIZE+8) @ set base 2 words into abort stack
287 ldmia r2, {r2 - r4} @ get pc, cpsr, old_r0
288 add r0, sp, #S_FRAME_SIZE @ restore sp_SVC
292 stmia r5, {r0 - r4} @ save sp_SVC, lr_SVC, pc, cpsr, old_r
296 .macro irq_save_user_regs
297 sub sp, sp, #S_FRAME_SIZE
298 stmia sp, {r0 - r12} @ Calling r0-r12
300 stmdb r8, {sp, lr}^ @ Calling SP, LR
301 str lr, [r8, #0] @ Save calling PC
303 str r6, [r8, #4] @ Save CPSR
304 str r0, [r8, #8] @ Save OLD_R0
308 .macro irq_restore_user_regs
309 ldmia sp, {r0 - lr}^ @ Calling r0 - lr
311 ldr lr, [sp, #S_PC] @ Get PC
312 add sp, sp, #S_FRAME_SIZE
313 subs pc, lr, #4 @ return & move spsr_svc into cpsr
317 ldr r13, _armboot_start @ setup our mode stack
318 sub r13, r13, #(CONFIG_STACKSIZE+CFG_MALLOC_LEN)
319 sub r13, r13, #(CFG_GBL_DATA_SIZE+8) @ reserved a couple spots in abort stack
321 str lr, [r13] @ save caller lr / spsr
325 mov r13, #MODE_SVC @ prepare SVC-Mode
331 .macro get_irq_stack @ setup IRQ stack
332 ldr sp, IRQ_STACK_START
335 .macro get_fiq_stack @ setup FIQ stack
336 ldr sp, FIQ_STACK_START
343 undefined_instruction:
346 bl do_undefined_instruction
352 bl do_software_interrupt
372 #ifdef CONFIG_USE_IRQ
379 irq_restore_user_regs
384 /* someone ought to write a more effiction fiq_save_user_regs */
387 irq_restore_user_regs