2 * armboot - Startup Code for ARM926EJS CPU-core
4 * Copyright (c) 2003 Texas Instruments
6 * ----- Adapted for OMAP1610 OMAP730 from ARM925t code ------
8 * Copyright (c) 2001 Marius Gröger <mag@sysgo.de>
9 * Copyright (c) 2002 Alex Züpke <azu@sysgo.de>
10 * Copyright (c) 2002 Gary Jennejohn <gj@denx.de>
11 * Copyright (c) 2003 Richard Woodruff <r-woodruff2@ti.com>
12 * Copyright (c) 2003 Kshitij <kshitij@ti.com>
14 * See file CREDITS for list of people who contributed to this
17 * This program is free software; you can redistribute it and/or
18 * modify it under the terms of the GNU General Public License as
19 * published by the Free Software Foundation; either version 2 of
20 * the License, or (at your option) any later version.
22 * This program is distributed in the hope that it will be useful,
23 * but WITHOUT ANY WARRANTY; without even the implied warranty of
24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
25 * GNU General Public License for more details.
27 * You should have received a copy of the GNU General Public License
28 * along with this program; if not, write to the Free Software
29 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
37 #if defined(CONFIG_OMAP1610)
38 #include <./configs/omap1510.h>
39 #elif defined(CONFIG_OMAP730)
40 #include <./configs/omap730.h>
44 *************************************************************************
46 * Jump vector table as in table 3.1 in [1]
48 *************************************************************************
55 ldr pc, _undefined_instruction
56 ldr pc, _software_interrupt
57 ldr pc, _prefetch_abort
63 _undefined_instruction:
64 .word undefined_instruction
66 .word software_interrupt
78 .balignl 16,0xdeadbeef
82 *************************************************************************
84 * Startup Code (reset vector)
86 * do important init only if we don't start from memory!
87 * setup Memory and board specific bits prior to relocation.
88 * relocate armboot to ram
91 *************************************************************************
102 * These are defined in the board-specific linker script.
112 #ifdef CONFIG_USE_IRQ
113 /* IRQ stack memory (calculated at run-time) */
114 .globl IRQ_STACK_START
118 /* IRQ stack memory (calculated at run-time) */
119 .globl FIQ_STACK_START
126 * the actual reset code
131 * set the cpu to SVC32 mode
139 * we do sys-critical inits only at reboot,
140 * not when booting from ram!
142 #ifdef CONFIG_INIT_CRITICAL
146 relocate: /* relocate U-Boot to RAM */
147 adr r0, _start /* r0 <- current position of code */
148 ldr r1, _TEXT_BASE /* test if we run from flash or RAM */
149 cmp r0, r1 /* don't reloc during debug */
152 ldr r2, _armboot_start
154 sub r2, r3, r2 /* r2 <- size of armboot */
155 add r2, r0, r2 /* r2 <- source end address */
158 ldmia r0!, {r3-r10} /* copy from source address [r0] */
159 stmia r1!, {r3-r10} /* copy to target address [r1] */
160 cmp r0, r2 /* until source end addreee [r2] */
163 /* Set up the stack */
165 ldr r0, _TEXT_BASE /* upper 128 KiB: relocated uboot */
166 sub r0, r0, #CFG_MALLOC_LEN /* malloc area */
167 sub r0, r0, #CFG_GBL_DATA_SIZE /* bdinfo */
168 #ifdef CONFIG_USE_IRQ
169 sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ)
171 sub sp, r0, #12 /* leave 3 words for abort-stack */
174 ldr r0, _bss_start /* find start of bss segment */
175 ldr r1, _bss_end /* stop here */
176 mov r2, #0x00000000 /* clear */
178 clbss_l:str r2, [r0] /* clear loop... */
183 ldr pc, _start_armboot
190 *************************************************************************
192 * CPU_init_critical registers
194 * setup important registers
195 * setup memory timing
197 *************************************************************************
203 * flush v4 I/D caches
206 mcr p15, 0, r0, c7, c7, 0 /* flush v3/v4 cache */
207 mcr p15, 0, r0, c8, c7, 0 /* flush v4 TLB */
210 * disable MMU stuff and caches
212 mrc p15, 0, r0, c1, c0, 0
213 bic r0, r0, #0x00002300 /* clear bits 13, 9:8 (--V- --RS) */
214 bic r0, r0, #0x00000087 /* clear bits 7, 2:0 (B--- -CAM) */
215 orr r0, r0, #0x00000002 /* set bit 2 (A) Align */
216 orr r0, r0, #0x00001000 /* set bit 12 (I) I-Cache */
217 mcr p15, 0, r0, c1, c0, 0
220 * Go setup Memory and board specific bits prior to relocation.
222 mov ip, lr /* perserve link reg across call */
223 bl platformsetup /* go setup pll,mux,memory */
224 mov lr, ip /* restore link */
225 mov pc, lr /* back to my caller */
227 *************************************************************************
231 *************************************************************************
237 #define S_FRAME_SIZE 72
259 #define MODE_SVC 0x13
263 * use bad_save_user_regs for abort/prefetch/undef/swi ...
264 * use irq_save_user_regs / irq_restore_user_regs for IRQ/FIQ handling
267 .macro bad_save_user_regs
268 @ carve out a frame on current user stack
269 sub sp, sp, #S_FRAME_SIZE
270 stmia sp, {r0 - r12} @ Save user registers (now in svc mode) r0-r12
272 ldr r2, _armboot_start
273 sub r2, r2, #(CONFIG_STACKSIZE+CFG_MALLOC_LEN)
274 sub r2, r2, #(CFG_GBL_DATA_SIZE+8) @ set base 2 words into abort stack
275 @ get values for "aborted" pc and cpsr (into parm regs)
277 add r0, sp, #S_FRAME_SIZE @ grab pointer to old stack
280 stmia r5, {r0 - r3} @ save sp_SVC, lr_SVC, pc, cpsr
281 mov r0, sp @ save current stack into r0 (param register)
284 .macro irq_save_user_regs
285 sub sp, sp, #S_FRAME_SIZE
286 stmia sp, {r0 - r12} @ Calling r0-r12
287 @ !!!! R8 NEEDS to be saved !!!! a reserved stack spot would be good.
289 stmdb r8, {sp, lr}^ @ Calling SP, LR
290 str lr, [r8, #0] @ Save calling PC
292 str r6, [r8, #4] @ Save CPSR
293 str r0, [r8, #8] @ Save OLD_R0
297 .macro irq_restore_user_regs
298 ldmia sp, {r0 - lr}^ @ Calling r0 - lr
300 ldr lr, [sp, #S_PC] @ Get PC
301 add sp, sp, #S_FRAME_SIZE
302 subs pc, lr, #4 @ return & move spsr_svc into cpsr
306 ldr r13, _armboot_start @ setup our mode stack
307 sub r13, r13, #(CONFIG_STACKSIZE+CFG_MALLOC_LEN)
308 sub r13, r13, #(CFG_GBL_DATA_SIZE+8) @ reserved a couple spots in abort stack
310 str lr, [r13] @ save caller lr in position 0 of saved stack
311 mrs lr, spsr @ get the spsr
312 str lr, [r13, #4] @ save spsr in position 1 of saved stack
313 mov r13, #MODE_SVC @ prepare SVC-Mode
315 msr spsr, r13 @ switch modes, make sure moves will execute
316 mov lr, pc @ capture return pc
317 movs pc, lr @ jump to next instruction & switch modes.
320 .macro get_irq_stack @ setup IRQ stack
321 ldr sp, IRQ_STACK_START
324 .macro get_fiq_stack @ setup FIQ stack
325 ldr sp, FIQ_STACK_START
332 undefined_instruction:
335 bl do_undefined_instruction
341 bl do_software_interrupt
361 #ifdef CONFIG_USE_IRQ
368 irq_restore_user_regs
373 /* someone ought to write a more effiction fiq_save_user_regs */
376 irq_restore_user_regs
397 ldr r1, rstctl1 /* get clkm1 reset ctl */
399 strh r3, [r1] /* clear it */
401 strh r3, [r1] /* force dsp+arm reset */