2 * armboot - Startup Code for ARM926EJS CPU-core
4 * Copyright (c) 2003 Texas Instruments
6 * ----- Adapted for OMAP1610 from ARM925t code ------
8 * Copyright (c) 2001 Marius Gröger <mag@sysgo.de>
9 * Copyright (c) 2002 Alex Züpke <azu@sysgo.de>
10 * Copyright (c) 2002 Gary Jennejohn <gj@denx.de>
11 * Copyright (c) 2003 Richard Woodruff <r-woodruff2@ti.com>
12 * Copyright (c) 2003 Kshitij <kshitij@ti.com>
14 * See file CREDITS for list of people who contributed to this
17 * This program is free software; you can redistribute it and/or
18 * modify it under the terms of the GNU General Public License as
19 * published by the Free Software Foundation; either version 2 of
20 * the License, or (at your option) any later version.
22 * This program is distributed in the hope that it will be useful,
23 * but WITHOUT ANY WARRANTY; without even the implied warranty of
24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
25 * GNU General Public License for more details.
27 * You should have received a copy of the GNU General Public License
28 * along with this program; if not, write to the Free Software
29 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
37 #if defined(CONFIG_OMAP1610)
38 #include <./configs/omap1510.h>
42 *************************************************************************
44 * Jump vector table as in table 3.1 in [1]
46 *************************************************************************
53 ldr pc, _undefined_instruction
54 ldr pc, _software_interrupt
55 ldr pc, _prefetch_abort
61 _undefined_instruction:
62 .word undefined_instruction
64 .word software_interrupt
76 .balignl 16,0xdeadbeef
80 *************************************************************************
82 * Startup Code (reset vector)
84 * do important init only if we don't start from memory!
85 * setup Memory and board specific bits prior to relocation.
86 * relocate armboot to ram
89 *************************************************************************
100 * Note: _armboot_end_data and _armboot_end are defined
101 * by the (board-dependent) linker script.
102 * _armboot_end_data is the first usable FLASH address after armboot
104 .globl _armboot_end_data
106 .word armboot_end_data
112 * _armboot_real_end is the first usable RAM address behind armboot
113 * and the various stacks
115 .globl _armboot_real_end
119 #ifdef CONFIG_USE_IRQ
120 /* IRQ stack memory (calculated at run-time) */
121 .globl IRQ_STACK_START
125 /* IRQ stack memory (calculated at run-time) */
126 .globl FIQ_STACK_START
133 * the actual reset code
138 * set the cpu to SVC32 mode
147 * turn off the watchdog, unlock/diable sequence
157 * mask all IRQs by setting all bits in the INTMR - default
161 ldr r0, =REG_IHL1_MIR
163 ldr r0, =REG_IHL2_MIR
169 * relocate armboot to RAM
171 adr r0, _start /* r0 <- current position of code */
172 ldr r2, _armboot_start
174 sub r2, r3, r2 /* r2 <- size of armboot */
175 ldr r1, _TEXT_BASE /* r1 <- destination address */
176 add r2, r0, r2 /* r2 <- source end address */
179 * r0 = source address
180 * r1 = target address
181 * r2 = source end address
189 /* set up the stack */
191 add r0, r0, #CONFIG_STACKSIZE
192 sub sp, r0, #12 /* leave 3 words for abort-stack */
194 ldr pc, _start_armboot
201 *************************************************************************
203 * CPU_init_critical registers
205 * setup important registers
206 * setup memory timing
208 *************************************************************************
214 * flush v4 I/D caches
217 mcr p15, 0, r0, c7, c7, 0 /* flush v3/v4 cache */
218 mcr p15, 0, r0, c8, c7, 0 /* flush v4 TLB */
221 * disable MMU stuff and caches
223 mrc p15, 0, r0, c1, c0, 0
224 bic r0, r0, #0x00002300 /* clear bits 13, 9:8 (--V- --RS) */
225 bic r0, r0, #0x00000087 /* clear bits 7, 2:0 (B--- -CAM) */
226 orr r0, r0, #0x00000002 /* set bit 2 (A) Align */
227 orr r0, r0, #0x00001000 /* set bit 12 (I) I-Cache */
228 mcr p15, 0, r0, c1, c0, 0
231 * Go setup Memory and board specific bits prior to relocation.
233 mov ip, lr /* perserve link reg across call */
234 bl platformsetup /* go setup pll,mux,memory */
235 mov lr, ip /* restore link */
236 mov pc, lr /* back to my caller */
238 *************************************************************************
242 *************************************************************************
248 #define S_FRAME_SIZE 72
270 #define MODE_SVC 0x13
274 * use bad_save_user_regs for abort/prefetch/undef/swi ...
275 * use irq_save_user_regs / irq_restore_user_regs for IRQ/FIQ handling
278 .macro bad_save_user_regs
279 @ carve out a frame on current user stack
280 sub sp, sp, #S_FRAME_SIZE
281 stmia sp, {r0 - r12} @ Save user registers (now in svc mode) r0-r12
282 ldr r2, _armboot_end @ find top of stack
283 add r2, r2, #CONFIG_STACKSIZE @ find base of normal stack
284 sub r2, r2, #8 @ set base 2 words into abort stack
285 @ get values for "aborted" pc and cpsr (into parm regs)
287 add r0, sp, #S_FRAME_SIZE @ grab pointer to old stack
290 stmia r5, {r0 - r3} @ save sp_SVC, lr_SVC, pc, cpsr
291 mov r0, sp @ save current stack into r0 (param register)
294 .macro irq_save_user_regs
295 sub sp, sp, #S_FRAME_SIZE
296 stmia sp, {r0 - r12} @ Calling r0-r12
297 @ !!!! R8 NEEDS to be saved !!!! a reserved stack spot would be good.
299 stmdb r8, {sp, lr}^ @ Calling SP, LR
300 str lr, [r8, #0] @ Save calling PC
302 str r6, [r8, #4] @ Save CPSR
303 str r0, [r8, #8] @ Save OLD_R0
307 .macro irq_restore_user_regs
308 ldmia sp, {r0 - lr}^ @ Calling r0 - lr
310 ldr lr, [sp, #S_PC] @ Get PC
311 add sp, sp, #S_FRAME_SIZE
312 subs pc, lr, #4 @ return & move spsr_svc into cpsr
316 @ get bottom of stack (into sp by by user stack pointer).
317 ldr r13, _armboot_end
318 @ head to reserved words at the top of the stack
319 add r13, r13, #CONFIG_STACKSIZE
320 sub r13, r13, #8 @ reserved a couple spots in abort stack
322 str lr, [r13] @ save caller lr in position 0 of saved stack
323 mrs lr, spsr @ get the spsr
324 str lr, [r13, #4] @ save spsr in position 1 of saved stack
325 mov r13, #MODE_SVC @ prepare SVC-Mode
327 msr spsr, r13 @ switch modes, make sure moves will execute
328 mov lr, pc @ capture return pc
329 movs pc, lr @ jump to next instruction & switch modes.
332 .macro get_irq_stack @ setup IRQ stack
333 ldr sp, IRQ_STACK_START
336 .macro get_fiq_stack @ setup FIQ stack
337 ldr sp, FIQ_STACK_START
344 undefined_instruction:
347 bl do_undefined_instruction
353 bl do_software_interrupt
373 #ifdef CONFIG_USE_IRQ
380 irq_restore_user_regs
385 /* someone ought to write a more effiction fiq_save_user_regs */
388 irq_restore_user_regs
409 ldr r1, rstctl1 /* get clkm1 reset ctl */
411 strh r3, [r1] /* clear it */
413 strh r3, [r1] /* force dsp+arm reset */