2 * Ethernet driver for TI TMS320DM644x (DaVinci) chips.
4 * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
6 * Parts shamelessly stolen from TI's dm644x_emac.c. Original copyright
9 * ----------------------------------------------------------------------------
13 * TI DaVinci (DM644X) EMAC peripheral driver source for DV-EVM
15 * Copyright (C) 2005 Texas Instruments.
17 * ----------------------------------------------------------------------------
19 * This program is free software; you can redistribute it and/or modify
20 * it under the terms of the GNU General Public License as published by
21 * the Free Software Foundation; either version 2 of the License, or
22 * (at your option) any later version.
24 * This program is distributed in the hope that it will be useful,
25 * but WITHOUT ANY WARRANTY; without even the implied warranty of
26 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
27 * GNU General Public License for more details.
29 * You should have received a copy of the GNU General Public License
30 * along with this program; if not, write to the Free Software
31 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
32 * ----------------------------------------------------------------------------
35 * ver. 1.0: Sep 2005, Anant Gole - Created EMAC version for uBoot.
36 * ver 1.1: Nov 2005, Anant Gole - Extended the RX logic for multiple descriptors
43 #include <asm/arch/emac_defs.h>
45 #ifdef CONFIG_DRIVER_TI_EMAC
49 unsigned int emac_dbg = 0;
50 #define debug_emac(fmt,args...) if (emac_dbg) printf(fmt,##args)
52 /* Internal static functions */
53 static int davinci_eth_hw_init (void);
54 static int davinci_eth_open (void);
55 static int davinci_eth_close (void);
56 static int davinci_eth_send_packet (volatile void *packet, int length);
57 static int davinci_eth_rcv_packet (void);
58 static void davinci_eth_mdio_enable(void);
60 static int gen_init_phy(int phy_addr);
61 static int gen_is_phy_connected(int phy_addr);
62 static int gen_get_link_speed(int phy_addr);
63 static int gen_auto_negotiate(int phy_addr);
65 /* Wrappers exported to the U-Boot proper */
68 return(davinci_eth_hw_init());
71 int eth_init(bd_t * bd)
73 return(davinci_eth_open());
81 int eth_send(volatile void *packet, int length)
83 return(davinci_eth_send_packet(packet, length));
88 return(davinci_eth_rcv_packet());
91 void eth_mdio_enable(void)
93 davinci_eth_mdio_enable();
98 static u_int8_t davinci_eth_mac_addr[] = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff };
101 * This function must be called before emac_open() if you want to override
102 * the default mac address.
104 void davinci_eth_set_mac_addr(const u_int8_t *addr)
108 for (i = 0; i < sizeof (davinci_eth_mac_addr); i++) {
109 davinci_eth_mac_addr[i] = addr[i];
114 static volatile emac_regs *adap_emac = (emac_regs *)EMAC_BASE_ADDR;
115 static volatile ewrap_regs *adap_ewrap = (ewrap_regs *)EMAC_WRAPPER_BASE_ADDR;
116 static volatile mdio_regs *adap_mdio = (mdio_regs *)EMAC_MDIO_BASE_ADDR;
118 /* EMAC descriptors */
119 static volatile emac_desc *emac_rx_desc = (emac_desc *)(EMAC_WRAPPER_RAM_ADDR + EMAC_RX_DESC_BASE);
120 static volatile emac_desc *emac_tx_desc = (emac_desc *)(EMAC_WRAPPER_RAM_ADDR + EMAC_TX_DESC_BASE);
121 static volatile emac_desc *emac_rx_active_head = 0;
122 static volatile emac_desc *emac_rx_active_tail = 0;
123 static int emac_rx_queue_active = 0;
125 /* Receive packet buffers */
126 static unsigned char emac_rx_buffers[EMAC_MAX_RX_BUFFERS * (EMAC_MAX_ETHERNET_PKT_SIZE + EMAC_PKT_ALIGN)];
128 /* PHY address for a discovered PHY (0xff - not found) */
129 static volatile u_int8_t active_phy_addr = 0xff;
133 static void davinci_eth_mdio_enable(void)
137 clkdiv = (EMAC_MDIO_BUS_FREQ / EMAC_MDIO_CLOCK_FREQ) - 1;
139 adap_mdio->CONTROL = (clkdiv & 0xff) |
140 MDIO_CONTROL_ENABLE |
142 MDIO_CONTROL_FAULT_ENABLE;
144 while (adap_mdio->CONTROL & MDIO_CONTROL_IDLE) {;}
148 * Tries to find an active connected PHY. Returns 1 if address if found.
149 * If no active PHY (or more than one PHY) found returns 0.
150 * Sets active_phy_addr variable.
152 static int davinci_eth_phy_detect(void)
154 u_int32_t phy_act_state;
157 active_phy_addr = 0xff;
159 if ((phy_act_state = adap_mdio->ALIVE) == 0)
160 return(0); /* No active PHYs */
162 debug_emac("davinci_eth_phy_detect(), ALIVE = 0x%08x\n", phy_act_state);
164 for (i = 0; i < 32; i++) {
165 if (phy_act_state & (1 << i)) {
166 if (phy_act_state & ~(1 << i))
167 return(0); /* More than one PHY */
175 return(0); /* Just to make GCC happy */
179 /* Read a PHY register via MDIO inteface. Returns 1 on success, 0 otherwise */
180 int davinci_eth_phy_read(u_int8_t phy_addr, u_int8_t reg_num, u_int16_t *data)
184 while (adap_mdio->USERACCESS0 & MDIO_USERACCESS0_GO) {;}
186 adap_mdio->USERACCESS0 = MDIO_USERACCESS0_GO |
187 MDIO_USERACCESS0_WRITE_READ |
188 ((reg_num & 0x1f) << 21) |
189 ((phy_addr & 0x1f) << 16);
191 /* Wait for command to complete */
192 while ((tmp = adap_mdio->USERACCESS0) & MDIO_USERACCESS0_GO) {;}
194 if (tmp & MDIO_USERACCESS0_ACK) {
195 *data = tmp & 0xffff;
203 /* Write to a PHY register via MDIO inteface. Blocks until operation is complete. */
204 int davinci_eth_phy_write(u_int8_t phy_addr, u_int8_t reg_num, u_int16_t data)
207 while (adap_mdio->USERACCESS0 & MDIO_USERACCESS0_GO) {;}
209 adap_mdio->USERACCESS0 = MDIO_USERACCESS0_GO |
210 MDIO_USERACCESS0_WRITE_WRITE |
211 ((reg_num & 0x1f) << 21) |
212 ((phy_addr & 0x1f) << 16) |
215 /* Wait for command to complete */
216 while (adap_mdio->USERACCESS0 & MDIO_USERACCESS0_GO) {;}
221 /* PHY functions for a generic PHY */
222 static int gen_init_phy(int phy_addr)
226 if (gen_get_link_speed(phy_addr)) {
227 /* Try another time */
228 ret = gen_get_link_speed(phy_addr);
234 static int gen_is_phy_connected(int phy_addr)
238 return(davinci_eth_phy_read(phy_addr, PHY_PHYIDR1, &dummy));
241 static int gen_get_link_speed(int phy_addr)
245 if (davinci_eth_phy_read(phy_addr, MII_STATUS_REG, &tmp) && (tmp & 0x04))
251 static int gen_auto_negotiate(int phy_addr)
255 if (!davinci_eth_phy_read(phy_addr, PHY_BMCR, &tmp))
258 /* Restart Auto_negotiation */
259 tmp |= PHY_BMCR_AUTON;
260 davinci_eth_phy_write(phy_addr, PHY_BMCR, tmp);
262 /*check AutoNegotiate complete */
264 if (!davinci_eth_phy_read(phy_addr, PHY_BMSR, &tmp))
267 if (!(tmp & PHY_BMSR_AUTN_COMP))
270 return(gen_get_link_speed(phy_addr));
272 /* End of generic PHY functions */
275 #if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
276 static int davinci_mii_phy_read(char *devname, unsigned char addr, unsigned char reg, unsigned short *value)
278 return(davinci_eth_phy_read(addr, reg, value) ? 0 : 1);
281 static int davinci_mii_phy_write(char *devname, unsigned char addr, unsigned char reg, unsigned short value)
283 return(davinci_eth_phy_write(addr, reg, value) ? 0 : 1);
286 int davinci_eth_miiphy_initialize(bd_t *bis)
288 miiphy_register(phy.name, davinci_mii_phy_read, davinci_mii_phy_write);
295 * This function initializes the emac hardware. It does NOT initialize
296 * EMAC modules power or pin multiplexors, that is done by board_init()
297 * much earlier in bootup process. Returns 1 on success, 0 otherwise.
299 static int davinci_eth_hw_init(void)
305 davinci_eth_mdio_enable();
307 for (i = 0; i < 256; i++) {
308 if (adap_mdio->ALIVE)
314 printf("No ETH PHY detected!!!\n");
318 /* Find if a PHY is connected and get it's address */
319 if (!davinci_eth_phy_detect())
322 /* Get PHY ID and initialize phy_ops for a detected PHY */
323 if (!davinci_eth_phy_read(active_phy_addr, PHY_PHYIDR1, &tmp)) {
324 active_phy_addr = 0xff;
328 phy_id = (tmp << 16) & 0xffff0000;
330 if (!davinci_eth_phy_read(active_phy_addr, PHY_PHYIDR2, &tmp)) {
331 active_phy_addr = 0xff;
335 phy_id |= tmp & 0x0000ffff;
339 sprintf(phy.name, "LXT972 @ 0x%02x", active_phy_addr);
340 phy.init = lxt972_init_phy;
341 phy.is_phy_connected = lxt972_is_phy_connected;
342 phy.get_link_speed = lxt972_get_link_speed;
343 phy.auto_negotiate = lxt972_auto_negotiate;
346 sprintf(phy.name, "DP83848 @ 0x%02x", active_phy_addr);
347 phy.init = dp83848_init_phy;
348 phy.is_phy_connected = dp83848_is_phy_connected;
349 phy.get_link_speed = dp83848_get_link_speed;
350 phy.auto_negotiate = dp83848_auto_negotiate;
353 sprintf(phy.name, "GENERIC @ 0x%02x", active_phy_addr);
354 phy.init = gen_init_phy;
355 phy.is_phy_connected = gen_is_phy_connected;
356 phy.get_link_speed = gen_get_link_speed;
357 phy.auto_negotiate = gen_auto_negotiate;
360 printf("Ethernet PHY: %s\n", phy.name);
366 /* Eth device open */
367 static int davinci_eth_open(void)
370 u_int32_t clkdiv, cnt;
371 volatile emac_desc *rx_desc;
373 debug_emac("+ emac_open\n");
375 /* Reset EMAC module and disable interrupts in wrapper */
376 adap_emac->SOFTRESET = 1;
377 while (adap_emac->SOFTRESET != 0) {;}
378 adap_ewrap->EWCTL = 0;
379 for (cnt = 0; cnt < 5; cnt++) {
380 clkdiv = adap_ewrap->EWCTL;
383 rx_desc = emac_rx_desc;
385 adap_emac->TXCONTROL = 0x01;
386 adap_emac->RXCONTROL = 0x01;
388 /* Set MAC Addresses & Init multicast Hash to 0 (disable any multicast receive) */
389 /* Using channel 0 only - other channels are disabled */
390 adap_emac->MACINDEX = 0;
391 adap_emac->MACADDRHI =
392 (davinci_eth_mac_addr[3] << 24) |
393 (davinci_eth_mac_addr[2] << 16) |
394 (davinci_eth_mac_addr[1] << 8) |
395 (davinci_eth_mac_addr[0]);
396 adap_emac->MACADDRLO =
397 (davinci_eth_mac_addr[5] << 8) |
398 (davinci_eth_mac_addr[4]);
400 adap_emac->MACHASH1 = 0;
401 adap_emac->MACHASH2 = 0;
403 /* Set source MAC address - REQUIRED */
404 adap_emac->MACSRCADDRHI =
405 (davinci_eth_mac_addr[3] << 24) |
406 (davinci_eth_mac_addr[2] << 16) |
407 (davinci_eth_mac_addr[1] << 8) |
408 (davinci_eth_mac_addr[0]);
409 adap_emac->MACSRCADDRLO =
410 (davinci_eth_mac_addr[4] << 8) |
411 (davinci_eth_mac_addr[5]);
413 /* Set DMA 8 TX / 8 RX Head pointers to 0 */
414 addr = &adap_emac->TX0HDP;
415 for(cnt = 0; cnt < 16; cnt++)
418 addr = &adap_emac->RX0HDP;
419 for(cnt = 0; cnt < 16; cnt++)
422 /* Clear Statistics (do this before setting MacControl register) */
423 addr = &adap_emac->RXGOODFRAMES;
424 for(cnt = 0; cnt < EMAC_NUM_STATS; cnt++)
427 /* No multicast addressing */
428 adap_emac->MACHASH1 = 0;
429 adap_emac->MACHASH2 = 0;
431 /* Create RX queue and set receive process in place */
432 emac_rx_active_head = emac_rx_desc;
433 for (cnt = 0; cnt < EMAC_MAX_RX_BUFFERS; cnt++) {
434 rx_desc->next = (u_int32_t)(rx_desc + 1);
435 rx_desc->buffer = &emac_rx_buffers[cnt * (EMAC_MAX_ETHERNET_PKT_SIZE + EMAC_PKT_ALIGN)];
436 rx_desc->buff_off_len = EMAC_MAX_ETHERNET_PKT_SIZE;
437 rx_desc->pkt_flag_len = EMAC_CPPI_OWNERSHIP_BIT;
441 /* Set the last descriptor's "next" parameter to 0 to end the RX desc list */
444 emac_rx_active_tail = rx_desc;
445 emac_rx_queue_active = 1;
448 adap_emac->RXMAXLEN = EMAC_MAX_ETHERNET_PKT_SIZE;
449 adap_emac->RXBUFFEROFFSET = 0;
451 /* No fancy configs - Use this for promiscous for debug - EMAC_RXMBPENABLE_RXCAFEN_ENABLE */
452 adap_emac->RXMBPENABLE = EMAC_RXMBPENABLE_RXBROADEN;
454 /* Enable ch 0 only */
455 adap_emac->RXUNICASTSET = 0x01;
457 /* Enable MII interface and Full duplex mode */
458 adap_emac->MACCONTROL = (EMAC_MACCONTROL_MIIEN_ENABLE | EMAC_MACCONTROL_FULLDUPLEX_ENABLE);
460 /* Init MDIO & get link state */
461 clkdiv = (EMAC_MDIO_BUS_FREQ / EMAC_MDIO_CLOCK_FREQ) - 1;
462 adap_mdio->CONTROL = ((clkdiv & 0xff) | MDIO_CONTROL_ENABLE | MDIO_CONTROL_FAULT);
464 if (!phy.get_link_speed(active_phy_addr))
467 /* Start receive process */
468 adap_emac->RX0HDP = (u_int32_t)emac_rx_desc;
470 debug_emac("- emac_open\n");
475 /* EMAC Channel Teardown */
476 static void davinci_eth_ch_teardown(int ch)
481 debug_emac("+ emac_ch_teardown\n");
483 if (ch == EMAC_CH_TX) {
484 /* Init TX channel teardown */
485 adap_emac->TXTEARDOWN = 1;
486 for(cnt = 0; cnt != 0xfffffffc; cnt = adap_emac->TX0CP) {
487 /* Wait here for Tx teardown completion interrupt to occur
488 * Note: A task delay can be called here to pend rather than
489 * occupying CPU cycles - anyway it has been found that teardown
490 * takes very few cpu cycles and does not affect functionality */
496 adap_emac->TX0CP = cnt;
497 adap_emac->TX0HDP = 0;
499 /* Init RX channel teardown */
500 adap_emac->RXTEARDOWN = 1;
501 for(cnt = 0; cnt != 0xfffffffc; cnt = adap_emac->RX0CP) {
502 /* Wait here for Rx teardown completion interrupt to occur
503 * Note: A task delay can be called here to pend rather than
504 * occupying CPU cycles - anyway it has been found that teardown
505 * takes very few cpu cycles and does not affect functionality */
511 adap_emac->RX0CP = cnt;
512 adap_emac->RX0HDP = 0;
515 debug_emac("- emac_ch_teardown\n");
518 /* Eth device close */
519 static int davinci_eth_close(void)
521 debug_emac("+ emac_close\n");
523 davinci_eth_ch_teardown(EMAC_CH_TX); /* TX Channel teardown */
524 davinci_eth_ch_teardown(EMAC_CH_RX); /* RX Channel teardown */
526 /* Reset EMAC module and disable interrupts in wrapper */
527 adap_emac->SOFTRESET = 1;
528 adap_ewrap->EWCTL = 0;
530 debug_emac("- emac_close\n");
534 static int tx_send_loop = 0;
537 * This function sends a single packet on the network and returns
538 * positive number (number of bytes transmitted) or negative for error
540 static int davinci_eth_send_packet (volatile void *packet, int length)
546 /* Return error if no link */
547 if (!phy.get_link_speed (active_phy_addr)) {
548 printf ("WARN: emac_send_packet: No link\n");
552 /* Check packet size and if < EMAC_MIN_ETHERNET_PKT_SIZE, pad it up */
553 if (length < EMAC_MIN_ETHERNET_PKT_SIZE) {
554 length = EMAC_MIN_ETHERNET_PKT_SIZE;
557 /* Populate the TX descriptor */
558 emac_tx_desc->next = 0;
559 emac_tx_desc->buffer = (u_int8_t *) packet;
560 emac_tx_desc->buff_off_len = (length & 0xffff);
561 emac_tx_desc->pkt_flag_len = ((length & 0xffff) |
563 EMAC_CPPI_OWNERSHIP_BIT |
565 /* Send the packet */
566 adap_emac->TX0HDP = (unsigned int) emac_tx_desc;
568 /* Wait for packet to complete or link down */
570 if (!phy.get_link_speed (active_phy_addr)) {
571 davinci_eth_ch_teardown (EMAC_CH_TX);
574 if (adap_emac->TXINTSTATRAW & 0x01) {
585 * This function handles receipt of a packet from the network
587 static int davinci_eth_rcv_packet (void)
589 volatile emac_desc *rx_curr_desc;
590 volatile emac_desc *curr_desc;
591 volatile emac_desc *tail_desc;
592 int status, ret = -1;
594 rx_curr_desc = emac_rx_active_head;
595 status = rx_curr_desc->pkt_flag_len;
596 if ((rx_curr_desc) && ((status & EMAC_CPPI_OWNERSHIP_BIT) == 0)) {
597 if (status & EMAC_CPPI_RX_ERROR_FRAME) {
598 /* Error in packet - discard it and requeue desc */
599 printf ("WARN: emac_rcv_pkt: Error in packet\n");
601 NetReceive (rx_curr_desc->buffer,
602 (rx_curr_desc->buff_off_len & 0xffff));
603 ret = rx_curr_desc->buff_off_len & 0xffff;
606 /* Ack received packet descriptor */
607 adap_emac->RX0CP = (unsigned int) rx_curr_desc;
608 curr_desc = rx_curr_desc;
609 emac_rx_active_head =
610 (volatile emac_desc *) rx_curr_desc->next;
612 if (status & EMAC_CPPI_EOQ_BIT) {
613 if (emac_rx_active_head) {
615 (unsigned int) emac_rx_active_head;
617 emac_rx_queue_active = 0;
618 printf ("INFO:emac_rcv_packet: RX Queue not active\n");
622 /* Recycle RX descriptor */
623 rx_curr_desc->buff_off_len = EMAC_MAX_ETHERNET_PKT_SIZE;
624 rx_curr_desc->pkt_flag_len = EMAC_CPPI_OWNERSHIP_BIT;
625 rx_curr_desc->next = 0;
627 if (emac_rx_active_head == 0) {
628 printf ("INFO: emac_rcv_pkt: active queue head = 0\n");
629 emac_rx_active_head = curr_desc;
630 emac_rx_active_tail = curr_desc;
631 if (emac_rx_queue_active != 0) {
633 (unsigned int) emac_rx_active_head;
634 printf ("INFO: emac_rcv_pkt: active queue head = 0, HDP fired\n");
635 emac_rx_queue_active = 1;
638 tail_desc = emac_rx_active_tail;
639 emac_rx_active_tail = curr_desc;
640 tail_desc->next = (unsigned int) curr_desc;
641 status = tail_desc->pkt_flag_len;
642 if (status & EMAC_CPPI_EOQ_BIT) {
643 adap_emac->RX0HDP = (unsigned int) curr_desc;
644 status &= ~EMAC_CPPI_EOQ_BIT;
645 tail_desc->pkt_flag_len = status;
653 #endif /* CONFIG_CMD_NET */
655 #endif /* CONFIG_DRIVER_TI_EMAC */