2 * armboot - Startup Code for ARM925 CPU-core
4 * Copyright (c) 2003 Texas Instruments
6 * ----- Adapted for OMAP1510 from ARM920 code ------
8 * Copyright (c) 2001 Marius Gröger <mag@sysgo.de>
9 * Copyright (c) 2002 Alex Züpke <azu@sysgo.de>
10 * Copyright (c) 2002 Gary Jennejohn <garyj@denx.de>
11 * Copyright (c) 2003 Richard Woodruff <r-woodruff2@ti.com>
12 * Copyright (c) 2003 Kshitij <kshitij@ti.com>
14 * See file CREDITS for list of people who contributed to this
17 * This program is free software; you can redistribute it and/or
18 * modify it under the terms of the GNU General Public License as
19 * published by the Free Software Foundation; either version 2 of
20 * the License, or (at your option) any later version.
22 * This program is distributed in the hope that it will be useful,
23 * but WITHOUT ANY WARRANTY; without even the implied warranty of
24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
25 * GNU General Public License for more details.
27 * You should have received a copy of the GNU General Public License
28 * along with this program; if not, write to the Free Software
29 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
37 #if defined(CONFIG_OMAP1510)
38 #include <./configs/omap1510.h>
42 *************************************************************************
44 * Jump vector table as in table 3.1 in [1]
46 *************************************************************************
52 ldr pc, _undefined_instruction
53 ldr pc, _software_interrupt
54 ldr pc, _prefetch_abort
60 _undefined_instruction: .word undefined_instruction
61 _software_interrupt: .word software_interrupt
62 _prefetch_abort: .word prefetch_abort
63 _data_abort: .word data_abort
64 _not_used: .word not_used
68 .balignl 16,0xdeadbeef
72 *************************************************************************
74 * Startup Code (reset vector)
76 * do important init only if we don't start from memory!
77 * setup Memory and board specific bits prior to relocation.
78 * relocate armboot to ram
81 *************************************************************************
92 * These are defined in the board-specific linker script.
102 #ifdef CONFIG_USE_IRQ
103 /* IRQ stack memory (calculated at run-time) */
104 .globl IRQ_STACK_START
108 /* IRQ stack memory (calculated at run-time) */
109 .globl FIQ_STACK_START
116 * the actual reset code
121 * set the cpu to SVC32 mode
131 mov r1, #0x81 /* Set ARM925T configuration. */
132 mcr p15, 0, r1, c15, c1, 0 /* Write ARM925T configuration register. */
135 * turn off the watchdog, unlock/diable sequence
144 * mask all IRQs by setting all bits in the INTMR - default
147 ldr r0, =REG_IHL1_MIR
149 ldr r0, =REG_IHL2_MIR
153 * wait for dpll to lock
164 * we do sys-critical inits only at reboot,
165 * not when booting from ram!
167 #ifndef CONFIG_SKIP_LOWLEVEL_INIT
171 #ifndef CONFIG_SKIP_RELOCATE_UBOOT
172 relocate: /* relocate U-Boot to RAM */
173 adr r0, _start /* r0 <- current position of code */
174 ldr r1, _TEXT_BASE /* test if we run from flash or RAM */
175 cmp r0, r1 /* don't reloc during debug */
178 ldr r2, _armboot_start
180 sub r2, r3, r2 /* r2 <- size of armboot */
181 add r2, r0, r2 /* r2 <- source end address */
184 ldmia r0!, {r3-r10} /* copy from source address [r0] */
185 stmia r1!, {r3-r10} /* copy to target address [r1] */
186 cmp r0, r2 /* until source end addreee [r2] */
188 #endif /* CONFIG_SKIP_RELOCATE_UBOOT */
190 /* Set up the stack */
192 ldr r0, _TEXT_BASE /* upper 128 KiB: relocated uboot */
193 sub r0, r0, #CONFIG_SYS_MALLOC_LEN /* malloc area */
194 sub r0, r0, #CONFIG_SYS_GBL_DATA_SIZE /* bdinfo */
195 #ifdef CONFIG_USE_IRQ
196 sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ)
198 sub sp, r0, #12 /* leave 3 words for abort-stack */
201 ldr r0, _bss_start /* find start of bss segment */
202 ldr r1, _bss_end /* stop here */
203 mov r2, #0x00000000 /* clear */
205 clbss_l:str r2, [r0] /* clear loop... */
210 ldr pc, _start_armboot
212 _start_armboot: .word start_armboot
216 *************************************************************************
218 * CPU_init_critical registers
220 * setup important registers
221 * setup memory timing
223 *************************************************************************
229 * flush v4 I/D caches
232 mcr p15, 0, r0, c7, c7, 0 /* flush v3/v4 cache */
233 mcr p15, 0, r0, c8, c7, 0 /* flush v4 TLB */
236 * disable MMU stuff and caches
238 mrc p15, 0, r0, c1, c0, 0
239 bic r0, r0, #0x00002300 @ clear bits 13, 9:8 (--V- --RS)
240 bic r0, r0, #0x00000087 @ clear bits 7, 2:0 (B--- -CAM)
241 orr r0, r0, #0x00000002 @ set bit 2 (A) Align
242 orr r0, r0, #0x00001000 @ set bit 12 (I) I-Cache
243 mcr p15, 0, r0, c1, c0, 0
246 * Go setup Memory and board specific bits prior to relocation.
248 mov ip, lr /* perserve link reg across call */
249 bl lowlevel_init /* go setup pll,mux,memory */
250 mov lr, ip /* restore link */
251 mov pc, lr /* back to my caller */
253 *************************************************************************
257 *************************************************************************
263 #define S_FRAME_SIZE 72
285 #define MODE_SVC 0x13
289 * use bad_save_user_regs for abort/prefetch/undef/swi ...
290 * use irq_save_user_regs / irq_restore_user_regs for IRQ/FIQ handling
293 .macro bad_save_user_regs
294 sub sp, sp, #S_FRAME_SIZE @ carve out a frame on current user stack
295 stmia sp, {r0 - r12} @ Save user registers (now in svc mode) r0-r12
297 ldr r2, _armboot_start
298 sub r2, r2, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN)
299 sub r2, r2, #(CONFIG_SYS_GBL_DATA_SIZE+8) @ set base 2 words into abort stack
300 ldmia r2, {r2 - r3} @ get values for "aborted" pc and cpsr (into parm regs)
301 add r0, sp, #S_FRAME_SIZE @ grab pointer to old stack
305 stmia r5, {r0 - r3} @ save sp_SVC, lr_SVC, pc, cpsr
306 mov r0, sp @ save current stack into r0 (param register)
309 .macro irq_save_user_regs
310 sub sp, sp, #S_FRAME_SIZE
311 stmia sp, {r0 - r12} @ Calling r0-r12
312 add r8, sp, #S_PC @ !!!! R8 NEEDS to be saved !!!! a reserved stack spot would be good.
313 stmdb r8, {sp, lr}^ @ Calling SP, LR
314 str lr, [r8, #0] @ Save calling PC
316 str r6, [r8, #4] @ Save CPSR
317 str r0, [r8, #8] @ Save OLD_R0
321 .macro irq_restore_user_regs
322 ldmia sp, {r0 - lr}^ @ Calling r0 - lr
324 ldr lr, [sp, #S_PC] @ Get PC
325 add sp, sp, #S_FRAME_SIZE
326 subs pc, lr, #4 @ return & move spsr_svc into cpsr
330 ldr r13, _armboot_start @ setup our mode stack
331 sub r13, r13, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN)
332 sub r13, r13, #(CONFIG_SYS_GBL_DATA_SIZE+8) @ reserved a couple spots in abort stack
334 str lr, [r13] @ save caller lr in position 0 of saved stack
335 mrs lr, spsr @ get the spsr
336 str lr, [r13, #4] @ save spsr in position 1 of saved stack
338 mov r13, #MODE_SVC @ prepare SVC-Mode
340 msr spsr, r13 @ switch modes, make sure moves will execute
341 mov lr, pc @ capture return pc
342 movs pc, lr @ jump to next instruction & switch modes.
345 .macro get_irq_stack @ setup IRQ stack
346 ldr sp, IRQ_STACK_START
349 .macro get_fiq_stack @ setup FIQ stack
350 ldr sp, FIQ_STACK_START
357 undefined_instruction:
360 bl do_undefined_instruction
366 bl do_software_interrupt
386 #ifdef CONFIG_USE_IRQ
393 irq_restore_user_regs
398 /* someone ought to write a more effiction fiq_save_user_regs */
401 irq_restore_user_regs
422 ldr r1, rstctl1 /* get clkm1 reset ctl */
423 mov r3, #0x3 /* dsp_en + arm_rst = global reset */
424 strh r3, [r1] /* force reset */