3 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
4 * Marius Groeger <mgroeger@sysgo.de>
7 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
8 * Alex Zuepke <azu@sysgo.de>
11 * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
13 * See file CREDITS for list of people who contributed to this
16 * This program is free software; you can redistribute it and/or
17 * modify it under the terms of the GNU General Public License as
18 * published by the Free Software Foundation; either version 2 of
19 * the License, or (at your option) any later version.
21 * This program is distributed in the hope that it will be useful,
22 * but WITHOUT ANY WARRANTY; without even the implied warranty of
23 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
24 * GNU General Public License for more details.
26 * You should have received a copy of the GNU General Public License
27 * along with this program; if not, write to the Free Software
28 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
33 #if defined(CONFIG_S3C2400) || defined (CONFIG_S3C2410) || defined (CONFIG_TRAB)
36 #if defined(CONFIG_S3C2400)
38 #elif defined(CONFIG_S3C2410)
42 extern void reset_cpu(ulong addr);
43 int timer_load_val = 0;
45 /* macro to read the 16 bit timer */
46 static inline ulong READ_TIMER(void)
48 S3C24X0_TIMERS * const timers = S3C24X0_GetBase_TIMERS();
50 return (timers->TCNTO4 & 0xffff);
53 static ulong timestamp;
56 int interrupt_init (void)
58 S3C24X0_TIMERS * const timers = S3C24X0_GetBase_TIMERS();
60 /* use PWM Timer 4 because it has no output */
61 /* prescaler for Timer 4 is 16 */
62 timers->TCFG0 = 0x0f00;
63 if (timer_load_val == 0)
66 * for 10 ms clock period @ PCLK with 4 bit divider = 1/2
67 * (default) and prescaler = 16. Should be 10390
68 * @33.25MHz and 15625 @ 50 MHz
70 timer_load_val = get_PCLK()/(2 * 16 * 100);
72 /* load value for 10 ms timeout */
73 lastdec = timers->TCNTB4 = timer_load_val;
74 /* auto load, manual update of Timer 4 */
75 timers->TCON = (timers->TCON & ~0x0700000) | 0x600000;
76 /* auto load, start Timer 4 */
77 timers->TCON = (timers->TCON & ~0x0700000) | 0x500000;
84 * timer without interrupts
87 void reset_timer (void)
89 reset_timer_masked ();
92 ulong get_timer (ulong base)
94 return get_timer_masked () - base;
97 void set_timer (ulong t)
102 void udelay (unsigned long usec)
105 ulong start = get_timer(0);
108 tmo *= (timer_load_val * 100);
111 while ((ulong)(get_timer_masked () - start) < tmo)
115 void reset_timer_masked (void)
118 lastdec = READ_TIMER();
122 ulong get_timer_masked (void)
124 ulong now = READ_TIMER();
126 if (lastdec >= now) {
128 timestamp += lastdec - now;
130 /* we have an overflow ... */
131 timestamp += lastdec + timer_load_val - now;
138 void udelay_masked (unsigned long usec)
143 tmo *= (timer_load_val * 100);
146 reset_timer_masked ();
148 while (get_timer_masked () < tmo)
153 * This function is derived from PowerPC code (read timebase as long long).
154 * On ARM it just returns the timer value.
156 unsigned long long get_ticks(void)
162 * This function is derived from PowerPC code (timebase clock frequency).
163 * On ARM it returns the number of timer ticks per second.
165 ulong get_tbclk (void)
169 #if defined(CONFIG_SMDK2400) || defined(CONFIG_TRAB)
170 tbclk = timer_load_val * 100;
171 #elif defined(CONFIG_SMDK2410) || defined(CONFIG_VCMA9)
174 # error "tbclk not configured"
180 #endif /* defined(CONFIG_S3C2400) || defined (CONFIG_S3C2410) || defined (CONFIG_TRAB) */