3 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
4 * Marius Groeger <mgroeger@sysgo.de>
7 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
8 * Alex Zuepke <azu@sysgo.de>
11 * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
13 * See file CREDITS for list of people who contributed to this
16 * This program is free software; you can redistribute it and/or
17 * modify it under the terms of the GNU General Public License as
18 * published by the Free Software Foundation; either version 2 of
19 * the License, or (at your option) any later version.
21 * This program is distributed in the hope that it will be useful,
22 * but WITHOUT ANY WARRANTY; without even the implied warranty of
23 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
24 * GNU General Public License for more details.
26 * You should have received a copy of the GNU General Public License
27 * along with this program; if not, write to the Free Software
28 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
34 #if defined(CONFIG_S3C2400)
36 #elif defined(CONFIG_S3C2410)
40 #include <asm/proc-armv/ptrace.h>
42 extern void reset_cpu(ulong addr);
43 int timer_load_val = 0;
45 /* macro to read the 16 bit timer */
46 static inline ulong READ_TIMER(void)
48 S3C24X0_TIMERS * const timers = S3C24X0_GetBase_TIMERS();
50 return (timers->TCNTO4 & 0xffff);
54 /* enable IRQ interrupts */
55 void enable_interrupts (void)
58 __asm__ __volatile__("mrs %0, cpsr\n"
68 * disable IRQ/FIQ interrupts
69 * returns true if interrupts had been enabled before we disabled them
71 int disable_interrupts (void)
73 unsigned long old,temp;
74 __asm__ __volatile__("mrs %0, cpsr\n"
77 : "=r" (old), "=r" (temp)
80 return (old & 0x80) == 0;
83 void enable_interrupts (void)
87 int disable_interrupts (void)
97 panic ("Resetting CPU ...\n");
101 void show_regs (struct pt_regs *regs)
104 const char *processor_modes[] = {
105 "USER_26", "FIQ_26", "IRQ_26", "SVC_26",
106 "UK4_26", "UK5_26", "UK6_26", "UK7_26",
107 "UK8_26", "UK9_26", "UK10_26", "UK11_26",
108 "UK12_26", "UK13_26", "UK14_26", "UK15_26",
109 "USER_32", "FIQ_32", "IRQ_32", "SVC_32",
110 "UK4_32", "UK5_32", "UK6_32", "ABT_32",
111 "UK8_32", "UK9_32", "UK10_32", "UND_32",
112 "UK12_32", "UK13_32", "UK14_32", "SYS_32",
115 flags = condition_codes (regs);
117 printf ("pc : [<%08lx>] lr : [<%08lx>]\n"
118 "sp : %08lx ip : %08lx fp : %08lx\n",
119 instruction_pointer (regs),
120 regs->ARM_lr, regs->ARM_sp, regs->ARM_ip, regs->ARM_fp);
121 printf ("r10: %08lx r9 : %08lx r8 : %08lx\n",
122 regs->ARM_r10, regs->ARM_r9, regs->ARM_r8);
123 printf ("r7 : %08lx r6 : %08lx r5 : %08lx r4 : %08lx\n",
124 regs->ARM_r7, regs->ARM_r6, regs->ARM_r5, regs->ARM_r4);
125 printf ("r3 : %08lx r2 : %08lx r1 : %08lx r0 : %08lx\n",
126 regs->ARM_r3, regs->ARM_r2, regs->ARM_r1, regs->ARM_r0);
127 printf ("Flags: %c%c%c%c",
128 flags & CC_N_BIT ? 'N' : 'n',
129 flags & CC_Z_BIT ? 'Z' : 'z',
130 flags & CC_C_BIT ? 'C' : 'c', flags & CC_V_BIT ? 'V' : 'v');
131 printf (" IRQs %s FIQs %s Mode %s%s\n",
132 interrupts_enabled (regs) ? "on" : "off",
133 fast_interrupts_enabled (regs) ? "on" : "off",
134 processor_modes[processor_mode (regs)],
135 thumb_mode (regs) ? " (T)" : "");
138 void do_undefined_instruction (struct pt_regs *pt_regs)
140 printf ("undefined instruction\n");
145 void do_software_interrupt (struct pt_regs *pt_regs)
147 printf ("software interrupt\n");
152 void do_prefetch_abort (struct pt_regs *pt_regs)
154 printf ("prefetch abort\n");
159 void do_data_abort (struct pt_regs *pt_regs)
161 printf ("data abort\n");
166 void do_not_used (struct pt_regs *pt_regs)
168 printf ("not used\n");
173 void do_fiq (struct pt_regs *pt_regs)
175 printf ("fast interrupt request\n");
180 void do_irq (struct pt_regs *pt_regs)
182 printf ("interrupt request\n");
187 static ulong timestamp;
188 static ulong lastdec;
190 int interrupt_init (void)
192 S3C24X0_TIMERS * const timers = S3C24X0_GetBase_TIMERS();
194 /* use PWM Timer 4 because it has no output */
195 /* prescaler for Timer 4 is 16 */
196 timers->TCFG0 = 0x0f00;
197 if (timer_load_val == 0)
200 * for 10 ms clock period @ PCLK with 4 bit divider = 1/2
201 * (default) and prescaler = 16. Should be 10390
202 * @33.25MHz and 15625 @ 50 MHz
204 timer_load_val = get_PCLK()/(2 * 16 * 100);
206 /* load value for 10 ms timeout */
207 lastdec = timers->TCNTB4 = timer_load_val;
208 /* auto load, manual update of Timer 4 */
209 timers->TCON = (timers->TCON & ~0x0700000) | 0x600000;
210 /* auto load, start Timer 4 */
211 timers->TCON = (timers->TCON & ~0x0700000) | 0x500000;
218 * timer without interrupts
221 void reset_timer (void)
223 reset_timer_masked ();
226 ulong get_timer (ulong base)
228 return get_timer_masked () - base;
231 void set_timer (ulong t)
236 void udelay (unsigned long usec)
241 tmo *= (timer_load_val * 100);
244 tmo += get_timer (0);
246 while (get_timer_masked () < tmo)
250 void reset_timer_masked (void)
253 lastdec = READ_TIMER();
257 ulong get_timer_masked (void)
259 ulong now = READ_TIMER();
261 if (lastdec >= now) {
263 timestamp += lastdec - now;
265 /* we have an overflow ... */
266 timestamp += lastdec + timer_load_val - now;
273 void udelay_masked (unsigned long usec)
278 tmo *= (timer_load_val * 100);
281 reset_timer_masked ();
283 while (get_timer_masked () < tmo)
288 * This function is derived from PowerPC code (read timebase as long long).
289 * On ARM it just returns the timer value.
291 unsigned long long get_ticks(void)
297 * This function is derived from PowerPC code (timebase clock frequency).
298 * On ARM it returns the number of timer ticks per second.
300 ulong get_tbclk (void)
304 #if defined(CONFIG_SMDK2400) || defined(CONFIG_TRAB)
305 tbclk = timer_load_val * 100;
306 #elif defined(CONFIG_SMDK2410) || defined(CONFIG_VCMA9)
309 # error "tbclk not configured"