2 * (C) Copyright 2004 Texas Insturments
5 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
6 * Marius Groeger <mgroeger@sysgo.de>
9 * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
11 * See file CREDITS for list of people who contributed to this
14 * This program is free software; you can redistribute it and/or
15 * modify it under the terms of the GNU General Public License as
16 * published by the Free Software Foundation; either version 2 of
17 * the License, or (at your option) any later version.
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
24 * You should have received a copy of the GNU General Public License
25 * along with this program; if not, write to the Free Software
26 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
37 #include <asm/system.h>
39 static void cache_flush (void);
41 static void cp_delay (void)
45 /* Many OMAP regs need at least 2 nops */
46 for (i = 0; i < 100; i++)
47 __asm__ __volatile__("nop\n");
55 int cleanup_before_linux (void)
58 * this function is called just before we call linux
59 * it prepares the processor for linux
61 * we turn off caches etc ...
64 disable_interrupts ();
66 /* turn off I/D-cache */
75 /* * reset the cpu by setting up the watchdog timer and let him time out */
76 void reset_cpu (ulong ignored)
78 printf("reset... \n\n\n");
80 /* loop forever and wait for reset to happen */
90 int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
92 disable_interrupts ();
98 void icache_enable (void)
102 reg = get_cr (); /* get control reg. */
107 void icache_disable (void)
113 set_cr (reg & ~CR_I);
116 int icache_status (void)
118 return (get_cr () & CR_I) != 0;
121 /* It makes no sense to use the dcache if the MMU is not enabled */
122 void dcache_enable (void)
131 void dcache_disable (void)
137 set_cr (reg & ~CR_C);
140 int dcache_status (void)
142 return (get_cr () & CR_C) != 0;
145 /* flush I/D-cache */
146 static void cache_flush (void)
148 /* invalidate both caches and flush btb */
149 asm ("mcr p15, 0, %0, c7, c7, 0": :"r" (0));
150 /* mem barrier to sync things */
151 asm ("mcr p15, 0, %0, c7, c10, 4": :"r" (0));