4 * Richard Woodruff <r-woodruff2@ti.com>
7 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
8 * Marius Groeger <mgroeger@sysgo.de>
9 * Alex Zuepke <azu@sysgo.de>
12 * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
14 * See file CREDITS for list of people who contributed to this
17 * This program is free software; you can redistribute it and/or
18 * modify it under the terms of the GNU General Public License as
19 * published by the Free Software Foundation; either version 2 of
20 * the License, or (at your option) any later version.
22 * This program is distributed in the hope that it will be useful,
23 * but WITHOUT ANY WARRANTY; without even the implied warranty of
24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
25 * GNU General Public License for more details.
27 * You should have received a copy of the GNU General Public License
28 * along with this program; if not, write to the Free Software
29 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
34 #include <asm/arch/bits.h>
35 #include <asm/arch/omap2420.h>
36 #include <asm/proc-armv/ptrace.h>
38 extern void reset_cpu(ulong addr);
39 #define TIMER_LOAD_VAL 0
41 /* macro to read the 32 bit timer */
42 #define READ_TIMER (*(volatile ulong *)(CFG_TIMERBASE+TCRR))
45 /* enable IRQ interrupts */
46 void enable_interrupts (void)
49 __asm__ __volatile__("mrs %0, cpsr\n"
58 * disable IRQ/FIQ interrupts
59 * returns true if interrupts had been enabled before we disabled them
61 int disable_interrupts (void)
63 unsigned long old,temp;
64 __asm__ __volatile__("mrs %0, cpsr\n"
67 : "=r" (old), "=r" (temp)
70 return(old & 0x80) == 0;
73 void enable_interrupts (void)
77 int disable_interrupts (void)
86 panic ("Resetting CPU ...\n");
90 void show_regs (struct pt_regs *regs)
93 const char *processor_modes[] = {
94 "USER_26", "FIQ_26", "IRQ_26", "SVC_26",
95 "UK4_26", "UK5_26", "UK6_26", "UK7_26",
96 "UK8_26", "UK9_26", "UK10_26", "UK11_26",
97 "UK12_26", "UK13_26", "UK14_26", "UK15_26",
98 "USER_32", "FIQ_32", "IRQ_32", "SVC_32",
99 "UK4_32", "UK5_32", "UK6_32", "ABT_32",
100 "UK8_32", "UK9_32", "UK10_32", "UND_32",
101 "UK12_32", "UK13_32", "UK14_32", "SYS_32",
104 flags = condition_codes (regs);
106 printf ("pc : [<%08lx>] lr : [<%08lx>]\n"
107 "sp : %08lx ip : %08lx fp : %08lx\n",
108 instruction_pointer (regs),
109 regs->ARM_lr, regs->ARM_sp, regs->ARM_ip, regs->ARM_fp);
110 printf ("r10: %08lx r9 : %08lx r8 : %08lx\n",
111 regs->ARM_r10, regs->ARM_r9, regs->ARM_r8);
112 printf ("r7 : %08lx r6 : %08lx r5 : %08lx r4 : %08lx\n",
113 regs->ARM_r7, regs->ARM_r6, regs->ARM_r5, regs->ARM_r4);
114 printf ("r3 : %08lx r2 : %08lx r1 : %08lx r0 : %08lx\n",
115 regs->ARM_r3, regs->ARM_r2, regs->ARM_r1, regs->ARM_r0);
116 printf ("Flags: %c%c%c%c",
117 flags & CC_N_BIT ? 'N' : 'n',
118 flags & CC_Z_BIT ? 'Z' : 'z',
119 flags & CC_C_BIT ? 'C' : 'c', flags & CC_V_BIT ? 'V' : 'v');
120 printf (" IRQs %s FIQs %s Mode %s%s\n",
121 interrupts_enabled (regs) ? "on" : "off",
122 fast_interrupts_enabled (regs) ? "on" : "off",
123 processor_modes[processor_mode (regs)],
124 thumb_mode (regs) ? " (T)" : "");
127 void do_undefined_instruction (struct pt_regs *pt_regs)
129 printf ("undefined instruction\n");
134 void do_software_interrupt (struct pt_regs *pt_regs)
136 printf ("software interrupt\n");
141 void do_prefetch_abort (struct pt_regs *pt_regs)
143 printf ("prefetch abort\n");
148 void do_data_abort (struct pt_regs *pt_regs)
150 printf ("data abort\n");
155 void do_not_used (struct pt_regs *pt_regs)
157 printf ("not used\n");
162 void do_fiq (struct pt_regs *pt_regs)
164 printf ("fast interrupt request\n");
169 void do_irq (struct pt_regs *pt_regs)
171 printf ("interrupt request\n");
176 static ulong timestamp;
177 static ulong lastinc;
179 /* nothing really to do with interrupts, just starts up a counter. */
180 int interrupt_init (void)
184 /* Start the counter ticking up */
185 *((int32_t *) (CFG_TIMERBASE + TLDR)) = TIMER_LOAD_VAL; /* reload value on overflow*/
186 val = (CFG_PVT << 2) | BIT5 | BIT1 | BIT0; /* mask to enable timer*/
187 *((int32_t *) (CFG_TIMERBASE + TCLR)) = val; /* start timer */
189 reset_timer_masked(); /* init the timestamp and lastinc value */
195 * timer without interrupts
197 void reset_timer (void)
199 reset_timer_masked ();
202 ulong get_timer (ulong base)
204 return get_timer_masked () - base;
207 void set_timer (ulong t)
212 /* delay x useconds AND perserve advance timstamp value */
213 void udelay (unsigned long usec)
217 if (usec >= 1000) { /* if "big" number, spread normalization to seconds */
218 tmo = usec / 1000; /* start to normalize for usec to ticks per sec */
219 tmo *= CFG_HZ; /* find number of "ticks" to wait to achieve target */
220 tmo /= 1000; /* finish normalize. */
221 } else { /* else small number, don't kill it prior to HZ multiply */
226 tmp = get_timer (0); /* get current timestamp */
227 if ( (tmo + tmp + 1) < tmp )/* if setting this forward will roll time stamp */
228 reset_timer_masked (); /* reset "advancing" timestamp to 0, set lastinc value */
230 tmo += tmp; /* else, set advancing stamp wake up time */
231 while (get_timer_masked () < tmo)/* loop till event */
235 void reset_timer_masked (void)
238 lastinc = READ_TIMER; /* capture current incrementer value time */
239 timestamp = 0; /* start "advancing" time stamp from 0 */
242 ulong get_timer_masked (void)
244 ulong now = READ_TIMER; /* current tick value */
246 if (now >= lastinc) /* normal mode (non roll) */
247 timestamp += (now - lastinc); /* move stamp fordward with absoulte diff ticks */
248 else /* we have rollover of incrementer */
249 timestamp += (0xFFFFFFFF - lastinc) + now;
254 /* waits specified delay value and resets timestamp */
255 void udelay_masked (unsigned long usec)
259 if (usec >= 1000) { /* if "big" number, spread normalization to seconds */
260 tmo = usec / 1000; /* start to normalize for usec to ticks per sec */
261 tmo *= CFG_HZ; /* find number of "ticks" to wait to achieve target */
262 tmo /= 1000; /* finish normalize. */
263 } else { /* else small number, don't kill it prior to HZ multiply */
267 reset_timer_masked (); /* set "advancing" timestamp to 0, set lastinc vaule */
268 while (get_timer_masked () < tmo) /* wait for time stamp to overtake tick number.*/
273 * This function is derived from PowerPC code (read timebase as long long).
274 * On ARM it just returns the timer value.
276 unsigned long long get_ticks(void)
282 * This function is derived from PowerPC code (timebase clock frequency).
283 * On ARM it returns the number of timer ticks per second.
285 ulong get_tbclk (void)