2 * Copyright (C) 1998 Dan Malek <dmalek@jlc.net>
3 * Copyright (C) 1999 Magnus Damm <kieraypc01.p.y.kie.era.ericsson.se>
4 * Copyright (C) 2000,2001,2002 Wolfgang Denk <wd@denx.de>
5 * Copyright (C) 2001 Josh Huber <huber@mclx.com>
7 * See file CREDITS for list of people who contributed to this
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
26 /* U-Boot - Startup Code for PowerPC based Embedded Boards
29 * The processor starts at 0xfff00100 and the code is executed
30 * from flash. The code is organized to be at an other address
31 * in memory, but as long we don't jump around before relocating.
32 * board_init lies at a quite high address and when the cpu has
33 * jumped there, everything is ok.
39 #include <ppc_asm.tmpl>
42 #include <asm/cache.h>
45 #if !defined(CONFIG_DB64360) && \
46 !defined(CONFIG_DB64460) && \
47 !defined(CONFIG_CPCI750)
48 #include <galileo/gt64260R.h>
51 #ifndef CONFIG_IDENT_STRING
52 #define CONFIG_IDENT_STRING ""
55 /* We don't want the MMU yet.
58 /* Machine Check and Recoverable Interr. */
59 #define MSR_KERNEL ( MSR_ME | MSR_RI )
62 * Set up GOT: Global Offset Table
64 * Use r14 to access the GOT
67 GOT_ENTRY(_GOT2_TABLE_)
68 GOT_ENTRY(_FIXUP_TABLE_)
71 GOT_ENTRY(_start_of_vectors)
72 GOT_ENTRY(_end_of_vectors)
73 GOT_ENTRY(transfer_to_handler)
77 GOT_ENTRY(__bss_start)
81 * r3 - 1st arg to board_init(): IMMP pointer
82 * r4 - 2nd arg to board_init(): boot flag
85 .long 0x27051956 /* U-Boot Magic Number */
89 .ascii " (", __DATE__, " - ", __TIME__, ")"
90 .ascii CONFIG_IDENT_STRING, "\0"
95 li r21, BOOTFLAG_COLD /* Normal Power-On: Boot from FLASH */
99 . = EXC_OFF_SYS_RESET + 0x10
103 li r21, BOOTFLAG_WARM /* Software reboot */
107 /* the boot code is located below the exception table */
109 .globl _start_of_vectors
113 STD_EXCEPTION(0x200, MachineCheck, MachineCheckException)
115 /* Data Storage exception. "Never" generated on the 860. */
116 STD_EXCEPTION(0x300, DataStorage, UnknownException)
118 /* Instruction Storage exception. "Never" generated on the 860. */
119 STD_EXCEPTION(0x400, InstStorage, UnknownException)
121 /* External Interrupt exception. */
122 STD_EXCEPTION(0x500, ExtInterrupt, external_interrupt)
124 /* Alignment exception. */
132 addi r3,r1,STACK_FRAME_OVERHEAD
134 rlwimi r20,r23,0,16,16 /* copy EE bit from saved MSR */
135 lwz r6,GOT(transfer_to_handler)
139 .long AlignmentException - _start + EXC_OFF_SYS_RESET
140 .long int_return - _start + EXC_OFF_SYS_RESET
142 /* Program check exception */
146 addi r3,r1,STACK_FRAME_OVERHEAD
148 rlwimi r20,r23,0,16,16 /* copy EE bit from saved MSR */
149 lwz r6,GOT(transfer_to_handler)
153 .long ProgramCheckException - _start + EXC_OFF_SYS_RESET
154 .long int_return - _start + EXC_OFF_SYS_RESET
156 /* No FPU on MPC8xx. This exception is not supposed to happen.
158 STD_EXCEPTION(0x800, FPUnavailable, UnknownException)
160 /* I guess we could implement decrementer, and may have
161 * to someday for timekeeping.
163 STD_EXCEPTION(0x900, Decrementer, timer_interrupt)
164 STD_EXCEPTION(0xa00, Trap_0a, UnknownException)
165 STD_EXCEPTION(0xb00, Trap_0b, UnknownException)
166 STD_EXCEPTION(0xc00, SystemCall, UnknownException)
167 STD_EXCEPTION(0xd00, SingleStep, UnknownException)
169 STD_EXCEPTION(0xe00, Trap_0e, UnknownException)
170 STD_EXCEPTION(0xf00, Trap_0f, UnknownException)
173 * On the MPC8xx, this is a software emulation interrupt. It
174 * occurs for all unimplemented and illegal instructions.
176 STD_EXCEPTION(0x1000, SoftEmu, SoftEmuException)
178 STD_EXCEPTION(0x1100, InstructionTLBMiss, UnknownException)
179 STD_EXCEPTION(0x1200, DataTLBMiss, UnknownException)
180 STD_EXCEPTION(0x1300, InstructionTLBError, UnknownException)
181 STD_EXCEPTION(0x1400, DataTLBError, UnknownException)
183 STD_EXCEPTION(0x1500, Reserved5, UnknownException)
184 STD_EXCEPTION(0x1600, Reserved6, UnknownException)
185 STD_EXCEPTION(0x1700, Reserved7, UnknownException)
186 STD_EXCEPTION(0x1800, Reserved8, UnknownException)
187 STD_EXCEPTION(0x1900, Reserved9, UnknownException)
188 STD_EXCEPTION(0x1a00, ReservedA, UnknownException)
189 STD_EXCEPTION(0x1b00, ReservedB, UnknownException)
191 STD_EXCEPTION(0x1c00, DataBreakpoint, UnknownException)
192 STD_EXCEPTION(0x1d00, InstructionBreakpoint, UnknownException)
193 STD_EXCEPTION(0x1e00, PeripheralBreakpoint, UnknownException)
194 STD_EXCEPTION(0x1f00, DevPortBreakpoint, UnknownException)
196 .globl _end_of_vectors
203 /* disable everything */
212 /* init the L2 cache */
213 addis r3, r0, L2_INIT@h
214 ori r3, r3, L2_INIT@l
218 #if defined(CONFIG_ALTIVEC) && defined(CONFIG_74xx)
221 * dssall instruction, gas doesn't have it yet
222 * ...for altivec, data stream stop all this probably
223 * isn't needed unless we warm (software) reboot U-Boot
228 /* invalidate the L2 cache */
229 bl l2cache_invalidate
232 #ifdef CFG_BOARD_ASM_INIT
238 * Calculate absolute address in FLASH and jump there
239 *------------------------------------------------------*/
240 lis r3, CFG_MONITOR_BASE@h
241 ori r3, r3, CFG_MONITOR_BASE@l
242 addi r3, r3, in_flash - _start + EXC_OFF_SYS_RESET
247 /* let the C-code set up the rest */
249 /* Be careful to keep code relocatable ! */
250 /*------------------------------------------------------*/
252 /* perform low-level init */
253 /* sdram init, galileo init, etc */
254 /* r3: NHR bit from HID0 */
261 * Cache must be enabled here for stack-in-cache trick.
262 * This means we need to enable the BATS.
264 * 1) for the EVB, original gt regs need to be mapped
265 * 2) need to have an IBAT for the 0xf region,
266 * we are running there!
267 * Cache should be turned on after BATs, since by default
268 * everything is write-through.
269 * The init-mem BAT can be reused after reloc. The old
270 * gt-regs BAT can be reused after board_init_f calls
271 * board_early_init_f (EVB only).
273 #if !defined(CONFIG_BAB7xx) && !defined(CONFIG_ELPPC)
274 /* enable address translation */
278 /* enable and invalidate the data cache */
282 #ifdef CFG_INIT_RAM_LOCK
287 /* set up the stack pointer in our newly created
289 lis r1, (CFG_INIT_RAM_ADDR + CFG_GBL_DATA_OFFSET)@h
290 ori r1, r1, (CFG_INIT_RAM_ADDR + CFG_GBL_DATA_OFFSET)@l
292 li r0, 0 /* Make room for stack frame header and */
293 stwu r0, -4(r1) /* clear final stack frame so that */
294 stwu r0, -4(r1) /* stack backtraces terminate cleanly */
296 GET_GOT /* initialize GOT access */
298 /* run low-level CPU init code (from Flash) */
305 /* run 1st part of board init code (from Flash) */
311 .globl invalidate_bats
313 /* invalidate BATs */
339 /* setup_bats - set them up to some initial state */
345 addis r4, r0, CFG_IBAT0L@h
346 ori r4, r4, CFG_IBAT0L@l
347 addis r3, r0, CFG_IBAT0U@h
348 ori r3, r3, CFG_IBAT0U@l
354 addis r4, r0, CFG_DBAT0L@h
355 ori r4, r4, CFG_DBAT0L@l
356 addis r3, r0, CFG_DBAT0U@h
357 ori r3, r3, CFG_DBAT0U@l
363 addis r4, r0, CFG_IBAT1L@h
364 ori r4, r4, CFG_IBAT1L@l
365 addis r3, r0, CFG_IBAT1U@h
366 ori r3, r3, CFG_IBAT1U@l
372 addis r4, r0, CFG_DBAT1L@h
373 ori r4, r4, CFG_DBAT1L@l
374 addis r3, r0, CFG_DBAT1U@h
375 ori r3, r3, CFG_DBAT1U@l
381 addis r4, r0, CFG_IBAT2L@h
382 ori r4, r4, CFG_IBAT2L@l
383 addis r3, r0, CFG_IBAT2U@h
384 ori r3, r3, CFG_IBAT2U@l
390 addis r4, r0, CFG_DBAT2L@h
391 ori r4, r4, CFG_DBAT2L@l
392 addis r3, r0, CFG_DBAT2U@h
393 ori r3, r3, CFG_DBAT2U@l
399 addis r4, r0, CFG_IBAT3L@h
400 ori r4, r4, CFG_IBAT3L@l
401 addis r3, r0, CFG_IBAT3U@h
402 ori r3, r3, CFG_IBAT3U@l
408 addis r4, r0, CFG_DBAT3L@h
409 ori r4, r4, CFG_DBAT3L@l
410 addis r3, r0, CFG_DBAT3U@h
411 ori r3, r3, CFG_DBAT3U@l
418 addis r4, r0, CFG_IBAT4L@h
419 ori r4, r4, CFG_IBAT4L@l
420 addis r3, r0, CFG_IBAT4U@h
421 ori r3, r3, CFG_IBAT4U@l
427 addis r4, r0, CFG_DBAT4L@h
428 ori r4, r4, CFG_DBAT4L@l
429 addis r3, r0, CFG_DBAT4U@h
430 ori r3, r3, CFG_DBAT4U@l
436 addis r4, r0, CFG_IBAT5L@h
437 ori r4, r4, CFG_IBAT5L@l
438 addis r3, r0, CFG_IBAT5U@h
439 ori r3, r3, CFG_IBAT5U@l
445 addis r4, r0, CFG_DBAT5L@h
446 ori r4, r4, CFG_DBAT5L@l
447 addis r3, r0, CFG_DBAT5U@h
448 ori r3, r3, CFG_DBAT5U@l
454 addis r4, r0, CFG_IBAT6L@h
455 ori r4, r4, CFG_IBAT6L@l
456 addis r3, r0, CFG_IBAT6U@h
457 ori r3, r3, CFG_IBAT6U@l
463 addis r4, r0, CFG_DBAT6L@h
464 ori r4, r4, CFG_DBAT6L@l
465 addis r3, r0, CFG_DBAT6U@h
466 ori r3, r3, CFG_DBAT6U@l
472 addis r4, r0, CFG_IBAT7L@h
473 ori r4, r4, CFG_IBAT7L@l
474 addis r3, r0, CFG_IBAT7U@h
475 ori r3, r3, CFG_IBAT7U@l
481 addis r4, r0, CFG_DBAT7L@h
482 ori r4, r4, CFG_DBAT7L@l
483 addis r3, r0, CFG_DBAT7U@h
484 ori r3, r3, CFG_DBAT7U@l
490 /* bats are done, now invalidate the TLBs */
493 addis r5, 0, 0x4 /* upper bound of 0x00040000 for 7400/750 */
506 .globl enable_addr_trans
508 /* enable address translation */
510 ori r5, r5, (MSR_IR | MSR_DR)
515 .globl disable_addr_trans
517 /* disable address translation */
520 andi. r0, r3, (MSR_IR | MSR_DR)
528 * This code finishes saving the registers to the exception frame
529 * and jumps to the appropriate handler for the exception.
530 * Register r21 is pointer into trap frame, r1 has new stack pointer.
532 .globl transfer_to_handler
543 andi. r24,r23,0x3f00 /* get vector offset */
547 mtspr SPRG2,r22 /* r1 is now kernel sp */
548 lwz r24,0(r23) /* virtual address of handler */
549 lwz r23,4(r23) /* where to go when done */
554 rfi /* jump to handler, enable MMU */
557 mfmsr r28 /* Disable interrupts */
561 SYNC /* Some chip revs need this... */
576 lwz r2,_NIP(r1) /* Restore environment */
595 /*-----------------------------------------------------------------------*/
597 * void relocate_code (addr_sp, gd, addr_moni)
599 * This "function" does not return, instead it continues in RAM
600 * after relocating the monitor code.
604 * r5 = length in bytes
609 mr r1, r3 /* Set new stack pointer */
610 mr r9, r4 /* Save copy of Global Data pointer */
611 mr r10, r5 /* Save copy of Destination Address */
613 mr r3, r5 /* Destination Address */
614 lis r4, CFG_MONITOR_BASE@h /* Source Address */
615 ori r4, r4, CFG_MONITOR_BASE@l
616 lwz r5, GOT(__init_end)
618 li r6, CFG_CACHELINE_SIZE /* Cache Line Size */
623 * New GOT-PTR = (old GOT-PTR - CFG_MONITOR_BASE) + Destination Address
629 /* First our own GOT */
631 /* then the one used by the C code */
638 bl board_relocate_rom
640 mr r3, r10 /* Destination Address */
641 lis r4, CFG_MONITOR_BASE@h /* Source Address */
642 ori r4, r4, CFG_MONITOR_BASE@l
643 lwz r5, GOT(__init_end)
645 li r6, CFG_CACHELINE_SIZE /* Cache Line Size */
650 beq cr1,4f /* In place copy is not necessary */
651 beq 7f /* Protect against 0 count */
670 * Now flush the cache: note that we must start from a cache aligned
671 * address. Otherwise we might miss one cache line.
675 beq 7f /* Always flush prefetch queue in any case */
683 sync /* Wait for all dcbst to complete on bus */
689 7: sync /* Wait for all icbi to complete on bus */
693 * We are done. Do not return, instead branch to second part of board
694 * initialization, now running from RAM.
696 addi r0, r10, in_ram - _start + EXC_OFF_SYS_RESET
705 * Relocation Function, r14 point to got2+0x8000
707 * Adjust got2 pointers, no need to check for 0, this code
708 * already puts a few entries in the table.
710 li r0,__got2_entries@sectoff@l
711 la r3,GOT(_GOT2_TABLE_)
712 lwz r11,GOT(_GOT2_TABLE_)
722 * Now adjust the fixups and the pointers to the fixups
723 * in case we need to move ourselves again.
725 2: li r0,__fixup_entries@sectoff@l
726 lwz r3,GOT(_FIXUP_TABLE_)
740 * Now clear BSS segment
742 lwz r3,GOT(__bss_start)
755 mr r3, r10 /* Destination Address */
756 #if defined(CONFIG_AMIGAONEG3SE) || \
757 defined(CONFIG_DB64360) || \
758 defined(CONFIG_DB64460) || \
759 defined(CONFIG_CPCI750) || \
760 defined(CONFIG_PPMC7XX)
761 mr r4, r9 /* Use RAM copy of the global data */
765 /* not reached - end relocate_code */
766 /*-----------------------------------------------------------------------*/
769 * Copy exception vector code to low memory
772 * r7: source address, r8: end address, r9: target address
777 lwz r8, GOT(_end_of_vectors)
779 li r9, 0x100 /* reset vector always at 0x100 */
782 bgelr /* return if r7>=r8 - just in case */
784 mflr r4 /* save link register */
794 * relocate `hdlr' and `int_return' entries
796 li r7, .L_MachineCheck - _start + EXC_OFF_SYS_RESET
797 li r8, Alignment - _start + EXC_OFF_SYS_RESET
800 addi r7, r7, 0x100 /* next exception vector */
804 li r7, .L_Alignment - _start + EXC_OFF_SYS_RESET
807 li r7, .L_ProgramCheck - _start + EXC_OFF_SYS_RESET
810 li r7, .L_FPUnavailable - _start + EXC_OFF_SYS_RESET
811 li r8, SystemCall - _start + EXC_OFF_SYS_RESET
814 addi r7, r7, 0x100 /* next exception vector */
818 li r7, .L_SingleStep - _start + EXC_OFF_SYS_RESET
819 li r8, _end_of_vectors - _start + EXC_OFF_SYS_RESET
822 addi r7, r7, 0x100 /* next exception vector */
826 /* enable execptions from RAM vectors */
832 mtlr r4 /* restore link register */
836 * Function: relocate entries for one exception vector
839 lwz r0, 0(r7) /* hdlr ... */
840 add r0, r0, r3 /* ... += dest_addr */
843 lwz r0, 4(r7) /* int_return ... */
844 add r0, r0, r3 /* ... += dest_addr */
852 #ifdef CFG_INIT_RAM_LOCK
854 /* Allocate Initial RAM in data cache.
856 lis r3, (CFG_INIT_RAM_ADDR & ~31)@h
857 ori r3, r3, (CFG_INIT_RAM_ADDR & ~31)@l
858 li r2, ((CFG_INIT_RAM_END & ~31) + \
859 (CFG_INIT_RAM_ADDR & 31) + 31) / 32
866 /* Lock the data cache */
874 .globl unlock_ram_in_cache
876 /* invalidate the INIT_RAM section */
877 lis r3, (CFG_INIT_RAM_ADDR & ~31)@h
878 ori r3, r3, (CFG_INIT_RAM_ADDR & ~31)@l
879 li r2, ((CFG_INIT_RAM_END & ~31) + \
880 (CFG_INIT_RAM_ADDR & 31) + 31) / 32
885 sync /* Wait for all icbi to complete on bus */
888 /* Unlock the data cache and invalidate it */