3 * Josh Huber <huber@mclx.com>, Mission Critical Linux, Inc.
5 * See file CREDITS for list of people who contributed to this
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
29 * written or collected and sometimes rewritten by
30 * Magnus Damm <damm@bitsmart.com>
32 * minor modifications by
33 * Wolfgang Denk <wd@denx.de>
35 * more modifications by
36 * Josh Huber <huber@mclx.com>
37 * added support for the 74xx series of cpus
38 * added support for the 7xx series of cpus
39 * made the code a little less hard-coded, and more auto-detectish
45 #include <asm/cache.h>
47 #if defined(CONFIG_OF_FLAT_TREE)
51 #ifdef CONFIG_AMIGAONEG3SE
52 #include "../board/MAI/AmigaOneG3SE/via686.h"
53 #include "../board/MAI/AmigaOneG3SE/memio.h"
56 DECLARE_GLOBAL_DATA_PTR;
66 switch (PVR_VER(pvr)) {
73 if (((pvr >> 8) & 0xff) == 0x01) {
74 type = CPU_750CX; /* old CX (80100 and 8010x?)*/
75 } else if (((pvr >> 8) & 0xff) == 0x22) {
76 type = CPU_750CX; /* CX (82201,82202) and CXe (82214) */
77 } else if (((pvr >> 8) & 0xff) == 0x33) {
78 type = CPU_750CX; /* CXe (83311) */
79 } else if (((pvr >> 12) & 0xF) == 0x3) {
123 /* ------------------------------------------------------------------------- */
125 #if !defined(CONFIG_BAB7xx)
128 uint type = get_cpu_type();
129 uint pvr = get_pvr();
130 ulong clock = gd->cpu_clk;
138 printf ("750CX%s v%d.%d", (pvr&0xf0)?"e":"",
192 printf("Unknown CPU -- PVR: 0x%08x\n", pvr);
196 printf ("%s v%d.%d", str, (pvr >> 8) & 0xFF, pvr & 0xFF);
198 printf (" @ %s MHz\n", strmhz(buf, clock));
203 /* these two functions are unimplemented currently [josh] */
205 /* -------------------------------------------------------------------- */
214 /* -------------------------------------------------------------------- */
223 /* -------------------------------------------------------------------- */
226 soft_restart(unsigned long addr)
228 /* SRR0 has system reset vector, SRR1 has default MSR value */
229 /* rfi restores MSR from SRR1 and sets the PC to the SRR0 value */
231 __asm__ __volatile__ ("mtspr 26, %0" :: "r" (addr));
232 __asm__ __volatile__ ("li 4, (1 << 6)" ::: "r4");
233 __asm__ __volatile__ ("mtspr 27, 4");
234 __asm__ __volatile__ ("rfi");
236 while(1); /* not reached */
240 #if !defined(CONFIG_PCIPPC2) && \
241 !defined(CONFIG_BAB7xx) && \
242 !defined(CONFIG_ELPPC) && \
243 !defined(CONFIG_PPMC7XX)
244 /* no generic way to do board reset. simply call soft_reset. */
246 do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
249 /* flush and disable I/D cache */
250 __asm__ __volatile__ ("mfspr 3, 1008" ::: "r3");
251 __asm__ __volatile__ ("ori 5, 5, 0xcc00" ::: "r5");
252 __asm__ __volatile__ ("ori 4, 3, 0xc00" ::: "r4");
253 __asm__ __volatile__ ("andc 5, 3, 5" ::: "r5");
254 __asm__ __volatile__ ("sync");
255 __asm__ __volatile__ ("mtspr 1008, 4");
256 __asm__ __volatile__ ("isync");
257 __asm__ __volatile__ ("sync");
258 __asm__ __volatile__ ("mtspr 1008, 5");
259 __asm__ __volatile__ ("isync");
260 __asm__ __volatile__ ("sync");
262 #ifdef CFG_RESET_ADDRESS
263 addr = CFG_RESET_ADDRESS;
266 * note: when CFG_MONITOR_BASE points to a RAM address,
267 * CFG_MONITOR_BASE - sizeof (ulong) is usually a valid
268 * address. Better pick an address known to be invalid on your
269 * system and assign it to CFG_RESET_ADDRESS.
271 addr = CFG_MONITOR_BASE - sizeof (ulong);
274 while(1); /* not reached */
278 /* ------------------------------------------------------------------------- */
281 * For the 7400 the TB clock runs at 1/4 the cpu bus speed.
283 #if defined(CONFIG_AMIGAONEG3SE) || defined(CFG_CONFIG_BUS_CLK)
284 unsigned long get_tbclk(void)
286 return (gd->bus_clk / 4);
288 #else /* ! CONFIG_AMIGAONEG3SE and !CFG_CONFIG_BUS_CLK*/
290 unsigned long get_tbclk (void)
292 return CFG_BUS_HZ / 4;
294 #endif /* CONFIG_AMIGAONEG3SE or CFG_CONFIG_BUS_CLK*/
295 /* ------------------------------------------------------------------------- */
296 #if defined(CONFIG_WATCHDOG)
297 #if !defined(CONFIG_PCIPPC2) && !defined(CONFIG_BAB7xx)
303 #endif /* !CONFIG_PCIPPC2 && !CONFIG_BAB7xx */
304 #endif /* CONFIG_WATCHDOG */
306 /* ------------------------------------------------------------------------- */
308 #ifdef CONFIG_OF_FLAT_TREE
310 ft_cpu_setup (void *blob, bd_t *bd)
316 clock = bd->bi_busfreq;
318 p = ft_get_prop (blob, "/cpus/" OF_CPU "/bus-frequency", &len);
320 *p = cpu_to_be32 (clock);
322 #if defined(CONFIG_TSI108_ETH)
323 p = ft_get_prop (blob, "/" OF_TSI "/ethernet@6200/address", &len);
324 memcpy (p, bd->bi_enetaddr, 6);
327 #if defined(CONFIG_HAS_ETH1)
328 p = ft_get_prop (blob, "/" OF_TSI "/ethernet@6600/address", &len);
329 memcpy (p, bd->bi_enet1addr, 6);
333 /* ------------------------------------------------------------------------- */