2 * Driver for NAND support, Rick Bronson
3 * borrowed heavily from:
4 * (c) 1999 Machine Vision Holdings, Inc.
5 * (c) 1999, 2000 David Woodhouse <dwmw2@infradead.org>
15 #ifdef CONFIG_SHOW_BOOT_PROGRESS
16 # include <status_led.h>
17 # define SHOW_BOOT_PROGRESS(arg) show_boot_progress(arg)
19 # define SHOW_BOOT_PROGRESS(arg)
22 #if (CONFIG_COMMANDS & CFG_CMD_NAND)
24 #include <linux/mtd/nftl.h>
25 #include <linux/mtd/nand.h>
26 #include <linux/mtd/nand_ids.h>
29 * Definition of the out of band configuration structure
31 struct nand_oob_config {
32 int ecc_pos[6]; /* position of ECC bytes inside oob */
33 int badblock_pos; /* position of bad block flag inside oob -1 = inactive */
34 int eccvalid_pos; /* position of ECC valid flag inside oob -1 = inactive */
35 } oob_config = { {0}, 0, 0};
42 #define CONFIG_MTD_NAND_ECC /* enable ECC */
43 /* #define CONFIG_MTD_NAND_ECC_JFFS2 */
48 static void nand_print(struct nand_chip *nand);
49 static int nand_rw (struct nand_chip* nand, int cmd,
50 size_t start, size_t len,
51 size_t * retlen, u_char * buf);
52 static int nand_erase(struct nand_chip* nand, size_t ofs, size_t len);
53 static int nand_read_ecc(struct nand_chip *nand, size_t start, size_t len,
54 size_t * retlen, u_char *buf, u_char *ecc_code);
55 static int nand_write_ecc (struct nand_chip* nand, size_t to, size_t len,
56 size_t * retlen, const u_char * buf, u_char * ecc_code);
57 #ifdef CONFIG_MTD_NAND_ECC
58 static int nand_correct_data (u_char *dat, u_char *read_ecc, u_char *calc_ecc);
59 static void nand_calculate_ecc (const u_char *dat, u_char *ecc_code);
62 static struct nand_chip nand_dev_desc[CFG_MAX_NAND_DEVICE] = {{0}};
64 /* Current NAND Device */
65 static int curr_device = -1;
67 /* ------------------------------------------------------------------------- */
69 int do_nand (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
76 printf ("Usage:\n%s\n", cmdtp->usage);
79 if (strcmp(argv[1],"info") == 0) {
84 for (i=0; i<CFG_MAX_NAND_DEVICE; ++i) {
85 if(nand_dev_desc[i].ChipID == NAND_ChipID_UNKNOWN)
86 continue; /* list only known devices */
87 printf ("Device %d: ", i);
88 nand_print(&nand_dev_desc[i]);
92 } else if (strcmp(argv[1],"device") == 0) {
93 if ((curr_device < 0) || (curr_device >= CFG_MAX_NAND_DEVICE)) {
94 puts ("\nno devices available\n");
97 printf ("\nDevice %d: ", curr_device);
98 nand_print(&nand_dev_desc[curr_device]);
101 printf ("Usage:\n%s\n", cmdtp->usage);
104 if (strcmp(argv[1],"device") == 0) {
105 int dev = (int)simple_strtoul(argv[2], NULL, 10);
107 printf ("\nDevice %d: ", dev);
108 if (dev >= CFG_MAX_NAND_DEVICE) {
109 puts ("unknown device\n");
112 nand_print(&nand_dev_desc[dev]);
113 /*nand_print (dev);*/
115 if (nand_dev_desc[dev].ChipID == NAND_ChipID_UNKNOWN) {
121 puts ("... is now current device\n");
126 printf ("Usage:\n%s\n", cmdtp->usage);
129 /* at least 4 args */
131 if (strcmp(argv[1],"read") == 0 || strcmp(argv[1],"write") == 0) {
132 ulong addr = simple_strtoul(argv[2], NULL, 16);
133 ulong off = simple_strtoul(argv[3], NULL, 16);
134 ulong size = simple_strtoul(argv[4], NULL, 16);
135 int cmd = (strcmp(argv[1],"read") == 0);
138 printf ("\nNAND %s: device %d offset %ld, size %ld ... ",
139 cmd ? "read" : "write", curr_device, off, size);
141 ret = nand_rw(nand_dev_desc + curr_device, cmd, off, size,
142 &total, (u_char*)addr);
144 printf ("%d bytes %s: %s\n", total, cmd ? "read" : "write",
145 ret ? "ERROR" : "OK");
148 } else if (strcmp(argv[1],"erase") == 0) {
149 ulong off = simple_strtoul(argv[2], NULL, 16);
150 ulong size = simple_strtoul(argv[3], NULL, 16);
153 printf ("\nNAND erase: device %d offset %ld, size %ld ... ",
154 curr_device, off, size);
156 ret = nand_erase (nand_dev_desc + curr_device, off, size);
158 printf("%s\n", ret ? "ERROR" : "OK");
162 printf ("Usage:\n%s\n", cmdtp->usage);
170 int do_nandboot (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
172 char *boot_device = NULL;
182 addr = CFG_LOAD_ADDR;
183 boot_device = getenv ("bootdevice");
186 addr = simple_strtoul(argv[1], NULL, 16);
187 boot_device = getenv ("bootdevice");
190 addr = simple_strtoul(argv[1], NULL, 16);
191 boot_device = argv[2];
194 addr = simple_strtoul(argv[1], NULL, 16);
195 boot_device = argv[2];
196 offset = simple_strtoul(argv[3], NULL, 16);
199 printf ("Usage:\n%s\n", cmdtp->usage);
200 SHOW_BOOT_PROGRESS (-1);
205 puts ("\n** No boot device **\n");
206 SHOW_BOOT_PROGRESS (-1);
210 dev = simple_strtoul(boot_device, &ep, 16);
212 if ((dev >= CFG_MAX_NAND_DEVICE) ||
213 (nand_dev_desc[dev].ChipID == NAND_ChipID_UNKNOWN)) {
214 printf ("\n** Device %d not available\n", dev);
215 SHOW_BOOT_PROGRESS (-1);
219 printf ("\nLoading from device %d: %s at 0x%lX (offset 0x%lX)\n",
220 dev, nand_dev_desc[dev].name, nand_dev_desc[dev].IO_ADDR,
223 if (nand_rw (nand_dev_desc + dev, 1, offset,
224 SECTORSIZE, NULL, (u_char *)addr)) {
225 printf ("** Read error on %d\n", dev);
226 SHOW_BOOT_PROGRESS (-1);
230 hdr = (image_header_t *)addr;
232 if (ntohl(hdr->ih_magic) == IH_MAGIC) {
234 print_image_hdr (hdr);
236 cnt = (ntohl(hdr->ih_size) + sizeof(image_header_t));
239 printf ("\n** Bad Magic Number 0x%x **\n", hdr->ih_magic);
240 SHOW_BOOT_PROGRESS (-1);
244 if (nand_rw (nand_dev_desc + dev, 1, offset + SECTORSIZE, cnt,
245 NULL, (u_char *)(addr+SECTORSIZE))) {
246 printf ("** Read error on %d\n", dev);
247 SHOW_BOOT_PROGRESS (-1);
251 /* Loading ok, update default load address */
255 /* Check if we should attempt an auto-start */
256 if (((ep = getenv("autostart")) != NULL) && (strcmp(ep,"yes") == 0)) {
258 extern int do_bootm (cmd_tbl_t *, int, int, char *[]);
260 local_args[0] = argv[0];
261 local_args[1] = NULL;
263 printf ("Automatic boot of image at addr 0x%08lX ...\n", addr);
265 do_bootm (cmdtp, 0, 1, local_args);
271 static int nand_rw (struct nand_chip* nand, int cmd,
272 size_t start, size_t len,
273 size_t * retlen, u_char * buf)
275 int noecc, ret = 0, n, total = 0;
279 /* The ECC will not be calculated correctly if
280 less than 512 is written or read */
281 noecc = (start != (start | 0x1ff) + 1) || (len < 0x200);
283 ret = nand_read_ecc(nand, start, len,
285 noecc ? NULL : eccbuf);
287 ret = nand_write_ecc(nand, start, len,
289 noecc ? NULL : eccbuf);
305 static void nand_print(struct nand_chip *nand)
307 printf("%s at 0x%lX,\n"
308 "\t %d chip%s %s, size %d MB, \n"
309 "\t total size %ld MB, sector size %ld kB\n",
310 nand->name, nand->IO_ADDR, nand->numchips,
311 nand->numchips>1 ? "s" : "", nand->chips_name,
312 1 << (nand->chipshift - 20),
313 nand->totlen >> 20, nand->erasesize >> 10);
315 if (nand->nftl_found) {
316 struct NFTLrecord *nftl = &nand->nftl;
317 unsigned long bin_size, flash_size;
319 bin_size = nftl->nb_boot_blocks * nand->erasesize;
320 flash_size = (nftl->nb_blocks - nftl->nb_boot_blocks) * nand->erasesize;
322 printf("\t NFTL boot record:\n"
323 "\t Binary partition: size %ld%s\n"
324 "\t Flash disk partition: size %ld%s, offset 0x%lx\n",
325 bin_size > (1 << 20) ? bin_size >> 20 : bin_size >> 10,
326 bin_size > (1 << 20) ? "MB" : "kB",
327 flash_size > (1 << 20) ? flash_size >> 20 : flash_size >> 10,
328 flash_size > (1 << 20) ? "MB" : "kB", bin_size);
330 puts ("\t No NFTL boot record found.\n");
334 /* ------------------------------------------------------------------------- */
336 /* This function is needed to avoid calls of the __ashrdi3 function. */
337 static int shr(int val, int shift)
342 static int NanD_WaitReady(struct nand_chip *nand)
344 /* This is inline, to optimise the common case, where it's ready instantly */
346 NAND_WAIT_READY(nand);
351 /* NanD_Command: Send a flash command to the flash chip */
353 static inline int NanD_Command(struct nand_chip *nand, unsigned char command)
355 unsigned long nandptr = nand->IO_ADDR;
357 /* Assert the CLE (Command Latch Enable) line to the flash chip */
358 NAND_CTL_SETCLE(nandptr);
360 /* Send the command */
361 WRITE_NAND_COMMAND(command, nandptr);
363 /* Lower the CLE line */
364 NAND_CTL_CLRCLE(nandptr);
366 return NanD_WaitReady(nand);
369 /* NanD_Address: Set the current address for the flash chip */
371 static int NanD_Address(struct nand_chip *nand, int numbytes, unsigned long ofs)
373 unsigned long nandptr;
376 nandptr = nand->IO_ADDR;
378 /* Assert the ALE (Address Latch Enable) line to the flash chip */
379 NAND_CTL_SETALE(nandptr);
381 /* Send the address */
382 /* Devices with 256-byte page are addressed as:
383 Column (bits 0-7), Page (bits 8-15, 16-23, 24-31)
384 * there is no device on the market with page256
385 and more than 24 bits.
386 Devices with 512-byte page are addressed as:
387 Column (bits 0-7), Page (bits 9-16, 17-24, 25-31)
388 * 25-31 is sent only if the chip support it.
389 * bit 8 changes the read command to be sent
390 (NAND_CMD_READ0 or NAND_CMD_READ1).
393 if (numbytes == ADDR_COLUMN || numbytes == ADDR_COLUMN_PAGE)
394 WRITE_NAND_ADDRESS(ofs, nandptr);
396 ofs = ofs >> nand->page_shift;
398 if (numbytes == ADDR_PAGE || numbytes == ADDR_COLUMN_PAGE)
399 for (i = 0; i < nand->pageadrlen; i++, ofs = ofs >> 8)
400 WRITE_NAND_ADDRESS(ofs, nandptr);
402 /* Lower the ALE line */
403 NAND_CTL_CLRALE(nandptr);
405 /* Wait for the chip to respond */
406 return NanD_WaitReady(nand);
409 /* NanD_SelectChip: Select a given flash chip within the current floor */
411 static inline int NanD_SelectChip(struct nand_chip *nand, int chip)
413 /* Wait for it to be ready */
414 return NanD_WaitReady(nand);
417 /* NanD_IdentChip: Identify a given NAND chip given {floor,chip} */
419 static int NanD_IdentChip(struct nand_chip *nand, int floor, int chip)
423 NAND_ENABLE_CE(nand); /* set pin low */
425 if (NanD_Command(nand, NAND_CMD_RESET)) {
427 printf("NanD_Command (reset) for %d,%d returned true\n",
430 NAND_DISABLE_CE(nand); /* set pin high */
434 /* Read the NAND chip ID: 1. Send ReadID command */
435 if (NanD_Command(nand, NAND_CMD_READID)) {
437 printf("NanD_Command (ReadID) for %d,%d returned true\n",
440 NAND_DISABLE_CE(nand); /* set pin high */
444 /* Read the NAND chip ID: 2. Send address byte zero */
445 NanD_Address(nand, ADDR_COLUMN, 0);
447 /* Read the manufacturer and device id codes from the device */
449 mfr = READ_NAND(nand->IO_ADDR);
451 id = READ_NAND(nand->IO_ADDR);
453 NAND_DISABLE_CE(nand); /* set pin high */
454 /* No response - return failure */
455 if (mfr == 0xff || mfr == 0)
457 printf("NanD_Command (ReadID) got %d %d\n", mfr, id);
461 /* Check it's the same as the first chip we identified.
462 * M-Systems say that any given nand_chip device should only
463 * contain _one_ type of flash part, although that's not a
464 * hardware restriction. */
466 if (nand->mfr == mfr && nand->id == id)
467 return 1; /* This is another the same the first */
469 printf("Flash chip at floor %d, chip %d is different:\n",
473 /* Print and store the manufacturer and ID codes. */
474 for (i = 0; nand_flash_ids[i].name != NULL; i++) {
475 if (mfr == nand_flash_ids[i].manufacture_id &&
476 id == nand_flash_ids[i].model_id) {
478 printf("Flash chip found:\n\t Manufacturer ID: 0x%2.2X, "
479 "Chip ID: 0x%2.2X (%s)\n", mfr, id,
480 nand_flash_ids[i].name);
486 nand_flash_ids[i].chipshift;
487 nand->page256 = nand_flash_ids[i].page256;
489 nand->oobblock = 256;
491 nand->page_shift = 8;
493 nand->oobblock = 512;
495 nand->page_shift = 9;
498 nand_flash_ids[i].pageadrlen;
500 nand_flash_ids[i].erasesize;
502 nand_flash_ids[i].name;
511 /* We haven't fully identified the chip. Print as much as we know. */
512 printf("Unknown flash chip found: %2.2X %2.2X\n",
519 /* NanD_ScanChips: Find all NAND chips present in a nand_chip, and identify them */
521 static void NanD_ScanChips(struct nand_chip *nand)
524 int numchips[NAND_MAX_FLOORS];
525 int maxchips = NAND_MAX_CHIPS;
533 /* For each floor, find the number of valid chips it contains */
534 for (floor = 0; floor < NAND_MAX_FLOORS; floor++) {
537 for (chip = 0; chip < maxchips && ret != 0; chip++) {
539 ret = NanD_IdentChip(nand, floor, chip);
547 /* If there are none at all that we recognise, bail */
548 if (!nand->numchips) {
549 puts ("No flash chips recognised.\n");
553 /* Allocate an array to hold the information for each chip */
554 nand->chips = malloc(sizeof(struct Nand) * nand->numchips);
556 puts ("No memory for allocating chip info structures\n");
562 /* Fill out the chip array with {floor, chipno} for each
563 * detected chip in the device. */
564 for (floor = 0; floor < NAND_MAX_FLOORS; floor++) {
565 for (chip = 0; chip < numchips[floor]; chip++) {
566 nand->chips[ret].floor = floor;
567 nand->chips[ret].chip = chip;
568 nand->chips[ret].curadr = 0;
569 nand->chips[ret].curmode = 0x50;
574 /* Calculate and print the total size of the device */
575 nand->totlen = nand->numchips * (1 << nand->chipshift);
578 printf("%d flash chips found. Total nand_chip size: %ld MB\n",
579 nand->numchips, nand->totlen >> 20);
582 #ifdef CONFIG_MTD_NAND_ECC
583 /* we need to be fast here, 1 us per read translates to 1 second per meg */
584 static void nand_fast_copy (unsigned char *source, unsigned char *dest, long cntr)
613 /* we need to be fast here, 1 us per read translates to 1 second per meg */
614 static void nand_fast_read(unsigned char *data_buf, int cntr, unsigned long nandptr)
618 *data_buf++ = READ_NAND(nandptr);
619 *data_buf++ = READ_NAND(nandptr);
620 *data_buf++ = READ_NAND(nandptr);
621 *data_buf++ = READ_NAND(nandptr);
622 *data_buf++ = READ_NAND(nandptr);
623 *data_buf++ = READ_NAND(nandptr);
624 *data_buf++ = READ_NAND(nandptr);
625 *data_buf++ = READ_NAND(nandptr);
626 *data_buf++ = READ_NAND(nandptr);
627 *data_buf++ = READ_NAND(nandptr);
628 *data_buf++ = READ_NAND(nandptr);
629 *data_buf++ = READ_NAND(nandptr);
630 *data_buf++ = READ_NAND(nandptr);
631 *data_buf++ = READ_NAND(nandptr);
632 *data_buf++ = READ_NAND(nandptr);
633 *data_buf++ = READ_NAND(nandptr);
638 *data_buf++ = READ_NAND(nandptr);
643 /* This routine is made available to other mtd code via
644 * inter_module_register. It must only be accessed through
645 * inter_module_get which will bump the use count of this module. The
646 * addresses passed back in mtd are valid as long as the use count of
647 * this module is non-zero, i.e. between inter_module_get and
648 * inter_module_put. Keith Owens <kaos@ocs.com.au> 29 Oct 2000.
654 static int nand_read_ecc(struct nand_chip *nand, size_t start, size_t len,
655 size_t * retlen, u_char *buf, u_char *ecc_code)
659 #ifdef CONFIG_MTD_NAND_ECC
665 unsigned long nandptr = nand->IO_ADDR;
667 /* Do not allow reads past end of device */
668 if ((start + len) > nand->totlen) {
669 printf ("nand_read_ecc: Attempt read beyond end of device %x %x %x\n", (uint) start, (uint) len, (uint) nand->totlen);
674 /* First we calculate the starting page */
675 page = shr(start, nand->page_shift);
677 /* Get raw starting column */
678 col = start & (nand->oobblock - 1);
680 /* Initialize return value */
683 /* Select the NAND device */
684 NAND_ENABLE_CE(nand); /* set pin low */
686 /* Loop until all data read */
687 while (*retlen < len) {
690 #ifdef CONFIG_MTD_NAND_ECC
692 /* Do we have this page in cache ? */
693 if (nand->cache_page == page)
695 /* Send the read command */
696 NanD_Command(nand, NAND_CMD_READ0);
697 NanD_Address(nand, ADDR_COLUMN_PAGE, (page << nand->page_shift) + col);
698 /* Read in a page + oob data */
699 nand_fast_read(nand->data_buf, nand->oobblock + nand->oobsize, nandptr);
701 /* copy data into cache, for read out of cache and if ecc fails */
702 if (nand->data_cache)
703 memcpy (nand->data_cache, nand->data_buf, nand->oobblock + nand->oobsize);
705 /* Pick the ECC bytes out of the oob data */
706 for (j = 0; j < 6; j++)
707 ecc_code[j] = nand->data_buf[(nand->oobblock + oob_config.ecc_pos[j])];
709 /* Calculate the ECC and verify it */
710 /* If block was not written with ECC, skip ECC */
711 if (oob_config.eccvalid_pos != -1 &&
712 (nand->data_buf[nand->oobblock + oob_config.eccvalid_pos] & 0x0f) != 0x0f) {
714 nand_calculate_ecc (&nand->data_buf[0], &ecc_calc[0]);
715 switch (nand_correct_data (&nand->data_buf[0], &ecc_code[0], &ecc_calc[0])) {
717 printf ("nand_read_ecc: " "Failed ECC read, page 0x%08x\n", page);
721 case 2: /* transfer ECC corrected data to cache */
722 memcpy (nand->data_cache, nand->data_buf, 256);
727 if (oob_config.eccvalid_pos != -1 &&
728 nand->oobblock == 512 && (nand->data_buf[nand->oobblock + oob_config.eccvalid_pos] & 0xf0) != 0xf0) {
730 nand_calculate_ecc (&nand->data_buf[256], &ecc_calc[3]);
731 switch (nand_correct_data (&nand->data_buf[256], &ecc_code[3], &ecc_calc[3])) {
733 printf ("nand_read_ecc: " "Failed ECC read, page 0x%08x\n", page);
737 case 2: /* transfer ECC corrected data to cache */
738 if (nand->data_cache)
739 memcpy (&nand->data_cache[256], &nand->data_buf[256], 256);
744 /* Read the data from ECC data buffer into return buffer */
745 data_poi = (nand->data_cache) ? nand->data_cache : nand->data_buf;
747 if ((*retlen + (nand->oobblock - col)) >= len) {
748 nand_fast_copy (data_poi, buf + *retlen, len - *retlen);
751 nand_fast_copy (data_poi, buf + *retlen, nand->oobblock - col);
752 *retlen += nand->oobblock - col;
754 /* Set cache page address, invalidate, if ecc_failed */
755 nand->cache_page = (nand->data_cache && !ecc_failed) ? page : -1;
757 ecc_status += ecc_failed;
761 /* Send the read command */
762 NanD_Command(nand, NAND_CMD_READ0);
763 NanD_Address(nand, ADDR_COLUMN_PAGE, (page << nand->page_shift) + col);
764 /* Read the data directly into the return buffer */
765 if ((*retlen + (nand->oobblock - col)) >= len) {
766 nand_fast_read(buf + *retlen, len - *retlen, nandptr);
771 nand_fast_read(buf + *retlen, nand->oobblock - col, nandptr);
772 *retlen += nand->oobblock - col;
775 /* For subsequent reads align to page boundary. */
777 /* Increment page address */
781 /* De-select the NAND device */
782 NAND_DISABLE_CE(nand); /* set pin high */
785 * Return success, if no ECC failures, else -EIO
786 * fs driver will take care of that, because
787 * retlen == desired len and result == -EIO
789 return ecc_status ? -1 : 0;
794 * Nand_page_program function is used for write and writev !
796 static int nand_write_page (struct nand_chip *nand,
797 int page, int col, int last, u_char * ecc_code)
801 #ifdef CONFIG_MTD_NAND_ECC
802 unsigned long nandptr = nand->IO_ADDR;
803 #ifdef CONFIG_MTD_NAND_VERIFY_WRITE
804 int ecc_bytes = (nand->oobblock == 512) ? 6 : 3;
808 for (i = nand->oobblock; i < nand->oobblock + nand->oobsize; i++)
809 nand->data_buf[i] = 0xff;
811 #ifdef CONFIG_MTD_NAND_ECC
812 /* Zero out the ECC array */
813 for (i = 0; i < 6; i++)
816 /* Read back previous written data, if col > 0 */
818 NanD_Command(nand, NAND_CMD_READ0);
819 NanD_Address(nand, ADDR_COLUMN_PAGE, (page << nand->page_shift) + col);
820 for (i = 0; i < col; i++)
821 nand->data_buf[i] = READ_NAND (nandptr);
824 /* Calculate and write the ECC if we have enough data */
825 if ((col < nand->eccsize) && (last >= nand->eccsize)) {
826 nand_calculate_ecc (&nand->data_buf[0], &(ecc_code[0]));
827 for (i = 0; i < 3; i++)
828 nand->data_buf[(nand->oobblock + oob_config.ecc_pos[i])] = ecc_code[i];
829 if (oob_config.eccvalid_pos != -1)
830 nand->data_buf[nand->oobblock + oob_config.eccvalid_pos] = 0xf0;
833 /* Calculate and write the second ECC if we have enough data */
834 if ((nand->oobblock == 512) && (last == nand->oobblock)) {
835 nand_calculate_ecc (&nand->data_buf[256], &(ecc_code[3]));
836 for (i = 3; i < 6; i++)
837 nand->data_buf[(nand->oobblock + oob_config.ecc_pos[i])] = ecc_code[i];
838 if (oob_config.eccvalid_pos != -1)
839 nand->data_buf[nand->oobblock + oob_config.eccvalid_pos] &= 0x0f;
842 /* Prepad for partial page programming !!! */
843 for (i = 0; i < col; i++)
844 nand->data_buf[i] = 0xff;
846 /* Postpad for partial page programming !!! oob is already padded */
847 for (i = last; i < nand->oobblock; i++)
848 nand->data_buf[i] = 0xff;
850 /* Send command to begin auto page programming */
851 NanD_Command(nand, NAND_CMD_SEQIN);
852 NanD_Address(nand, ADDR_COLUMN_PAGE, (page << nand->page_shift) + col);
854 /* Write out complete page of data */
855 for (i = 0; i < (nand->oobblock + nand->oobsize); i++)
856 WRITE_NAND(nand->data_buf[i], nand->IO_ADDR);
858 /* Send command to actually program the data */
859 NanD_Command(nand, NAND_CMD_PAGEPROG);
860 NanD_Command(nand, NAND_CMD_STATUS);
862 /* See if device thinks it succeeded */
863 if (READ_NAND(nand->IO_ADDR) & 0x01) {
864 printf ("nand_write_ecc: " "Failed write, page 0x%08x, ", page);
867 #ifdef CONFIG_MTD_NAND_VERIFY_WRITE
869 * The NAND device assumes that it is always writing to
870 * a cleanly erased page. Hence, it performs its internal
871 * write verification only on bits that transitioned from
872 * 1 to 0. The device does NOT verify the whole page on a
873 * byte by byte basis. It is possible that the page was
874 * not completely erased or the page is becoming unusable
875 * due to wear. The read with ECC would catch the error
876 * later when the ECC page check fails, but we would rather
877 * catch it early in the page write stage. Better to write
878 * no data than invalid data.
881 /* Send command to read back the page */
882 if (col < nand->eccsize)
883 NanD_Command(nand, NAND_CMD_READ0);
885 NanD_Command(nand, NAND_CMD_READ1);
886 NanD_Address(nand, ADDR_COLUMN_PAGE, (page << nand->page_shift) + col);
888 /* Loop through and verify the data */
889 for (i = col; i < last; i++) {
890 if (nand->data_buf[i] != readb (nand->IO_ADDR)) {
891 printf ("nand_write_ecc: " "Failed write verify, page 0x%08x ", page);
896 #ifdef CONFIG_MTD_NAND_ECC
898 * We also want to check that the ECC bytes wrote
899 * correctly for the same reasons stated above.
901 NanD_Command(nand, NAND_CMD_READOOB);
902 NanD_Address(nand, ADDR_COLUMN_PAGE, (page << nand->page_shift) + col);
903 for (i = 0; i < nand->oobsize; i++)
904 nand->data_buf[i] = readb (nand->IO_ADDR);
905 for (i = 0; i < ecc_bytes; i++) {
906 if ((nand->data_buf[(oob_config.ecc_pos[i])] != ecc_code[i]) && ecc_code[i]) {
907 printf ("nand_write_ecc: Failed ECC write "
908 "verify, page 0x%08x, " "%6i bytes were succesful\n", page, i);
916 static int nand_write_ecc (struct nand_chip* nand, size_t to, size_t len,
917 size_t * retlen, const u_char * buf, u_char * ecc_code)
919 int i, page, col, cnt, ret = 0;
921 /* Do not allow write past end of device */
922 if ((to + len) > nand->totlen) {
923 printf ("nand_write_oob: Attempt to write past end of page\n");
927 /* Shift to get page */
928 page = ((int) to) >> nand->page_shift;
930 /* Get the starting column */
931 col = to & (nand->oobblock - 1);
933 /* Initialize return length value */
936 /* Select the NAND device */
937 NAND_ENABLE_CE(nand); /* set pin low */
939 /* Check the WP bit */
940 NanD_Command(nand, NAND_CMD_STATUS);
941 if (!(READ_NAND(nand->IO_ADDR) & 0x80)) {
942 printf ("nand_write_ecc: Device is write protected!!!\n");
947 /* Loop until all data is written */
948 while (*retlen < len) {
949 /* Invalidate cache, if we write to this page */
950 if (nand->cache_page == page)
951 nand->cache_page = -1;
953 /* Write data into buffer */
954 if ((col + len) >= nand->oobblock)
955 for (i = col, cnt = 0; i < nand->oobblock; i++, cnt++)
956 nand->data_buf[i] = buf[(*retlen + cnt)];
958 for (i = col, cnt = 0; cnt < (len - *retlen); i++, cnt++)
959 nand->data_buf[i] = buf[(*retlen + cnt)];
960 /* We use the same function for write and writev !) */
961 ret = nand_write_page (nand, page, col, i, ecc_code);
965 /* Next data start at page boundary */
968 /* Update written bytes count */
971 /* Increment page address */
979 /* De-select the NAND device */
980 NAND_DISABLE_CE(nand); /* set pin high */
986 /* Read a buffer from NanD */
987 static void NanD_ReadBuf(struct nand_chip *nand, u_char * buf, int len)
989 unsigned long nandptr;
991 nandptr = nand->IO_ADDR;
993 for (; len > 0; len--)
994 *buf++ = READ_NAND(nandptr);
997 /* Write a buffer to NanD */
998 static void NanD_WriteBuf(struct nand_chip *nand, const u_char * buf, int len)
1000 unsigned long nandptr;
1003 nandptr = nand->IO_ADDR;
1008 for (i = 0; i < len; i++)
1009 WRITE_NAND(buf[i], nandptr);
1013 /* find_boot_record: Find the NFTL Media Header and its Spare copy which contains the
1014 * various device information of the NFTL partition and Bad Unit Table. Update
1015 * the ReplUnitTable[] table accroding to the Bad Unit Table. ReplUnitTable[]
1016 * is used for management of Erase Unit in other routines in nftl.c and nftlmount.c
1018 static int find_boot_record(struct NFTLrecord *nftl)
1020 struct nftl_uci1 h1;
1021 struct nftl_oob oob;
1022 unsigned int block, boot_record_count = 0;
1025 struct NFTLMediaHeader *mh = &nftl->MediaHdr;
1028 nftl->MediaUnit = BLOCK_NIL;
1029 nftl->SpareMediaUnit = BLOCK_NIL;
1031 /* search for a valid boot record */
1032 for (block = 0; block < nftl->nb_blocks; block++) {
1035 /* Check for ANAND header first. Then can whinge if it's found but later
1037 if ((ret = nand_read_ecc(nftl->mtd, block * nftl->EraseSize, SECTORSIZE,
1038 &retlen, buf, NULL))) {
1039 static int warncount = 5;
1042 printf("Block read at 0x%x failed\n", block * nftl->EraseSize);
1044 puts ("Further failures for this block will not be printed\n");
1049 if (retlen < 6 || memcmp(buf, "ANAND", 6)) {
1050 /* ANAND\0 not found. Continue */
1052 printf("ANAND header not found at 0x%x\n", block * nftl->EraseSize);
1058 printf("ANAND header found at 0x%x\n", block * nftl->EraseSize);
1061 /* To be safer with BIOS, also use erase mark as discriminant */
1062 if ((ret = nand_read_oob(nftl->mtd, block * nftl->EraseSize + SECTORSIZE + 8,
1063 8, &retlen, (char *)&h1) < 0)) {
1065 printf("ANAND header found at 0x%x, but OOB data read failed\n",
1066 block * nftl->EraseSize);
1071 /* OK, we like it. */
1073 if (boot_record_count) {
1074 /* We've already processed one. So we just check if
1075 this one is the same as the first one we found */
1076 if (memcmp(mh, buf, sizeof(struct NFTLMediaHeader))) {
1078 printf("NFTL Media Headers at 0x%x and 0x%x disagree.\n",
1079 nftl->MediaUnit * nftl->EraseSize, block * nftl->EraseSize);
1081 /* if (debug) Print both side by side */
1084 if (boot_record_count == 1)
1085 nftl->SpareMediaUnit = block;
1087 boot_record_count++;
1091 /* This is the first we've seen. Copy the media header structure into place */
1092 memcpy(mh, buf, sizeof(struct NFTLMediaHeader));
1094 /* Do some sanity checks on it */
1095 if (mh->UnitSizeFactor != 0xff) {
1096 puts ("Sorry, we don't support UnitSizeFactor "
1101 nftl->nb_boot_blocks = le16_to_cpu(mh->FirstPhysicalEUN);
1102 if ((nftl->nb_boot_blocks + 2) >= nftl->nb_blocks) {
1103 printf ("NFTL Media Header sanity check failed:\n"
1104 "nb_boot_blocks (%d) + 2 > nb_blocks (%d)\n",
1105 nftl->nb_boot_blocks, nftl->nb_blocks);
1109 nftl->numvunits = le32_to_cpu(mh->FormattedSize) / nftl->EraseSize;
1110 if (nftl->numvunits > (nftl->nb_blocks - nftl->nb_boot_blocks - 2)) {
1111 printf ("NFTL Media Header sanity check failed:\n"
1112 "numvunits (%d) > nb_blocks (%d) - nb_boot_blocks(%d) - 2\n",
1115 nftl->nb_boot_blocks);
1119 nftl->nr_sects = nftl->numvunits * (nftl->EraseSize / SECTORSIZE);
1121 /* If we're not using the last sectors in the device for some reason,
1122 reduce nb_blocks accordingly so we forget they're there */
1123 nftl->nb_blocks = le16_to_cpu(mh->NumEraseUnits) + le16_to_cpu(mh->FirstPhysicalEUN);
1125 /* read the Bad Erase Unit Table and modify ReplUnitTable[] accordingly */
1126 for (i = 0; i < nftl->nb_blocks; i++) {
1127 if ((i & (SECTORSIZE - 1)) == 0) {
1128 /* read one sector for every SECTORSIZE of blocks */
1129 if ((ret = nand_read_ecc(nftl->mtd, block * nftl->EraseSize +
1130 i + SECTORSIZE, SECTORSIZE,
1131 &retlen, buf, (char *)&oob)) < 0) {
1132 puts ("Read of bad sector table failed\n");
1136 /* mark the Bad Erase Unit as RESERVED in ReplUnitTable */
1137 if (buf[i & (SECTORSIZE - 1)] != 0xff)
1138 nftl->ReplUnitTable[i] = BLOCK_RESERVED;
1141 nftl->MediaUnit = block;
1142 boot_record_count++;
1144 } /* foreach (block) */
1146 return boot_record_count?0:-1;
1148 static int nand_read_oob(struct nand_chip* nand, size_t ofs, size_t len,
1149 size_t * retlen, u_char * buf)
1151 int len256 = 0, ret;
1152 unsigned long nandptr;
1153 struct Nand *mychip;
1155 nandptr = nand->IO_ADDR;
1157 mychip = &nand->chips[shr(ofs, nand->chipshift)];
1159 /* update address for 2M x 8bit devices. OOB starts on the second */
1160 /* page to maintain compatibility with nand_read_ecc. */
1161 if (nand->page256) {
1168 NanD_Command(nand, NAND_CMD_READOOB);
1169 NanD_Address(nand, ADDR_COLUMN_PAGE, ofs);
1171 /* treat crossing 8-byte OOB data for 2M x 8bit devices */
1172 /* Note: datasheet says it should automaticaly wrap to the */
1173 /* next OOB block, but it didn't work here. mf. */
1174 if (nand->page256 && ofs + len > (ofs | 0x7) + 1) {
1175 len256 = (ofs | 0x7) + 1 - ofs;
1176 NanD_ReadBuf(nand, buf, len256);
1178 NanD_Command(nand, NAND_CMD_READOOB);
1179 NanD_Address(nand, ADDR_COLUMN_PAGE, ofs & (~0x1ff));
1182 NanD_ReadBuf(nand, &buf[len256], len - len256);
1185 /* Reading the full OOB data drops us off of the end of the page,
1186 * causing the flash device to go into busy mode, so we need
1187 * to wait until ready 11.4.1 and Toshiba TC58256FT nands */
1189 ret = NanD_WaitReady(nand);
1194 static int nand_write_oob(struct nand_chip* nand, size_t ofs, size_t len,
1195 size_t * retlen, const u_char * buf)
1198 unsigned long nandptr = nand->IO_ADDR;
1201 printf("nand_write_oob(%lx, %d): %2.2X %2.2X %2.2X %2.2X ... %2.2X %2.2X .. %2.2X %2.2X\n",
1202 (long)ofs, len, buf[0], buf[1], buf[2], buf[3],
1203 buf[8], buf[9], buf[14],buf[15]);
1206 /* Reset the chip */
1207 NanD_Command(nand, NAND_CMD_RESET);
1209 /* issue the Read2 command to set the pointer to the Spare Data Area. */
1210 NanD_Command(nand, NAND_CMD_READOOB);
1211 NanD_Address(nand, ADDR_COLUMN_PAGE, ofs);
1213 /* update address for 2M x 8bit devices. OOB starts on the second */
1214 /* page to maintain compatibility with nand_read_ecc. */
1215 if (nand->page256) {
1222 /* issue the Serial Data In command to initial the Page Program process */
1223 NanD_Command(nand, NAND_CMD_SEQIN);
1224 NanD_Address(nand, ADDR_COLUMN_PAGE, ofs);
1226 /* treat crossing 8-byte OOB data for 2M x 8bit devices */
1227 /* Note: datasheet says it should automaticaly wrap to the */
1228 /* next OOB block, but it didn't work here. mf. */
1229 if (nand->page256 && ofs + len > (ofs | 0x7) + 1) {
1230 len256 = (ofs | 0x7) + 1 - ofs;
1231 NanD_WriteBuf(nand, buf, len256);
1233 NanD_Command(nand, NAND_CMD_PAGEPROG);
1234 NanD_Command(nand, NAND_CMD_STATUS);
1235 /* NanD_WaitReady() is implicit in NanD_Command */
1237 if (READ_NAND(nandptr) & 1) {
1238 puts ("Error programming oob data\n");
1239 /* There was an error */
1243 NanD_Command(nand, NAND_CMD_SEQIN);
1244 NanD_Address(nand, ADDR_COLUMN_PAGE, ofs & (~0x1ff));
1247 NanD_WriteBuf(nand, &buf[len256], len - len256);
1249 NanD_Command(nand, NAND_CMD_PAGEPROG);
1250 NanD_Command(nand, NAND_CMD_STATUS);
1251 /* NanD_WaitReady() is implicit in NanD_Command */
1253 if (READ_NAND(nandptr) & 1) {
1254 puts ("Error programming oob data\n");
1255 /* There was an error */
1266 static int nand_erase(struct nand_chip* nand, size_t ofs, size_t len)
1268 unsigned long nandptr;
1269 struct Nand *mychip;
1271 if (ofs & (nand->erasesize-1) || len & (nand->erasesize-1)) {
1272 printf ("Offset and size must be sector aligned, erasesize = %d\n",
1273 (int) nand->erasesize);
1277 nandptr = nand->IO_ADDR;
1279 /* FIXME: Do nand in the background. Use timers or schedule_task() */
1281 mychip = &nand->chips[shr(ofs, nand->chipshift)];
1283 NanD_Command(nand, NAND_CMD_ERASE1);
1284 NanD_Address(nand, ADDR_PAGE, ofs);
1285 NanD_Command(nand, NAND_CMD_ERASE2);
1287 NanD_Command(nand, NAND_CMD_STATUS);
1289 if (READ_NAND(nandptr) & 1) {
1290 printf("Error erasing at 0x%lx\n", (long)ofs);
1291 /* There was an error */
1294 ofs += nand->erasesize;
1295 len -= nand->erasesize;
1302 static inline int nandcheck(unsigned long potential, unsigned long physadr)
1309 void nand_probe(unsigned long physadr)
1311 struct nand_chip *nand = NULL;
1312 int i = 0, ChipID = 1;
1314 #ifdef CONFIG_MTD_NAND_ECC_JFFS2
1315 oob_config.ecc_pos[0] = NAND_JFFS2_OOB_ECCPOS0;
1316 oob_config.ecc_pos[1] = NAND_JFFS2_OOB_ECCPOS1;
1317 oob_config.ecc_pos[2] = NAND_JFFS2_OOB_ECCPOS2;
1318 oob_config.ecc_pos[3] = NAND_JFFS2_OOB_ECCPOS3;
1319 oob_config.ecc_pos[4] = NAND_JFFS2_OOB_ECCPOS4;
1320 oob_config.ecc_pos[5] = NAND_JFFS2_OOB_ECCPOS5;
1321 oob_config.badblock_pos = 5;
1322 oob_config.eccvalid_pos = 4;
1324 oob_config.ecc_pos[0] = NAND_NOOB_ECCPOS0;
1325 oob_config.ecc_pos[1] = NAND_NOOB_ECCPOS1;
1326 oob_config.ecc_pos[2] = NAND_NOOB_ECCPOS2;
1327 oob_config.ecc_pos[3] = NAND_NOOB_ECCPOS3;
1328 oob_config.ecc_pos[4] = NAND_NOOB_ECCPOS4;
1329 oob_config.ecc_pos[5] = NAND_NOOB_ECCPOS5;
1330 oob_config.badblock_pos = NAND_NOOB_BADBPOS;
1331 oob_config.eccvalid_pos = NAND_NOOB_ECCVPOS;
1334 for (i=0; i<CFG_MAX_NAND_DEVICE; i++) {
1335 if (nand_dev_desc[i].ChipID == NAND_ChipID_UNKNOWN) {
1336 nand = nand_dev_desc + i;
1341 if (curr_device == -1)
1344 memset((char *)nand, 0, sizeof(struct nand_chip));
1346 nand->cache_page = -1; /* init the cache page */
1347 nand->IO_ADDR = physadr;
1348 nand->ChipID = ChipID;
1349 NanD_ScanChips(nand);
1350 nand->data_buf = malloc (nand->oobblock + nand->oobsize);
1351 if (!nand->data_buf) {
1352 puts ("Cannot allocate memory for data structures.\n");
1357 #ifdef CONFIG_MTD_NAND_ECC
1359 * Pre-calculated 256-way 1 byte column parity
1361 static const u_char nand_ecc_precalc_table[] = {
1362 0x00, 0x55, 0x56, 0x03, 0x59, 0x0c, 0x0f, 0x5a, 0x5a, 0x0f, 0x0c, 0x59, 0x03, 0x56, 0x55, 0x00,
1363 0x65, 0x30, 0x33, 0x66, 0x3c, 0x69, 0x6a, 0x3f, 0x3f, 0x6a, 0x69, 0x3c, 0x66, 0x33, 0x30, 0x65,
1364 0x66, 0x33, 0x30, 0x65, 0x3f, 0x6a, 0x69, 0x3c, 0x3c, 0x69, 0x6a, 0x3f, 0x65, 0x30, 0x33, 0x66,
1365 0x03, 0x56, 0x55, 0x00, 0x5a, 0x0f, 0x0c, 0x59, 0x59, 0x0c, 0x0f, 0x5a, 0x00, 0x55, 0x56, 0x03,
1366 0x69, 0x3c, 0x3f, 0x6a, 0x30, 0x65, 0x66, 0x33, 0x33, 0x66, 0x65, 0x30, 0x6a, 0x3f, 0x3c, 0x69,
1367 0x0c, 0x59, 0x5a, 0x0f, 0x55, 0x00, 0x03, 0x56, 0x56, 0x03, 0x00, 0x55, 0x0f, 0x5a, 0x59, 0x0c,
1368 0x0f, 0x5a, 0x59, 0x0c, 0x56, 0x03, 0x00, 0x55, 0x55, 0x00, 0x03, 0x56, 0x0c, 0x59, 0x5a, 0x0f,
1369 0x6a, 0x3f, 0x3c, 0x69, 0x33, 0x66, 0x65, 0x30, 0x30, 0x65, 0x66, 0x33, 0x69, 0x3c, 0x3f, 0x6a,
1370 0x6a, 0x3f, 0x3c, 0x69, 0x33, 0x66, 0x65, 0x30, 0x30, 0x65, 0x66, 0x33, 0x69, 0x3c, 0x3f, 0x6a,
1371 0x0f, 0x5a, 0x59, 0x0c, 0x56, 0x03, 0x00, 0x55, 0x55, 0x00, 0x03, 0x56, 0x0c, 0x59, 0x5a, 0x0f,
1372 0x0c, 0x59, 0x5a, 0x0f, 0x55, 0x00, 0x03, 0x56, 0x56, 0x03, 0x00, 0x55, 0x0f, 0x5a, 0x59, 0x0c,
1373 0x69, 0x3c, 0x3f, 0x6a, 0x30, 0x65, 0x66, 0x33, 0x33, 0x66, 0x65, 0x30, 0x6a, 0x3f, 0x3c, 0x69,
1374 0x03, 0x56, 0x55, 0x00, 0x5a, 0x0f, 0x0c, 0x59, 0x59, 0x0c, 0x0f, 0x5a, 0x00, 0x55, 0x56, 0x03,
1375 0x66, 0x33, 0x30, 0x65, 0x3f, 0x6a, 0x69, 0x3c, 0x3c, 0x69, 0x6a, 0x3f, 0x65, 0x30, 0x33, 0x66,
1376 0x65, 0x30, 0x33, 0x66, 0x3c, 0x69, 0x6a, 0x3f, 0x3f, 0x6a, 0x69, 0x3c, 0x66, 0x33, 0x30, 0x65,
1377 0x00, 0x55, 0x56, 0x03, 0x59, 0x0c, 0x0f, 0x5a, 0x5a, 0x0f, 0x0c, 0x59, 0x03, 0x56, 0x55, 0x00
1382 * Creates non-inverted ECC code from line parity
1384 static void nand_trans_result(u_char reg2, u_char reg3,
1387 u_char a, b, i, tmp1, tmp2;
1389 /* Initialize variables */
1393 /* Calculate first ECC byte */
1394 for (i = 0; i < 4; i++) {
1395 if (reg3 & a) /* LP15,13,11,9 --> ecc_code[0] */
1398 if (reg2 & a) /* LP14,12,10,8 --> ecc_code[0] */
1404 /* Calculate second ECC byte */
1406 for (i = 0; i < 4; i++) {
1407 if (reg3 & a) /* LP7,5,3,1 --> ecc_code[1] */
1410 if (reg2 & a) /* LP6,4,2,0 --> ecc_code[1] */
1416 /* Store two of the ECC bytes */
1422 * Calculate 3 byte ECC code for 256 byte block
1424 static void nand_calculate_ecc (const u_char *dat, u_char *ecc_code)
1426 u_char idx, reg1, reg2, reg3;
1429 /* Initialize variables */
1430 reg1 = reg2 = reg3 = 0;
1431 ecc_code[0] = ecc_code[1] = ecc_code[2] = 0;
1433 /* Build up column parity */
1434 for(j = 0; j < 256; j++) {
1436 /* Get CP0 - CP5 from table */
1437 idx = nand_ecc_precalc_table[dat[j]];
1438 reg1 ^= (idx & 0x3f);
1440 /* All bit XOR = 1 ? */
1443 reg2 ^= ~((u_char) j);
1447 /* Create non-inverted ECC code from line parity */
1448 nand_trans_result(reg2, reg3, ecc_code);
1450 /* Calculate final ECC code */
1451 ecc_code[0] = ~ecc_code[0];
1452 ecc_code[1] = ~ecc_code[1];
1453 ecc_code[2] = ((~reg1) << 2) | 0x03;
1457 * Detect and correct a 1 bit error for 256 byte block
1459 static int nand_correct_data (u_char *dat, u_char *read_ecc, u_char *calc_ecc)
1461 u_char a, b, c, d1, d2, d3, add, bit, i;
1463 /* Do error detection */
1464 d1 = calc_ecc[0] ^ read_ecc[0];
1465 d2 = calc_ecc[1] ^ read_ecc[1];
1466 d3 = calc_ecc[2] ^ read_ecc[2];
1468 if ((d1 | d2 | d3) == 0) {
1473 a = (d1 ^ (d1 >> 1)) & 0x55;
1474 b = (d2 ^ (d2 >> 1)) & 0x55;
1475 c = (d3 ^ (d3 >> 1)) & 0x54;
1477 /* Found and will correct single bit error in the data */
1478 if ((a == 0x55) && (b == 0x55) && (c == 0x54)) {
1482 for (i=0; i<4; i++) {
1489 for (i=0; i<4; i++) {
1498 for (i=0; i<3; i++) {
1528 /* ECC Code Error Correction */
1529 read_ecc[0] = calc_ecc[0];
1530 read_ecc[1] = calc_ecc[1];
1531 read_ecc[2] = calc_ecc[2];
1535 /* Uncorrectable Error */
1541 /* Should never happen */
1545 #endif /* (CONFIG_COMMANDS & CFG_CMD_NAND) */