3 * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com.
5 * See file CREDITS for list of people who contributed to this
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25 * I2C Functions similar to the standard memory functions.
27 * There are several parameters in many of the commands that bear further
30 * Two of the commands (imm and imw) take a byte/word/long modifier
31 * (e.g. imm.w specifies the word-length modifier). This was done to
32 * allow manipulating word-length registers. It was not done on any other
33 * commands because it was not deemed useful.
35 * {i2c_chip} is the I2C chip address (the first byte sent on the bus).
36 * Each I2C chip on the bus has a unique address. On the I2C data bus,
37 * the address is the upper seven bits and the LSB is the "read/write"
38 * bit. Note that the {i2c_chip} address specified on the command
39 * line is not shifted up: e.g. a typical EEPROM memory chip may have
40 * an I2C address of 0x50, but the data put on the bus will be 0xA0
41 * for write and 0xA1 for read. This "non shifted" address notation
42 * matches at least half of the data sheets :-/.
44 * {addr} is the address (or offset) within the chip. Small memory
45 * chips have 8 bit addresses. Large memory chips have 16 bit
46 * addresses. Other memory chips have 9, 10, or 11 bit addresses.
47 * Many non-memory chips have multiple registers and {addr} is used
48 * as the register index. Some non-memory chips have only one register
49 * and therefore don't need any {addr} parameter.
51 * The default {addr} parameter is one byte (.1) which works well for
52 * memories and registers with 8 bits of address space.
54 * You can specify the length of the {addr} field with the optional .0,
55 * .1, or .2 modifier (similar to the .b, .w, .l modifier). If you are
56 * manipulating a single register device which doesn't use an address
57 * field, use "0.0" for the address and the ".0" length field will
58 * suppress the address in the I2C data stream. This also works for
59 * successive reads using the I2C auto-incrementing memory pointer.
61 * If you are manipulating a large memory with 2-byte addresses, use
62 * the .2 address modifier, e.g. 210.2 addresses location 528 (decimal).
64 * Then there are the unfortunate memory chips that spill the most
65 * significant 1, 2, or 3 bits of address into the chip address byte.
66 * This effectively makes one chip (logically) look like 2, 4, or
67 * 8 chips. This is handled (awkwardly) by #defining
68 * CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW and using the .1 modifier on the
69 * {addr} field (since .1 is the default, it doesn't actually have to
70 * be specified). Examples: given a memory chip at I2C chip address
71 * 0x50, the following would happen...
72 * imd 50 0 10 display 16 bytes starting at 0x000
73 * On the bus: <S> A0 00 <E> <S> A1 <rd> ... <rd>
74 * imd 50 100 10 display 16 bytes starting at 0x100
75 * On the bus: <S> A2 00 <E> <S> A3 <rd> ... <rd>
76 * imd 50 210 10 display 16 bytes starting at 0x210
77 * On the bus: <S> A4 10 <E> <S> A5 <rd> ... <rd>
78 * This is awfully ugly. It would be nice if someone would think up
79 * a better way of handling this.
81 * Adapted from cmd_mem.c which is copyright Wolfgang Denk (wd@denx.de).
86 #include <environment.h>
89 #include <asm/byteorder.h>
91 /* Display values from last command.
92 * Memory modify remembered values are different from display memory.
94 static uchar i2c_dp_last_chip;
95 static uint i2c_dp_last_addr;
96 static uint i2c_dp_last_alen;
97 static uint i2c_dp_last_length = 0x10;
99 static uchar i2c_mm_last_chip;
100 static uint i2c_mm_last_addr;
101 static uint i2c_mm_last_alen;
103 /* If only one I2C bus is present, the list of devices to ignore when
104 * the probe command is issued is represented by a 1D array of addresses.
105 * When multiple buses are present, the list is an array of bus-address
106 * pairs. The following macros take care of this */
108 #if defined(CONFIG_SYS_I2C_NOPROBES)
109 #if defined(CONFIG_I2C_MULTI_BUS)
114 } i2c_no_probes[] = CONFIG_SYS_I2C_NOPROBES;
115 #define GET_BUS_NUM i2c_get_bus_num()
116 #define COMPARE_BUS(b,i) (i2c_no_probes[(i)].bus == (b))
117 #define COMPARE_ADDR(a,i) (i2c_no_probes[(i)].addr == (a))
118 #define NO_PROBE_ADDR(i) i2c_no_probes[(i)].addr
119 #else /* single bus */
120 static uchar i2c_no_probes[] = CONFIG_SYS_I2C_NOPROBES;
121 #define GET_BUS_NUM 0
122 #define COMPARE_BUS(b,i) ((b) == 0) /* Make compiler happy */
123 #define COMPARE_ADDR(a,i) (i2c_no_probes[(i)] == (a))
124 #define NO_PROBE_ADDR(i) i2c_no_probes[(i)]
125 #endif /* CONFIG_MULTI_BUS */
127 #define NUM_ELEMENTS_NOPROBE (sizeof(i2c_no_probes)/sizeof(i2c_no_probes[0]))
130 #if defined(CONFIG_I2C_MUX)
131 static I2C_MUX_DEVICE *i2c_mux_devices = NULL;
132 static int i2c_mux_busid = CONFIG_SYS_MAX_I2C_BUS;
134 DECLARE_GLOBAL_DATA_PTR;
139 mod_i2c_mem(cmd_tbl_t *cmdtp, int incrflag, int flag, int argc, char *argv[]);
143 * imd {i2c_chip} {addr}{.0, .1, .2} {len}
145 #define DISP_LINE_LEN 16
147 int do_i2c_md ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
150 uint addr, alen, length;
151 int j, nbytes, linebytes;
153 /* We use the last specified parameters, unless new ones are
156 chip = i2c_dp_last_chip;
157 addr = i2c_dp_last_addr;
158 alen = i2c_dp_last_alen;
159 length = i2c_dp_last_length;
162 printf ("Usage:\n%s\n", cmdtp->usage);
166 if ((flag & CMD_FLAG_REPEAT) == 0) {
168 * New command specified.
175 chip = simple_strtoul(argv[1], NULL, 16);
178 * I2C data address within the chip. This can be 1 or
179 * 2 bytes long. Some day it might be 3 bytes long :-).
181 addr = simple_strtoul(argv[2], NULL, 16);
183 for (j = 0; j < 8; j++) {
184 if (argv[2][j] == '.') {
185 alen = argv[2][j+1] - '0';
187 printf ("Usage:\n%s\n", cmdtp->usage);
191 } else if (argv[2][j] == '\0')
196 * If another parameter, it is the length to display.
197 * Length is the number of objects, not number of bytes.
200 length = simple_strtoul(argv[3], NULL, 16);
206 * We buffer all read data, so we can make sure data is read only
211 unsigned char linebuf[DISP_LINE_LEN];
214 linebytes = (nbytes > DISP_LINE_LEN) ? DISP_LINE_LEN : nbytes;
216 if (i2c_read(chip, addr, alen, linebuf, linebytes) != 0)
217 puts ("Error reading the chip.\n");
219 printf("%04x:", addr);
221 for (j=0; j<linebytes; j++) {
222 printf(" %02x", *cp++);
227 for (j=0; j<linebytes; j++) {
228 if ((*cp < 0x20) || (*cp > 0x7e))
237 } while (nbytes > 0);
239 i2c_dp_last_chip = chip;
240 i2c_dp_last_addr = addr;
241 i2c_dp_last_alen = alen;
242 i2c_dp_last_length = length;
247 int do_i2c_mm ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
249 return mod_i2c_mem (cmdtp, 1, flag, argc, argv);
253 int do_i2c_nm ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
255 return mod_i2c_mem (cmdtp, 0, flag, argc, argv);
258 /* Write (fill) memory
261 * imw {i2c_chip} {addr}{.0, .1, .2} {data} [{count}]
263 int do_i2c_mw ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
272 if ((argc < 4) || (argc > 5)) {
273 printf ("Usage:\n%s\n", cmdtp->usage);
278 * Chip is always specified.
280 chip = simple_strtoul(argv[1], NULL, 16);
283 * Address is always specified.
285 addr = simple_strtoul(argv[2], NULL, 16);
287 for (j = 0; j < 8; j++) {
288 if (argv[2][j] == '.') {
289 alen = argv[2][j+1] - '0';
291 printf ("Usage:\n%s\n", cmdtp->usage);
295 } else if (argv[2][j] == '\0')
300 * Value to write is always specified.
302 byte = simple_strtoul(argv[3], NULL, 16);
308 count = simple_strtoul(argv[4], NULL, 16);
312 while (count-- > 0) {
313 if (i2c_write(chip, addr++, alen, &byte, 1) != 0)
314 puts ("Error writing the chip.\n");
316 * Wait for the write to complete. The write can take
317 * up to 10mSec (we allow a little more time).
319 * On some chips, while the write is in progress, the
320 * chip doesn't respond. This apparently isn't a
321 * universal feature so we don't take advantage of it.
324 * No write delay with FRAM devices.
326 #if !defined(CONFIG_SYS_I2C_FRAM)
331 for (timeout = 0; timeout < 10; timeout++) {
333 if (i2c_probe(chip) == 0)
343 /* Calculate a CRC on memory
346 * icrc32 {i2c_chip} {addr}{.0, .1, .2} {count}
348 int do_i2c_crc (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
360 printf ("Usage:\n%s\n", cmdtp->usage);
365 * Chip is always specified.
367 chip = simple_strtoul(argv[1], NULL, 16);
370 * Address is always specified.
372 addr = simple_strtoul(argv[2], NULL, 16);
374 for (j = 0; j < 8; j++) {
375 if (argv[2][j] == '.') {
376 alen = argv[2][j+1] - '0';
378 printf ("Usage:\n%s\n", cmdtp->usage);
382 } else if (argv[2][j] == '\0')
387 * Count is always specified
389 count = simple_strtoul(argv[3], NULL, 16);
391 printf ("CRC32 for %08lx ... %08lx ==> ", addr, addr + count - 1);
393 * CRC a byte at a time. This is going to be slooow, but hey, the
394 * memories are small and slow too so hopefully nobody notices.
398 while (count-- > 0) {
399 if (i2c_read(chip, addr, alen, &byte, 1) != 0)
401 crc = crc32 (crc, &byte, 1);
405 puts ("Error reading the chip,\n");
407 printf ("%08lx\n", crc);
416 * imm{.b, .w, .l} {i2c_chip} {addr}{.0, .1, .2}
417 * inm{.b, .w, .l} {i2c_chip} {addr}{.0, .1, .2}
421 mod_i2c_mem(cmd_tbl_t *cmdtp, int incrflag, int flag, int argc, char *argv[])
430 extern char console_buffer[];
433 printf ("Usage:\n%s\n", cmdtp->usage);
437 #ifdef CONFIG_BOOT_RETRY_TIME
438 reset_cmd_timeout(); /* got a good command to get here */
441 * We use the last specified parameters, unless new ones are
444 chip = i2c_mm_last_chip;
445 addr = i2c_mm_last_addr;
446 alen = i2c_mm_last_alen;
448 if ((flag & CMD_FLAG_REPEAT) == 0) {
450 * New command specified. Check for a size specification.
451 * Defaults to byte if no or incorrect specification.
453 size = cmd_get_data_size(argv[0], 1);
456 * Chip is always specified.
458 chip = simple_strtoul(argv[1], NULL, 16);
461 * Address is always specified.
463 addr = simple_strtoul(argv[2], NULL, 16);
465 for (j = 0; j < 8; j++) {
466 if (argv[2][j] == '.') {
467 alen = argv[2][j+1] - '0';
469 printf ("Usage:\n%s\n", cmdtp->usage);
473 } else if (argv[2][j] == '\0')
479 * Print the address, followed by value. Then accept input for
480 * the next value. A non-converted value exits.
483 printf("%08lx:", addr);
484 if (i2c_read(chip, addr, alen, (uchar *)&data, size) != 0)
485 puts ("\nError reading the chip,\n");
487 data = cpu_to_be32(data);
489 printf(" %02lx", (data >> 24) & 0x000000FF);
491 printf(" %04lx", (data >> 16) & 0x0000FFFF);
493 printf(" %08lx", data);
496 nbytes = readline (" ? ");
499 * <CR> pressed as only input, don't modify current
500 * location and move to next.
505 #ifdef CONFIG_BOOT_RETRY_TIME
506 reset_cmd_timeout(); /* good enough to not time out */
509 #ifdef CONFIG_BOOT_RETRY_TIME
510 else if (nbytes == -2)
511 break; /* timed out, exit the command */
516 data = simple_strtoul(console_buffer, &endp, 16);
521 data = be32_to_cpu(data);
522 nbytes = endp - console_buffer;
524 #ifdef CONFIG_BOOT_RETRY_TIME
526 * good enough to not time out
530 if (i2c_write(chip, addr, alen, (uchar *)&data, size) != 0)
531 puts ("Error writing the chip.\n");
532 #ifdef CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS
533 udelay(CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS * 1000);
541 i2c_mm_last_chip = chip;
542 i2c_mm_last_addr = addr;
543 i2c_mm_last_alen = alen;
550 * iprobe {addr}{.0, .1, .2}
552 int do_i2c_probe (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
555 #if defined(CONFIG_SYS_I2C_NOPROBES)
557 uchar bus = GET_BUS_NUM;
558 #endif /* NOPROBES */
560 puts ("Valid chip addresses:");
561 for (j = 0; j < 128; j++) {
562 #if defined(CONFIG_SYS_I2C_NOPROBES)
564 for (k=0; k < NUM_ELEMENTS_NOPROBE; k++) {
565 if (COMPARE_BUS(bus, k) && COMPARE_ADDR(j, k)) {
573 if (i2c_probe(j) == 0)
578 #if defined(CONFIG_SYS_I2C_NOPROBES)
579 puts ("Excluded chip addresses:");
580 for (k=0; k < NUM_ELEMENTS_NOPROBE; k++) {
581 if (COMPARE_BUS(bus,k))
582 printf(" %02X", NO_PROBE_ADDR(k));
593 * iloop {i2c_chip} {addr}{.0, .1, .2} [{length}] [{delay}]
594 * {length} - Number of bytes to read
595 * {delay} - A DECIMAL number and defaults to 1000 uSec
597 int do_i2c_loop(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
608 printf ("Usage:\n%s\n", cmdtp->usage);
613 * Chip is always specified.
615 chip = simple_strtoul(argv[1], NULL, 16);
618 * Address is always specified.
620 addr = simple_strtoul(argv[2], NULL, 16);
622 for (j = 0; j < 8; j++) {
623 if (argv[2][j] == '.') {
624 alen = argv[2][j+1] - '0';
626 printf ("Usage:\n%s\n", cmdtp->usage);
630 } else if (argv[2][j] == '\0')
635 * Length is the number of objects, not number of bytes.
638 length = simple_strtoul(argv[3], NULL, 16);
639 if (length > sizeof(bytes))
640 length = sizeof(bytes);
643 * The delay time (uSec) is optional.
647 delay = simple_strtoul(argv[4], NULL, 10);
652 if (i2c_read(chip, addr, alen, bytes, length) != 0)
653 puts ("Error reading the chip.\n");
663 * The SDRAM command is separately configured because many
664 * (most?) embedded boards don't use SDRAM DIMMs.
666 #if defined(CONFIG_CMD_SDRAM)
667 static void print_ddr2_tcyc (u_char const b)
669 printf ("%d.", (b >> 4) & 0x0F);
681 printf ("%d ns\n", b & 0x0F);
701 static void decode_bits (u_char const b, char const *str[], int const do_once)
705 for (mask = 0x80; mask != 0x00; mask >>= 1, ++str) {
718 int do_sdram (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
720 enum { unknown, EDO, SDRAM, DDR2 } type;
727 static const char *decode_CAS_DDR2[] = {
728 " TBD", " 6", " 5", " 4", " 3", " 2", " TBD", " TBD"
731 static const char *decode_CAS_default[] = {
732 " TBD", " 7", " 6", " 5", " 4", " 3", " 2", " 1"
735 static const char *decode_CS_WE_default[] = {
736 " TBD", " 6", " 5", " 4", " 3", " 2", " 1", " 0"
739 static const char *decode_byte21_default[] = {
741 " Redundant row address\n",
742 " Differential clock input\n",
743 " Registerd DQMB inputs\n",
744 " Buffered DQMB inputs\n",
746 " Registered address/control lines\n",
747 " Buffered address/control lines\n"
750 static const char *decode_byte22_DDR2[] = {
756 " Supports partial array self refresh\n",
757 " Supports 50 ohm ODT\n",
758 " Supports weak driver\n"
761 static const char *decode_row_density_DDR2[] = {
762 "512 MiB", "256 MiB", "128 MiB", "16 GiB",
763 "8 GiB", "4 GiB", "2 GiB", "1 GiB"
766 static const char *decode_row_density_default[] = {
767 "512 MiB", "256 MiB", "128 MiB", "64 MiB",
768 "32 MiB", "16 MiB", "8 MiB", "4 MiB"
772 printf ("Usage:\n%s\n", cmdtp->usage);
776 * Chip is always specified.
778 chip = simple_strtoul (argv[1], NULL, 16);
780 if (i2c_read (chip, 0, 1, data, sizeof (data)) != 0) {
781 puts ("No SDRAM Serial Presence Detect found.\n");
786 for (j = 0; j < 63; j++) {
789 if (cksum != data[63]) {
790 printf ("WARNING: Configuration data checksum failure:\n"
791 " is 0x%02x, calculated 0x%02x\n", data[63], cksum);
793 printf ("SPD data revision %d.%d\n",
794 (data[62] >> 4) & 0x0F, data[62] & 0x0F);
795 printf ("Bytes used 0x%02X\n", data[0]);
796 printf ("Serial memory size 0x%02X\n", 1 << data[1]);
798 puts ("Memory type ");
818 puts ("Row address bits ");
819 if ((data[3] & 0x00F0) == 0)
820 printf ("%d\n", data[3] & 0x0F);
822 printf ("%d/%d\n", data[3] & 0x0F, (data[3] >> 4) & 0x0F);
824 puts ("Column address bits ");
825 if ((data[4] & 0x00F0) == 0)
826 printf ("%d\n", data[4] & 0x0F);
828 printf ("%d/%d\n", data[4] & 0x0F, (data[4] >> 4) & 0x0F);
832 printf ("Number of ranks %d\n",
833 (data[5] & 0x07) + 1);
836 printf ("Module rows %d\n", data[5]);
842 printf ("Module data width %d bits\n", data[6]);
845 printf ("Module data width %d bits\n",
846 (data[7] << 8) | data[6]);
850 puts ("Interface signal levels ");
852 case 0: puts ("TTL 5.0 V\n"); break;
853 case 1: puts ("LVTTL\n"); break;
854 case 2: puts ("HSTL 1.5 V\n"); break;
855 case 3: puts ("SSTL 3.3 V\n"); break;
856 case 4: puts ("SSTL 2.5 V\n"); break;
857 case 5: puts ("SSTL 1.8 V\n"); break;
858 default: puts ("unknown\n"); break;
863 printf ("SDRAM cycle time ");
864 print_ddr2_tcyc (data[9]);
867 printf ("SDRAM cycle time %d.%d ns\n",
868 (data[9] >> 4) & 0x0F, data[9] & 0x0F);
874 printf ("SDRAM access time 0.%d%d ns\n",
875 (data[10] >> 4) & 0x0F, data[10] & 0x0F);
878 printf ("SDRAM access time %d.%d ns\n",
879 (data[10] >> 4) & 0x0F, data[10] & 0x0F);
883 puts ("EDC configuration ");
885 case 0: puts ("None\n"); break;
886 case 1: puts ("Parity\n"); break;
887 case 2: puts ("ECC\n"); break;
888 default: puts ("unknown\n"); break;
891 if ((data[12] & 0x80) == 0)
892 puts ("No self refresh, rate ");
894 puts ("Self refresh, rate ");
896 switch(data[12] & 0x7F) {
897 case 0: puts ("15.625 us\n"); break;
898 case 1: puts ("3.9 us\n"); break;
899 case 2: puts ("7.8 us\n"); break;
900 case 3: puts ("31.3 us\n"); break;
901 case 4: puts ("62.5 us\n"); break;
902 case 5: puts ("125 us\n"); break;
903 default: puts ("unknown\n"); break;
908 printf ("SDRAM width (primary) %d\n", data[13]);
911 printf ("SDRAM width (primary) %d\n", data[13] & 0x7F);
912 if ((data[13] & 0x80) != 0) {
913 printf (" (second bank) %d\n",
914 2 * (data[13] & 0x7F));
922 printf ("EDC width %d\n", data[14]);
926 printf ("EDC width %d\n",
929 if ((data[14] & 0x80) != 0) {
930 printf (" (second bank) %d\n",
931 2 * (data[14] & 0x7F));
938 printf ("Min clock delay, back-to-back random column addresses "
942 puts ("Burst length(s) ");
943 if (data[16] & 0x80) puts (" Page");
944 if (data[16] & 0x08) puts (" 8");
945 if (data[16] & 0x04) puts (" 4");
946 if (data[16] & 0x02) puts (" 2");
947 if (data[16] & 0x01) puts (" 1");
949 printf ("Number of banks %d\n", data[17]);
953 puts ("CAS latency(s) ");
954 decode_bits (data[18], decode_CAS_DDR2, 0);
958 puts ("CAS latency(s) ");
959 decode_bits (data[18], decode_CAS_default, 0);
965 puts ("CS latency(s) ");
966 decode_bits (data[19], decode_CS_WE_default, 0);
971 puts ("WE latency(s) ");
972 decode_bits (data[20], decode_CS_WE_default, 0);
978 puts ("Module attributes:\n");
980 puts (" TBD (bit 7)\n");
982 puts (" Analysis probe installed\n");
984 puts (" TBD (bit 5)\n");
986 puts (" FET switch external enable\n");
987 printf (" %d PLLs on DIMM\n", (data[21] >> 2) & 0x03);
988 if (data[20] & 0x11) {
989 printf (" %d active registers on DIMM\n",
990 (data[21] & 0x03) + 1);
994 puts ("Module attributes:\n");
998 decode_bits (data[21], decode_byte21_default, 0);
1004 decode_bits (data[22], decode_byte22_DDR2, 0);
1007 puts ("Device attributes:\n");
1008 if (data[22] & 0x80) puts (" TBD (bit 7)\n");
1009 if (data[22] & 0x40) puts (" TBD (bit 6)\n");
1010 if (data[22] & 0x20) puts (" Upper Vcc tolerance 5%\n");
1011 else puts (" Upper Vcc tolerance 10%\n");
1012 if (data[22] & 0x10) puts (" Lower Vcc tolerance 5%\n");
1013 else puts (" Lower Vcc tolerance 10%\n");
1014 if (data[22] & 0x08) puts (" Supports write1/read burst\n");
1015 if (data[22] & 0x04) puts (" Supports precharge all\n");
1016 if (data[22] & 0x02) puts (" Supports auto precharge\n");
1017 if (data[22] & 0x01) puts (" Supports early RAS# precharge\n");
1023 printf ("SDRAM cycle time (2nd highest CAS latency) ");
1024 print_ddr2_tcyc (data[23]);
1027 printf ("SDRAM cycle time (2nd highest CAS latency) %d."
1028 "%d ns\n", (data[23] >> 4) & 0x0F, data[23] & 0x0F);
1034 printf ("SDRAM access from clock (2nd highest CAS latency) 0."
1035 "%d%d ns\n", (data[24] >> 4) & 0x0F, data[24] & 0x0F);
1038 printf ("SDRAM access from clock (2nd highest CAS latency) %d."
1039 "%d ns\n", (data[24] >> 4) & 0x0F, data[24] & 0x0F);
1045 printf ("SDRAM cycle time (3rd highest CAS latency) ");
1046 print_ddr2_tcyc (data[25]);
1049 printf ("SDRAM cycle time (3rd highest CAS latency) %d."
1050 "%d ns\n", (data[25] >> 4) & 0x0F, data[25] & 0x0F);
1056 printf ("SDRAM access from clock (3rd highest CAS latency) 0."
1057 "%d%d ns\n", (data[26] >> 4) & 0x0F, data[26] & 0x0F);
1060 printf ("SDRAM access from clock (3rd highest CAS latency) %d."
1061 "%d ns\n", (data[26] >> 4) & 0x0F, data[26] & 0x0F);
1067 printf ("Minimum row precharge %d.%02d ns\n",
1068 (data[27] >> 2) & 0x3F, 25 * (data[27] & 0x03));
1071 printf ("Minimum row precharge %d ns\n", data[27]);
1077 printf ("Row active to row active min %d.%02d ns\n",
1078 (data[28] >> 2) & 0x3F, 25 * (data[28] & 0x03));
1081 printf ("Row active to row active min %d ns\n", data[28]);
1087 printf ("RAS to CAS delay min %d.%02d ns\n",
1088 (data[29] >> 2) & 0x3F, 25 * (data[29] & 0x03));
1091 printf ("RAS to CAS delay min %d ns\n", data[29]);
1095 printf ("Minimum RAS pulse width %d ns\n", data[30]);
1099 puts ("Density of each row ");
1100 decode_bits (data[31], decode_row_density_DDR2, 1);
1104 puts ("Density of each row ");
1105 decode_bits (data[31], decode_row_density_default, 1);
1112 puts ("Command and Address setup ");
1113 if (data[32] >= 0xA0) {
1114 printf ("1.%d%d ns\n",
1115 ((data[32] >> 4) & 0x0F) - 10, data[32] & 0x0F);
1117 printf ("0.%d%d ns\n",
1118 ((data[32] >> 4) & 0x0F), data[32] & 0x0F);
1122 printf ("Command and Address setup %c%d.%d ns\n",
1123 (data[32] & 0x80) ? '-' : '+',
1124 (data[32] >> 4) & 0x07, data[32] & 0x0F);
1130 puts ("Command and Address hold ");
1131 if (data[33] >= 0xA0) {
1132 printf ("1.%d%d ns\n",
1133 ((data[33] >> 4) & 0x0F) - 10, data[33] & 0x0F);
1135 printf ("0.%d%d ns\n",
1136 ((data[33] >> 4) & 0x0F), data[33] & 0x0F);
1140 printf ("Command and Address hold %c%d.%d ns\n",
1141 (data[33] & 0x80) ? '-' : '+',
1142 (data[33] >> 4) & 0x07, data[33] & 0x0F);
1148 printf ("Data signal input setup 0.%d%d ns\n",
1149 (data[34] >> 4) & 0x0F, data[34] & 0x0F);
1152 printf ("Data signal input setup %c%d.%d ns\n",
1153 (data[34] & 0x80) ? '-' : '+',
1154 (data[34] >> 4) & 0x07, data[34] & 0x0F);
1160 printf ("Data signal input hold 0.%d%d ns\n",
1161 (data[35] >> 4) & 0x0F, data[35] & 0x0F);
1164 printf ("Data signal input hold %c%d.%d ns\n",
1165 (data[35] & 0x80) ? '-' : '+',
1166 (data[35] >> 4) & 0x07, data[35] & 0x0F);
1170 puts ("Manufacturer's JEDEC ID ");
1171 for (j = 64; j <= 71; j++)
1172 printf ("%02X ", data[j]);
1174 printf ("Manufacturing Location %02X\n", data[72]);
1175 puts ("Manufacturer's Part Number ");
1176 for (j = 73; j <= 90; j++)
1177 printf ("%02X ", data[j]);
1179 printf ("Revision Code %02X %02X\n", data[91], data[92]);
1180 printf ("Manufacturing Date %02X %02X\n", data[93], data[94]);
1181 puts ("Assembly Serial Number ");
1182 for (j = 95; j <= 98; j++)
1183 printf ("%02X ", data[j]);
1187 printf ("Speed rating PC%d\n",
1188 data[126] == 0x66 ? 66 : data[126]);
1194 #if defined(CONFIG_I2C_CMD_TREE)
1195 int do_i2c_reset(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
1197 i2c_init (CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
1201 #if defined(CONFIG_I2C_MUX)
1202 int do_i2c_add_bus(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
1207 /* show all busses */
1209 I2C_MUX_DEVICE *device = i2c_mux_devices;
1211 printf ("Busses reached over muxes:\n");
1212 while (device != NULL) {
1213 printf ("Bus ID: %x\n", device->busid);
1214 printf (" reached over Mux(es):\n");
1216 while (mux != NULL) {
1217 printf (" %s@%x ch: %x\n", mux->name, mux->chip, mux->channel);
1220 device = device->next;
1223 I2C_MUX_DEVICE *dev;
1225 dev = i2c_mux_ident_muxstring ((uchar *)argv[1]);
1230 #endif /* CONFIG_I2C_MUX */
1232 #if defined(CONFIG_I2C_MULTI_BUS)
1233 int do_i2c_bus_num(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
1238 /* querying current setting */
1239 printf("Current bus is %d\n", i2c_get_bus_num());
1241 bus_idx = simple_strtoul(argv[1], NULL, 10);
1242 printf("Setting bus to %d\n", bus_idx);
1243 ret = i2c_set_bus_num(bus_idx);
1245 printf("Failure changing bus number (%d)\n", ret);
1249 #endif /* CONFIG_I2C_MULTI_BUS */
1251 int do_i2c_bus_speed(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
1256 /* querying current speed */
1257 printf("Current bus speed=%d\n", i2c_get_bus_speed());
1259 speed = simple_strtoul(argv[1], NULL, 10);
1260 printf("Setting bus speed to %d Hz\n", speed);
1261 ret = i2c_set_bus_speed(speed);
1263 printf("Failure changing bus speed (%d)\n", ret);
1268 int do_i2c(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
1270 #if defined(CONFIG_I2C_MUX)
1271 if (!strncmp(argv[1], "bu", 2))
1272 return do_i2c_add_bus(cmdtp, flag, --argc, ++argv);
1273 #endif /* CONFIG_I2C_MUX */
1274 if (!strncmp(argv[1], "sp", 2))
1275 return do_i2c_bus_speed(cmdtp, flag, --argc, ++argv);
1276 #if defined(CONFIG_I2C_MULTI_BUS)
1277 if (!strncmp(argv[1], "de", 2))
1278 return do_i2c_bus_num(cmdtp, flag, --argc, ++argv);
1279 #endif /* CONFIG_I2C_MULTI_BUS */
1280 if (!strncmp(argv[1], "md", 2))
1281 return do_i2c_md(cmdtp, flag, --argc, ++argv);
1282 if (!strncmp(argv[1], "mm", 2))
1283 return do_i2c_mm(cmdtp, flag, --argc, ++argv);
1284 if (!strncmp(argv[1], "mw", 2))
1285 return do_i2c_mw(cmdtp, flag, --argc, ++argv);
1286 if (!strncmp(argv[1], "nm", 2))
1287 return do_i2c_nm(cmdtp, flag, --argc, ++argv);
1288 if (!strncmp(argv[1], "cr", 2))
1289 return do_i2c_crc(cmdtp, flag, --argc, ++argv);
1290 if (!strncmp(argv[1], "pr", 2))
1291 return do_i2c_probe(cmdtp, flag, --argc, ++argv);
1292 if (!strncmp(argv[1], "re", 2))
1293 return do_i2c_reset(cmdtp, flag, --argc, ++argv);
1294 if (!strncmp(argv[1], "lo", 2))
1295 return do_i2c_loop(cmdtp, flag, --argc, ++argv);
1296 #if defined(CONFIG_CMD_SDRAM)
1297 if (!strncmp(argv[1], "sd", 2))
1298 return do_sdram(cmdtp, flag, --argc, ++argv);
1301 printf ("Usage:\n%s\n", cmdtp->usage);
1304 #endif /* CONFIG_I2C_CMD_TREE */
1306 /***************************************************/
1308 #if defined(CONFIG_I2C_CMD_TREE)
1311 "i2c - I2C sub-system\n",
1312 #if defined(CONFIG_I2C_MUX)
1313 "bus [muxtype:muxaddr:muxchannel] - add a new bus reached over muxes.\n"
1314 #endif /* CONFIG_I2C_MUX */
1315 "speed [speed] - show or set I2C bus speed\n"
1316 #if defined(CONFIG_I2C_MULTI_BUS)
1317 "i2c dev [dev] - show or set current I2C bus\n"
1318 #endif /* CONFIG_I2C_MULTI_BUS */
1319 "i2c md chip address[.0, .1, .2] [# of objects] - read from I2C device\n"
1320 "i2c mm chip address[.0, .1, .2] - write to I2C device (auto-incrementing)\n"
1321 "i2c mw chip address[.0, .1, .2] value [count] - write to I2C device (fill)\n"
1322 "i2c nm chip address[.0, .1, .2] - write to I2C device (constant address)\n"
1323 "i2c crc32 chip address[.0, .1, .2] count - compute CRC32 checksum\n"
1324 "i2c probe - show devices on the I2C bus\n"
1325 "i2c reset - re-init the I2C Controller\n"
1326 "i2c loop chip address[.0, .1, .2] [# of objects] - looping read of device\n"
1327 #if defined(CONFIG_CMD_SDRAM)
1328 "i2c sdram chip - print SDRAM configuration information\n"
1331 #endif /* CONFIG_I2C_CMD_TREE */
1333 imd, 4, 1, do_i2c_md, \
1334 "imd - i2c memory display\n", \
1335 "chip address[.0, .1, .2] [# of objects]\n - i2c memory display\n" \
1339 imm, 3, 1, do_i2c_mm,
1340 "imm - i2c memory modify (auto-incrementing)\n",
1341 "chip address[.0, .1, .2]\n"
1342 " - memory modify, auto increment address\n"
1345 inm, 3, 1, do_i2c_nm,
1346 "inm - memory modify (constant address)\n",
1347 "chip address[.0, .1, .2]\n - memory modify, read and keep address\n"
1351 imw, 5, 1, do_i2c_mw,
1352 "imw - memory write (fill)\n",
1353 "chip address[.0, .1, .2] value [count]\n - memory write (fill)\n"
1357 icrc32, 5, 1, do_i2c_crc,
1358 "icrc32 - checksum calculation\n",
1359 "chip address[.0, .1, .2] count\n - compute CRC32 checksum\n"
1363 iprobe, 1, 1, do_i2c_probe,
1364 "iprobe - probe to discover valid I2C chip addresses\n",
1365 "\n -discover valid I2C chip addresses\n"
1369 * Require full name for "iloop" because it is an infinite loop!
1372 iloop, 5, 1, do_i2c_loop,
1373 "iloop - infinite loop on address range\n",
1374 "chip address[.0, .1, .2] [# of objects]\n"
1375 " - loop, reading a set of addresses\n"
1378 #if defined(CONFIG_CMD_SDRAM)
1380 isdram, 2, 1, do_sdram,
1381 "isdram - print SDRAM configuration information\n",
1382 "chip\n - print SDRAM configuration information\n"
1383 " (valid chip values 50..57)\n"
1387 #if defined(CONFIG_I2C_MUX)
1389 int i2c_mux_add_device(I2C_MUX_DEVICE *dev)
1391 I2C_MUX_DEVICE *devtmp = i2c_mux_devices;
1393 if (i2c_mux_devices == NULL) {
1394 i2c_mux_devices = dev;
1397 while (devtmp->next != NULL)
1398 devtmp = devtmp->next;
1404 I2C_MUX_DEVICE *i2c_mux_search_device(int id)
1406 I2C_MUX_DEVICE *device = i2c_mux_devices;
1408 while (device != NULL) {
1409 if (device->busid == id)
1411 device = device->next;
1416 /* searches in the buf from *pos the next ':'.
1418 * 0 if found (with *pos = where)
1419 * < 0 if an error occured
1420 * > 0 if the end of buf is reached
1422 static int i2c_mux_search_next (int *pos, uchar *buf, int len)
1424 while ((buf[*pos] != ':') && (*pos < len)) {
1429 if (buf[*pos] != ':')
1434 static int i2c_mux_get_busid (void)
1436 int tmp = i2c_mux_busid;
1442 /* Analyses a Muxstring and sends immediately the
1443 Commands to the Muxes. Runs from Flash.
1445 int i2c_mux_ident_muxstring_f (uchar *buf)
1450 int len = strlen((char *)buf);
1458 ret = i2c_mux_search_next(&pos, buf, len);
1461 /* search address */
1464 ret = i2c_mux_search_next(&pos, buf, len);
1468 chip = simple_strtoul((char *)&buf[oldpos], NULL, 16);
1470 /* search channel */
1473 ret = i2c_mux_search_next(&pos, buf, len);
1477 if (buf[pos] != 0) {
1481 channel = simple_strtoul((char *)&buf[oldpos], NULL, 16);
1484 if (i2c_write(chip, 0, 0, &channel, 1) != 0) {
1485 printf ("Error setting Mux: chip:%x channel: \
1486 %x\n", chip, channel);
1497 /* Analyses a Muxstring and if this String is correct
1498 * adds a new I2C Bus.
1500 I2C_MUX_DEVICE *i2c_mux_ident_muxstring (uchar *buf)
1502 I2C_MUX_DEVICE *device;
1507 int len = strlen((char *)buf);
1510 device = (I2C_MUX_DEVICE *)malloc (sizeof(I2C_MUX_DEVICE));
1512 device->busid = i2c_mux_get_busid ();
1513 device->next = NULL;
1515 mux = (I2C_MUX *)malloc (sizeof(I2C_MUX));
1517 /* search name of mux */
1519 ret = i2c_mux_search_next(&pos, buf, len);
1521 printf ("%s no name.\n", __FUNCTION__);
1522 mux->name = (char *)malloc (pos - oldpos + 1);
1523 memcpy (mux->name, &buf[oldpos], pos - oldpos);
1524 mux->name[pos - oldpos] = 0;
1525 /* search address */
1528 ret = i2c_mux_search_next(&pos, buf, len);
1530 printf ("%s no mux address.\n", __FUNCTION__);
1532 mux->chip = simple_strtoul((char *)&buf[oldpos], NULL, 16);
1534 /* search channel */
1537 ret = i2c_mux_search_next(&pos, buf, len);
1539 printf ("%s no mux channel.\n", __FUNCTION__);
1541 if (buf[pos] != 0) {
1545 mux->channel = simple_strtoul((char *)&buf[oldpos], NULL, 16);
1548 if (device->mux == NULL)
1551 I2C_MUX *muxtmp = device->mux;
1552 while (muxtmp->next != NULL) {
1553 muxtmp = muxtmp->next;
1562 i2c_mux_add_device (device);
1569 int i2x_mux_select_mux(int bus)
1571 I2C_MUX_DEVICE *dev;
1574 if ((gd->flags & GD_FLG_RELOC) != GD_FLG_RELOC) {
1575 /* select Default Mux Bus */
1576 #if defined(CONFIG_SYS_I2C_IVM_BUS)
1577 i2c_mux_ident_muxstring_f ((uchar *)CONFIG_SYS_I2C_IVM_BUS);
1581 buf = (unsigned char *) getenv("EEprom_ivm");
1583 i2c_mux_ident_muxstring_f (buf);
1588 dev = i2c_mux_search_device(bus);
1593 while (mux != NULL) {
1594 if (i2c_write(mux->chip, 0, 0, &mux->channel, 1) != 0) {
1595 printf ("Error setting Mux: chip:%x channel: \
1596 %x\n", mux->chip, mux->channel);
1603 #endif /* CONFIG_I2C_MUX */