1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (c) 2011 The Chromium OS Authors.
4 * (C) Copyright 2002-2006
5 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
8 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
9 * Marius Groeger <mgroeger@sysgo.de>
16 #include <environment.h>
26 #include <status_led.h>
32 #ifdef CONFIG_MACH_TYPE
33 #include <asm/mach-types.h>
35 #if defined(CONFIG_MP) && defined(CONFIG_PPC)
39 #include <asm/sections.h>
41 #include <linux/errno.h>
44 * Pointer to initial global data area
46 * Here we initialize it if needed.
48 #ifdef XTRN_DECLARE_GLOBAL_DATA_PTR
49 #undef XTRN_DECLARE_GLOBAL_DATA_PTR
50 #define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */
51 DECLARE_GLOBAL_DATA_PTR = (gd_t *)(CONFIG_SYS_INIT_GD_ADDR);
53 DECLARE_GLOBAL_DATA_PTR;
57 * TODO(sjg@chromium.org): IMO this code should be
58 * refactored to a single function, something like:
60 * void led_set_state(enum led_colour_t colour, int on);
62 /************************************************************************
63 * Coloured LED functionality
64 ************************************************************************
65 * May be supplied by boards if desired
67 __weak void coloured_LED_init(void) {}
68 __weak void red_led_on(void) {}
69 __weak void red_led_off(void) {}
70 __weak void green_led_on(void) {}
71 __weak void green_led_off(void) {}
72 __weak void yellow_led_on(void) {}
73 __weak void yellow_led_off(void) {}
74 __weak void blue_led_on(void) {}
75 __weak void blue_led_off(void) {}
78 * Why is gd allocated a register? Prior to reloc it might be better to
79 * just pass it around to each function in this file?
81 * After reloc one could argue that it is hardly used and doesn't need
82 * to be in a register. Or if it is it should perhaps hold pointers to all
83 * global data for all modules, so that post-reloc we can avoid the massive
84 * literal pool we get on ARM. Or perhaps just encourage each module to use
88 #if defined(CONFIG_WATCHDOG) || defined(CONFIG_HW_WATCHDOG)
89 static int init_func_watchdog_init(void)
91 # if defined(CONFIG_HW_WATCHDOG) && \
92 (defined(CONFIG_M68K) || defined(CONFIG_MICROBLAZE) || \
93 defined(CONFIG_SH) || \
94 defined(CONFIG_DESIGNWARE_WATCHDOG) || \
95 defined(CONFIG_IMX_WATCHDOG))
97 puts(" Watchdog enabled\n");
104 int init_func_watchdog_reset(void)
110 #endif /* CONFIG_WATCHDOG */
112 __weak void board_add_ram_info(int use_default)
114 /* please define platform specific board_add_ram_info() */
117 static int init_baud_rate(void)
119 gd->baudrate = env_get_ulong("baudrate", 10, CONFIG_BAUDRATE);
123 static int display_text_info(void)
125 #if !defined(CONFIG_SANDBOX) && !defined(CONFIG_EFI_APP)
126 ulong bss_start, bss_end, text_base;
128 bss_start = (ulong)&__bss_start;
129 bss_end = (ulong)&__bss_end;
131 #ifdef CONFIG_SYS_TEXT_BASE
132 text_base = CONFIG_SYS_TEXT_BASE;
134 text_base = CONFIG_SYS_MONITOR_BASE;
137 debug("U-Boot code: %08lX -> %08lX BSS: -> %08lX\n",
138 text_base, bss_start, bss_end);
144 #ifdef CONFIG_SYSRESET
145 static int print_resetinfo(void)
151 ret = uclass_first_device_err(UCLASS_SYSRESET, &dev);
153 debug("%s: No sysreset device found (error: %d)\n",
155 /* Not all boards have sysreset drivers available during early
156 * boot, so don't fail if one can't be found.
161 if (!sysreset_get_status(dev, status, sizeof(status)))
162 printf("%s", status);
168 #if defined(CONFIG_DISPLAY_CPUINFO) && CONFIG_IS_ENABLED(CPU)
169 static int print_cpuinfo(void)
175 ret = uclass_first_device_err(UCLASS_CPU, &dev);
177 debug("%s: Could not get CPU device (err = %d)\n",
182 ret = cpu_get_desc(dev, desc, sizeof(desc));
184 debug("%s: Could not get CPU description (err = %d)\n",
189 printf("CPU: %s\n", desc);
195 static int announce_dram_init(void)
201 static int show_dram_config(void)
203 unsigned long long size;
205 #ifdef CONFIG_NR_DRAM_BANKS
208 debug("\nRAM Configuration:\n");
209 for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
210 size += gd->bd->bi_dram[i].size;
211 debug("Bank #%d: %llx ", i,
212 (unsigned long long)(gd->bd->bi_dram[i].start));
214 print_size(gd->bd->bi_dram[i].size, "\n");
222 print_size(size, "");
223 board_add_ram_info(0);
229 __weak int dram_init_banksize(void)
231 #if defined(CONFIG_NR_DRAM_BANKS) && defined(CONFIG_SYS_SDRAM_BASE)
232 gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
233 gd->bd->bi_dram[0].size = get_effective_memsize();
239 #if defined(CONFIG_SYS_I2C)
240 static int init_func_i2c(void)
243 #ifdef CONFIG_SYS_I2C
246 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
253 #if defined(CONFIG_VID)
254 __weak int init_func_vid(void)
260 #if defined(CONFIG_HARD_SPI)
261 static int init_func_spi(void)
269 static int setup_mon_len(void)
271 #if defined(__ARM__) || defined(__MICROBLAZE__)
272 gd->mon_len = (ulong)&__bss_end - (ulong)_start;
273 #elif defined(CONFIG_SANDBOX) || defined(CONFIG_EFI_APP)
274 gd->mon_len = (ulong)&_end - (ulong)_init;
275 #elif defined(CONFIG_NIOS2) || defined(CONFIG_XTENSA)
276 gd->mon_len = CONFIG_SYS_MONITOR_LEN;
277 #elif defined(CONFIG_NDS32) || defined(CONFIG_SH) || defined(CONFIG_RISCV)
278 gd->mon_len = (ulong)(&__bss_end) - (ulong)(&_start);
279 #elif defined(CONFIG_SYS_MONITOR_BASE)
280 /* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */
281 gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE;
286 __weak int arch_cpu_init(void)
291 __weak int mach_cpu_init(void)
296 /* Get the top of usable RAM */
297 __weak ulong board_get_usable_ram_top(ulong total_size)
299 #ifdef CONFIG_SYS_SDRAM_BASE
301 * Detect whether we have so much RAM that it goes past the end of our
302 * 32-bit address space. If so, clip the usable RAM so it doesn't.
304 if (gd->ram_top < CONFIG_SYS_SDRAM_BASE)
306 * Will wrap back to top of 32-bit space when reservations
314 static int setup_dest_addr(void)
316 debug("Monitor len: %08lX\n", gd->mon_len);
318 * Ram is setup, size stored in gd !!
320 debug("Ram size: %08lX\n", (ulong)gd->ram_size);
321 #if defined(CONFIG_SYS_MEM_TOP_HIDE)
323 * Subtract specified amount of memory to hide so that it won't
324 * get "touched" at all by U-Boot. By fixing up gd->ram_size
325 * the Linux kernel should now get passed the now "corrected"
326 * memory size and won't touch it either. This should work
327 * for arch/ppc and arch/powerpc. Only Linux board ports in
328 * arch/powerpc with bootwrapper support, that recalculate the
329 * memory size from the SDRAM controller setup will have to
332 gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE;
334 #ifdef CONFIG_SYS_SDRAM_BASE
335 gd->ram_base = CONFIG_SYS_SDRAM_BASE;
337 gd->ram_top = gd->ram_base + get_effective_memsize();
338 gd->ram_top = board_get_usable_ram_top(gd->mon_len);
339 gd->relocaddr = gd->ram_top;
340 debug("Ram top: %08lX\n", (ulong)gd->ram_top);
341 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
343 * We need to make sure the location we intend to put secondary core
344 * boot code is reserved and not used by any part of u-boot
346 if (gd->relocaddr > determine_mp_bootpg(NULL)) {
347 gd->relocaddr = determine_mp_bootpg(NULL);
348 debug("Reserving MP boot page to %08lx\n", gd->relocaddr);
355 /* reserve protected RAM */
356 static int reserve_pram(void)
360 reg = env_get_ulong("pram", 10, CONFIG_PRAM);
361 gd->relocaddr -= (reg << 10); /* size is in kB */
362 debug("Reserving %ldk for protected RAM at %08lx\n", reg,
366 #endif /* CONFIG_PRAM */
368 /* Round memory pointer down to next 4 kB limit */
369 static int reserve_round_4k(void)
371 gd->relocaddr &= ~(4096 - 1);
376 __weak int reserve_mmu(void)
378 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF))
379 /* reserve TLB table */
380 gd->arch.tlb_size = PGTABLE_SIZE;
381 gd->relocaddr -= gd->arch.tlb_size;
383 /* round down to next 64 kB limit */
384 gd->relocaddr &= ~(0x10000 - 1);
386 gd->arch.tlb_addr = gd->relocaddr;
387 debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr,
388 gd->arch.tlb_addr + gd->arch.tlb_size);
390 #ifdef CONFIG_SYS_MEM_RESERVE_SECURE
392 * Record allocated tlb_addr in case gd->tlb_addr to be overwritten
393 * with location within secure ram.
395 gd->arch.tlb_allocated = gd->arch.tlb_addr;
403 static int reserve_video(void)
405 #ifdef CONFIG_DM_VIDEO
409 addr = gd->relocaddr;
410 ret = video_reserve(&addr);
413 gd->relocaddr = addr;
414 #elif defined(CONFIG_LCD)
415 # ifdef CONFIG_FB_ADDR
416 gd->fb_base = CONFIG_FB_ADDR;
418 /* reserve memory for LCD display (always full pages) */
419 gd->relocaddr = lcd_setmem(gd->relocaddr);
420 gd->fb_base = gd->relocaddr;
421 # endif /* CONFIG_FB_ADDR */
422 #elif defined(CONFIG_VIDEO) && \
423 (!defined(CONFIG_PPC)) && \
424 !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \
425 !defined(CONFIG_M68K)
426 /* reserve memory for video display (always full pages) */
427 gd->relocaddr = video_setmem(gd->relocaddr);
428 gd->fb_base = gd->relocaddr;
434 static int reserve_trace(void)
437 gd->relocaddr -= CONFIG_TRACE_BUFFER_SIZE;
438 gd->trace_buff = map_sysmem(gd->relocaddr, CONFIG_TRACE_BUFFER_SIZE);
439 debug("Reserving %dk for trace data at: %08lx\n",
440 CONFIG_TRACE_BUFFER_SIZE >> 10, gd->relocaddr);
446 static int reserve_uboot(void)
448 if (!(gd->flags & GD_FLG_SKIP_RELOC)) {
450 * reserve memory for U-Boot code, data & bss
451 * round down to next 4 kB limit
453 gd->relocaddr -= gd->mon_len;
454 gd->relocaddr &= ~(4096 - 1);
455 #if defined(CONFIG_E500) || defined(CONFIG_MIPS)
456 /* round down to next 64 kB limit so that IVPR stays aligned */
457 gd->relocaddr &= ~(65536 - 1);
460 debug("Reserving %ldk for U-Boot at: %08lx\n",
461 gd->mon_len >> 10, gd->relocaddr);
464 gd->start_addr_sp = gd->relocaddr;
469 /* reserve memory for malloc() area */
470 static int reserve_malloc(void)
472 gd->start_addr_sp = gd->start_addr_sp - TOTAL_MALLOC_LEN;
473 debug("Reserving %dk for malloc() at: %08lx\n",
474 TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp);
478 /* (permanently) allocate a Board Info struct */
479 static int reserve_board(void)
482 gd->start_addr_sp -= sizeof(bd_t);
483 gd->bd = (bd_t *)map_sysmem(gd->start_addr_sp, sizeof(bd_t));
484 memset(gd->bd, '\0', sizeof(bd_t));
485 debug("Reserving %zu Bytes for Board Info at: %08lx\n",
486 sizeof(bd_t), gd->start_addr_sp);
491 static int setup_machine(void)
493 #ifdef CONFIG_MACH_TYPE
494 gd->bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */
499 static int reserve_global_data(void)
501 gd->start_addr_sp -= sizeof(gd_t);
502 gd->new_gd = (gd_t *)map_sysmem(gd->start_addr_sp, sizeof(gd_t));
503 debug("Reserving %zu Bytes for Global Data at: %08lx\n",
504 sizeof(gd_t), gd->start_addr_sp);
508 static int reserve_fdt(void)
510 #ifndef CONFIG_OF_EMBED
512 * If the device tree is sitting immediately above our image then we
513 * must relocate it. If it is embedded in the data section, then it
514 * will be relocated with other data.
517 gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob) + 0x1000, 32);
519 gd->start_addr_sp -= gd->fdt_size;
520 gd->new_fdt = map_sysmem(gd->start_addr_sp, gd->fdt_size);
521 debug("Reserving %lu Bytes for FDT at: %08lx\n",
522 gd->fdt_size, gd->start_addr_sp);
529 static int reserve_bootstage(void)
531 #ifdef CONFIG_BOOTSTAGE
532 int size = bootstage_get_size();
534 gd->start_addr_sp -= size;
535 gd->new_bootstage = map_sysmem(gd->start_addr_sp, size);
536 debug("Reserving %#x Bytes for bootstage at: %08lx\n", size,
543 __weak int arch_reserve_stacks(void)
548 static int reserve_stacks(void)
550 /* make stack pointer 16-byte aligned */
551 gd->start_addr_sp -= 16;
552 gd->start_addr_sp &= ~0xf;
555 * let the architecture-specific code tailor gd->start_addr_sp and
558 return arch_reserve_stacks();
561 static int display_new_sp(void)
563 debug("New Stack Pointer is: %08lx\n", gd->start_addr_sp);
568 #if defined(CONFIG_M68K) || defined(CONFIG_MIPS) || defined(CONFIG_PPC) || \
570 static int setup_board_part1(void)
575 * Save local variables to board info struct
577 bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; /* start of memory */
578 bd->bi_memsize = gd->ram_size; /* size in bytes */
580 #ifdef CONFIG_SYS_SRAM_BASE
581 bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */
582 bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */
585 #if defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
586 bd->bi_immr_base = CONFIG_SYS_IMMR; /* base of IMMR register */
588 #if defined(CONFIG_M68K)
589 bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */
591 #if defined(CONFIG_MPC83xx)
592 bd->bi_immrbar = CONFIG_SYS_IMMR;
599 #if defined(CONFIG_PPC) || defined(CONFIG_M68K)
600 static int setup_board_part2(void)
604 bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */
605 bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */
606 #if defined(CONFIG_CPM2)
607 bd->bi_cpmfreq = gd->arch.cpm_clk;
608 bd->bi_brgfreq = gd->arch.brg_clk;
609 bd->bi_sccfreq = gd->arch.scc_clk;
610 bd->bi_vco = gd->arch.vco_out;
611 #endif /* CONFIG_CPM2 */
612 #if defined(CONFIG_M68K) && defined(CONFIG_PCI)
613 bd->bi_pcifreq = gd->pci_clk;
615 #if defined(CONFIG_EXTRA_CLOCK)
616 bd->bi_inpfreq = gd->arch.inp_clk; /* input Freq in Hz */
617 bd->bi_vcofreq = gd->arch.vco_clk; /* vco Freq in Hz */
618 bd->bi_flbfreq = gd->arch.flb_clk; /* flexbus Freq in Hz */
626 static int init_post(void)
628 post_bootmode_init();
629 post_run(NULL, POST_ROM | post_bootmode_get(0));
635 static int reloc_fdt(void)
637 #ifndef CONFIG_OF_EMBED
638 if (gd->flags & GD_FLG_SKIP_RELOC)
641 memcpy(gd->new_fdt, gd->fdt_blob, gd->fdt_size);
642 gd->fdt_blob = gd->new_fdt;
649 static int reloc_bootstage(void)
651 #ifdef CONFIG_BOOTSTAGE
652 if (gd->flags & GD_FLG_SKIP_RELOC)
654 if (gd->new_bootstage) {
655 int size = bootstage_get_size();
657 debug("Copying bootstage from %p to %p, size %x\n",
658 gd->bootstage, gd->new_bootstage, size);
659 memcpy(gd->new_bootstage, gd->bootstage, size);
660 gd->bootstage = gd->new_bootstage;
667 static int setup_reloc(void)
669 if (gd->flags & GD_FLG_SKIP_RELOC) {
670 debug("Skipping relocation due to flag\n");
674 #ifdef CONFIG_SYS_TEXT_BASE
676 gd->reloc_off = gd->relocaddr - (unsigned long)__image_copy_start;
677 #elif defined(CONFIG_M68K)
679 * On all ColdFire arch cpu, monitor code starts always
680 * just after the default vector table location, so at 0x400
682 gd->reloc_off = gd->relocaddr - (CONFIG_SYS_TEXT_BASE + 0x400);
684 gd->reloc_off = gd->relocaddr - CONFIG_SYS_TEXT_BASE;
687 memcpy(gd->new_gd, (char *)gd, sizeof(gd_t));
689 debug("Relocation Offset is: %08lx\n", gd->reloc_off);
690 debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n",
691 gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd),
697 #ifdef CONFIG_OF_BOARD_FIXUP
698 static int fix_fdt(void)
700 return board_fix_fdt((void *)gd->fdt_blob);
704 /* ARM calls relocate_code from its crt0.S */
705 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
706 !CONFIG_IS_ENABLED(X86_64)
708 static int jump_to_copy(void)
710 if (gd->flags & GD_FLG_SKIP_RELOC)
713 * x86 is special, but in a nice way. It uses a trampoline which
714 * enables the dcache if possible.
716 * For now, other archs use relocate_code(), which is implemented
717 * similarly for all archs. When we do generic relocation, hopefully
718 * we can make all archs enable the dcache prior to relocation.
720 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
722 * SDRAM and console are now initialised. The final stack can now
723 * be setup in SDRAM. Code execution will continue in Flash, but
724 * with the stack in SDRAM and Global Data in temporary memory
727 arch_setup_gd(gd->new_gd);
728 board_init_f_r_trampoline(gd->start_addr_sp);
730 relocate_code(gd->start_addr_sp, gd->new_gd, gd->relocaddr);
737 /* Record the board_init_f() bootstage (after arch_cpu_init()) */
738 static int initf_bootstage(void)
740 bool from_spl = IS_ENABLED(CONFIG_SPL_BOOTSTAGE) &&
741 IS_ENABLED(CONFIG_BOOTSTAGE_STASH);
744 ret = bootstage_init(!from_spl);
748 const void *stash = map_sysmem(CONFIG_BOOTSTAGE_STASH_ADDR,
749 CONFIG_BOOTSTAGE_STASH_SIZE);
751 ret = bootstage_unstash(stash, CONFIG_BOOTSTAGE_STASH_SIZE);
752 if (ret && ret != -ENOENT) {
753 debug("Failed to unstash bootstage: err=%d\n", ret);
758 bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f");
763 static int initf_console_record(void)
765 #if defined(CONFIG_CONSOLE_RECORD) && CONFIG_VAL(SYS_MALLOC_F_LEN)
766 return console_record_init();
772 static int initf_dm(void)
774 #if defined(CONFIG_DM) && CONFIG_VAL(SYS_MALLOC_F_LEN)
777 bootstage_start(BOOTSTATE_ID_ACCUM_DM_F, "dm_f");
778 ret = dm_init_and_scan(true);
779 bootstage_accum(BOOTSTATE_ID_ACCUM_DM_F);
783 #ifdef CONFIG_TIMER_EARLY
784 ret = dm_timer_init();
792 /* Architecture-specific memory reservation */
793 __weak int reserve_arch(void)
798 __weak int arch_cpu_init_dm(void)
803 static const init_fnc_t init_sequence_f[] = {
805 #ifdef CONFIG_OF_CONTROL
813 initf_bootstage, /* uses its own timer, so does not need DM */
814 initf_console_record,
815 #if defined(CONFIG_HAVE_FSP)
818 arch_cpu_init, /* basic arch cpu dependent setup */
819 mach_cpu_init, /* SoC/machine dependent CPU setup */
822 #if defined(CONFIG_BOARD_EARLY_INIT_F)
825 #if defined(CONFIG_PPC) || defined(CONFIG_SYS_FSL_CLK) || defined(CONFIG_M68K)
826 /* get CPU and bus clocks according to the environment variable */
827 get_clocks, /* get CPU and bus clocks (etc.) */
829 #if !defined(CONFIG_M68K)
830 timer_init, /* initialize timer */
832 #if defined(CONFIG_BOARD_POSTCLK_INIT)
835 env_init, /* initialize environment */
836 init_baud_rate, /* initialze baudrate settings */
837 serial_init, /* serial communications setup */
838 console_init_f, /* stage 1 init of console */
839 display_options, /* say that we are here */
840 display_text_info, /* show debugging info if required */
841 #if defined(CONFIG_PPC) || defined(CONFIG_SH) || defined(CONFIG_X86)
844 #if defined(CONFIG_SYSRESET)
847 #if defined(CONFIG_DISPLAY_CPUINFO)
848 print_cpuinfo, /* display cpu info (and speed) */
850 #if defined(CONFIG_DTB_RESELECT)
853 #if defined(CONFIG_DISPLAY_BOARDINFO)
856 INIT_FUNC_WATCHDOG_INIT
857 #if defined(CONFIG_MISC_INIT_F)
860 INIT_FUNC_WATCHDOG_RESET
861 #if defined(CONFIG_SYS_I2C)
864 #if defined(CONFIG_VID) && !defined(CONFIG_SPL)
867 #if defined(CONFIG_HARD_SPI)
871 dram_init, /* configure available RAM banks */
875 INIT_FUNC_WATCHDOG_RESET
876 #if defined(CONFIG_SYS_DRAM_TEST)
878 #endif /* CONFIG_SYS_DRAM_TEST */
879 INIT_FUNC_WATCHDOG_RESET
884 INIT_FUNC_WATCHDOG_RESET
886 * Now that we have DRAM mapped and working, we can
887 * relocate the code and continue running from DRAM.
889 * Reserve memory at end of RAM for (top down in that order):
890 * - area that won't get touched by U-Boot and Linux (optional)
891 * - kernel log buffer
895 * - board info struct
918 #if defined(CONFIG_M68K) || defined(CONFIG_MIPS) || defined(CONFIG_PPC) || \
922 #if defined(CONFIG_PPC) || defined(CONFIG_M68K)
923 INIT_FUNC_WATCHDOG_RESET
927 #ifdef CONFIG_OF_BOARD_FIXUP
930 INIT_FUNC_WATCHDOG_RESET
934 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
939 #if defined(CONFIG_XTENSA)
942 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
943 !CONFIG_IS_ENABLED(X86_64)
949 void board_init_f(ulong boot_flags)
951 gd->flags = boot_flags;
952 gd->have_console = 0;
954 if (initcall_run_list(init_sequence_f))
957 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
958 !defined(CONFIG_EFI_APP) && !CONFIG_IS_ENABLED(X86_64) && \
960 /* NOTREACHED - jump_to_copy() does not return */
965 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
967 * For now this code is only used on x86.
969 * init_sequence_f_r is the list of init functions which are run when
970 * U-Boot is executing from Flash with a semi-limited 'C' environment.
971 * The following limitations must be considered when implementing an
973 * - 'static' variables are read-only
974 * - Global Data (gd->xxx) is read/write
976 * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if
977 * supported). It _should_, if possible, copy global data to RAM and
978 * initialise the CPU caches (to speed up the relocation process)
980 * NOTE: At present only x86 uses this route, but it is intended that
981 * all archs will move to this when generic relocation is implemented.
983 static const init_fnc_t init_sequence_f_r[] = {
984 #if !CONFIG_IS_ENABLED(X86_64)
991 void board_init_f_r(void)
993 if (initcall_run_list(init_sequence_f_r))
997 * The pre-relocation drivers may be using memory that has now gone
998 * away. Mark serial as unavailable - this will fall back to the debug
1001 * Do the same with log drivers since the memory may not be available.
1003 gd->flags &= ~(GD_FLG_SERIAL_READY | GD_FLG_LOG_READY);
1009 * U-Boot has been copied into SDRAM, the BSS has been cleared etc.
1010 * Transfer execution from Flash to RAM by calculating the address
1011 * of the in-RAM copy of board_init_r() and calling it
1013 (board_init_r + gd->reloc_off)((gd_t *)gd, gd->relocaddr);
1015 /* NOTREACHED - board_init_r() does not return */
1018 #endif /* CONFIG_X86 */