2 * Copyright (c) 2011 The Chromium OS Authors.
3 * (C) Copyright 2002-2006
4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
7 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
8 * Marius Groeger <mgroeger@sysgo.de>
10 * SPDX-License-Identifier: GPL-2.0+
14 #include <linux/compiler.h>
17 #include <environment.h>
21 #if defined(CONFIG_CMD_IDE)
30 /* TODO: Can we move these into arch/ headers? */
40 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
47 #include <status_led.h>
52 #include <linux/errno.h>
54 #include <asm/sections.h>
55 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
56 #include <asm/init_helpers.h>
58 #if defined(CONFIG_X86) || defined(CONFIG_ARC) || defined(CONFIG_XTENSA)
59 #include <asm/relocate.h>
62 #include <asm/state.h>
65 #include <linux/compiler.h>
68 * Pointer to initial global data area
70 * Here we initialize it if needed.
72 #ifdef XTRN_DECLARE_GLOBAL_DATA_PTR
73 #undef XTRN_DECLARE_GLOBAL_DATA_PTR
74 #define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */
75 DECLARE_GLOBAL_DATA_PTR = (gd_t *) (CONFIG_SYS_INIT_GD_ADDR);
77 DECLARE_GLOBAL_DATA_PTR;
81 * TODO(sjg@chromium.org): IMO this code should be
82 * refactored to a single function, something like:
84 * void led_set_state(enum led_colour_t colour, int on);
86 /************************************************************************
87 * Coloured LED functionality
88 ************************************************************************
89 * May be supplied by boards if desired
91 __weak void coloured_LED_init(void) {}
92 __weak void red_led_on(void) {}
93 __weak void red_led_off(void) {}
94 __weak void green_led_on(void) {}
95 __weak void green_led_off(void) {}
96 __weak void yellow_led_on(void) {}
97 __weak void yellow_led_off(void) {}
98 __weak void blue_led_on(void) {}
99 __weak void blue_led_off(void) {}
102 * Why is gd allocated a register? Prior to reloc it might be better to
103 * just pass it around to each function in this file?
105 * After reloc one could argue that it is hardly used and doesn't need
106 * to be in a register. Or if it is it should perhaps hold pointers to all
107 * global data for all modules, so that post-reloc we can avoid the massive
108 * literal pool we get on ARM. Or perhaps just encourage each module to use
113 * Could the CONFIG_SPL_BUILD infection become a flag in gd?
116 #if defined(CONFIG_WATCHDOG) || defined(CONFIG_HW_WATCHDOG)
117 static int init_func_watchdog_init(void)
119 # if defined(CONFIG_HW_WATCHDOG) && \
120 (defined(CONFIG_M68K) || defined(CONFIG_MICROBLAZE) || \
121 defined(CONFIG_SH) || defined(CONFIG_AT91SAM9_WATCHDOG) || \
122 defined(CONFIG_DESIGNWARE_WATCHDOG) || \
123 defined(CONFIG_IMX_WATCHDOG))
125 puts(" Watchdog enabled\n");
132 int init_func_watchdog_reset(void)
138 #endif /* CONFIG_WATCHDOG */
140 __weak void board_add_ram_info(int use_default)
142 /* please define platform specific board_add_ram_info() */
145 static int init_baud_rate(void)
147 gd->baudrate = getenv_ulong("baudrate", 10, CONFIG_BAUDRATE);
151 static int display_text_info(void)
153 #if !defined(CONFIG_SANDBOX) && !defined(CONFIG_EFI_APP)
154 ulong bss_start, bss_end, text_base;
156 bss_start = (ulong)&__bss_start;
157 bss_end = (ulong)&__bss_end;
159 #ifdef CONFIG_SYS_TEXT_BASE
160 text_base = CONFIG_SYS_TEXT_BASE;
162 text_base = CONFIG_SYS_MONITOR_BASE;
165 debug("U-Boot code: %08lX -> %08lX BSS: -> %08lX\n",
166 text_base, bss_start, bss_end);
169 #ifdef CONFIG_USE_IRQ
170 debug("IRQ Stack: %08lx\n", IRQ_STACK_START);
171 debug("FIQ Stack: %08lx\n", FIQ_STACK_START);
177 static int announce_dram_init(void)
183 #if defined(CONFIG_MIPS) || defined(CONFIG_PPC) || defined(CONFIG_M68K)
184 static int init_func_ram(void)
186 #ifdef CONFIG_BOARD_TYPES
187 int board_type = gd->board_type;
189 int board_type = 0; /* use dummy arg */
192 gd->ram_size = initdram(board_type);
194 if (gd->ram_size > 0)
197 puts("*** failed ***\n");
202 static int show_dram_config(void)
204 unsigned long long size;
206 #ifdef CONFIG_NR_DRAM_BANKS
209 debug("\nRAM Configuration:\n");
210 for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
211 size += gd->bd->bi_dram[i].size;
212 debug("Bank #%d: %llx ", i,
213 (unsigned long long)(gd->bd->bi_dram[i].start));
215 print_size(gd->bd->bi_dram[i].size, "\n");
223 print_size(size, "");
224 board_add_ram_info(0);
230 __weak void dram_init_banksize(void)
232 #if defined(CONFIG_NR_DRAM_BANKS) && defined(CONFIG_SYS_SDRAM_BASE)
233 gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
234 gd->bd->bi_dram[0].size = get_effective_memsize();
238 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
239 static int init_func_i2c(void)
242 #ifdef CONFIG_SYS_I2C
245 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
252 #if defined(CONFIG_HARD_SPI)
253 static int init_func_spi(void)
263 static int zero_global_data(void)
265 memset((void *)gd, '\0', sizeof(gd_t));
270 static int setup_mon_len(void)
272 #if defined(__ARM__) || defined(__MICROBLAZE__)
273 gd->mon_len = (ulong)&__bss_end - (ulong)_start;
274 #elif defined(CONFIG_SANDBOX) || defined(CONFIG_EFI_APP)
275 gd->mon_len = (ulong)&_end - (ulong)_init;
276 #elif defined(CONFIG_NIOS2) || defined(CONFIG_XTENSA)
277 gd->mon_len = CONFIG_SYS_MONITOR_LEN;
278 #elif defined(CONFIG_NDS32) || defined(CONFIG_SH)
279 gd->mon_len = (ulong)(&__bss_end) - (ulong)(&_start);
280 #elif defined(CONFIG_SYS_MONITOR_BASE)
281 /* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */
282 gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE;
287 __weak int arch_cpu_init(void)
292 __weak int mach_cpu_init(void)
297 #ifdef CONFIG_SANDBOX
298 static int setup_ram_buf(void)
300 struct sandbox_state *state = state_get_current();
302 gd->arch.ram_buf = state->ram_buf;
303 gd->ram_size = state->ram_size;
309 /* Get the top of usable RAM */
310 __weak ulong board_get_usable_ram_top(ulong total_size)
312 #ifdef CONFIG_SYS_SDRAM_BASE
314 * Detect whether we have so much RAM that it goes past the end of our
315 * 32-bit address space. If so, clip the usable RAM so it doesn't.
317 if (gd->ram_top < CONFIG_SYS_SDRAM_BASE)
319 * Will wrap back to top of 32-bit space when reservations
327 static int setup_dest_addr(void)
329 debug("Monitor len: %08lX\n", gd->mon_len);
331 * Ram is setup, size stored in gd !!
333 debug("Ram size: %08lX\n", (ulong)gd->ram_size);
334 #if defined(CONFIG_SYS_MEM_TOP_HIDE)
336 * Subtract specified amount of memory to hide so that it won't
337 * get "touched" at all by U-Boot. By fixing up gd->ram_size
338 * the Linux kernel should now get passed the now "corrected"
339 * memory size and won't touch it either. This should work
340 * for arch/ppc and arch/powerpc. Only Linux board ports in
341 * arch/powerpc with bootwrapper support, that recalculate the
342 * memory size from the SDRAM controller setup will have to
345 gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE;
347 #ifdef CONFIG_SYS_SDRAM_BASE
348 gd->ram_top = CONFIG_SYS_SDRAM_BASE;
350 gd->ram_top += get_effective_memsize();
351 gd->ram_top = board_get_usable_ram_top(gd->mon_len);
352 gd->relocaddr = gd->ram_top;
353 debug("Ram top: %08lX\n", (ulong)gd->ram_top);
354 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
356 * We need to make sure the location we intend to put secondary core
357 * boot code is reserved and not used by any part of u-boot
359 if (gd->relocaddr > determine_mp_bootpg(NULL)) {
360 gd->relocaddr = determine_mp_bootpg(NULL);
361 debug("Reserving MP boot page to %08lx\n", gd->relocaddr);
367 #if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR)
368 static int reserve_logbuffer(void)
370 /* reserve kernel log buffer */
371 gd->relocaddr -= LOGBUFF_RESERVE;
372 debug("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN,
379 /* reserve protected RAM */
380 static int reserve_pram(void)
384 reg = getenv_ulong("pram", 10, CONFIG_PRAM);
385 gd->relocaddr -= (reg << 10); /* size is in kB */
386 debug("Reserving %ldk for protected RAM at %08lx\n", reg,
390 #endif /* CONFIG_PRAM */
392 /* Round memory pointer down to next 4 kB limit */
393 static int reserve_round_4k(void)
395 gd->relocaddr &= ~(4096 - 1);
399 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \
401 static int reserve_mmu(void)
403 /* reserve TLB table */
404 gd->arch.tlb_size = PGTABLE_SIZE;
405 gd->relocaddr -= gd->arch.tlb_size;
407 /* round down to next 64 kB limit */
408 gd->relocaddr &= ~(0x10000 - 1);
410 gd->arch.tlb_addr = gd->relocaddr;
411 debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr,
412 gd->arch.tlb_addr + gd->arch.tlb_size);
414 #ifdef CONFIG_SYS_MEM_RESERVE_SECURE
416 * Record allocated tlb_addr in case gd->tlb_addr to be overwritten
417 * with location within secure ram.
419 gd->arch.tlb_allocated = gd->arch.tlb_addr;
426 #ifdef CONFIG_DM_VIDEO
427 static int reserve_video(void)
432 addr = gd->relocaddr;
433 ret = video_reserve(&addr);
436 gd->relocaddr = addr;
443 static int reserve_lcd(void)
445 # ifdef CONFIG_FB_ADDR
446 gd->fb_base = CONFIG_FB_ADDR;
448 /* reserve memory for LCD display (always full pages) */
449 gd->relocaddr = lcd_setmem(gd->relocaddr);
450 gd->fb_base = gd->relocaddr;
451 # endif /* CONFIG_FB_ADDR */
455 # endif /* CONFIG_LCD */
457 # if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) && \
458 !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \
459 !defined(CONFIG_M68K)
460 static int reserve_legacy_video(void)
462 /* reserve memory for video display (always full pages) */
463 gd->relocaddr = video_setmem(gd->relocaddr);
464 gd->fb_base = gd->relocaddr;
469 #endif /* !CONFIG_DM_VIDEO */
471 static int reserve_trace(void)
474 gd->relocaddr -= CONFIG_TRACE_BUFFER_SIZE;
475 gd->trace_buff = map_sysmem(gd->relocaddr, CONFIG_TRACE_BUFFER_SIZE);
476 debug("Reserving %dk for trace data at: %08lx\n",
477 CONFIG_TRACE_BUFFER_SIZE >> 10, gd->relocaddr);
483 static int reserve_uboot(void)
486 * reserve memory for U-Boot code, data & bss
487 * round down to next 4 kB limit
489 gd->relocaddr -= gd->mon_len;
490 gd->relocaddr &= ~(4096 - 1);
492 /* round down to next 64 kB limit so that IVPR stays aligned */
493 gd->relocaddr &= ~(65536 - 1);
496 debug("Reserving %ldk for U-Boot at: %08lx\n", gd->mon_len >> 10,
499 gd->start_addr_sp = gd->relocaddr;
504 #ifndef CONFIG_SPL_BUILD
505 /* reserve memory for malloc() area */
506 static int reserve_malloc(void)
508 gd->start_addr_sp = gd->start_addr_sp - TOTAL_MALLOC_LEN;
509 debug("Reserving %dk for malloc() at: %08lx\n",
510 TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp);
514 /* (permanently) allocate a Board Info struct */
515 static int reserve_board(void)
518 gd->start_addr_sp -= sizeof(bd_t);
519 gd->bd = (bd_t *)map_sysmem(gd->start_addr_sp, sizeof(bd_t));
520 memset(gd->bd, '\0', sizeof(bd_t));
521 debug("Reserving %zu Bytes for Board Info at: %08lx\n",
522 sizeof(bd_t), gd->start_addr_sp);
528 static int setup_machine(void)
530 #ifdef CONFIG_MACH_TYPE
531 gd->bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */
536 static int reserve_global_data(void)
538 gd->start_addr_sp -= sizeof(gd_t);
539 gd->new_gd = (gd_t *)map_sysmem(gd->start_addr_sp, sizeof(gd_t));
540 debug("Reserving %zu Bytes for Global Data at: %08lx\n",
541 sizeof(gd_t), gd->start_addr_sp);
545 static int reserve_fdt(void)
547 #ifndef CONFIG_OF_EMBED
549 * If the device tree is sitting immediately above our image then we
550 * must relocate it. If it is embedded in the data section, then it
551 * will be relocated with other data.
554 gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob) + 0x1000, 32);
556 gd->start_addr_sp -= gd->fdt_size;
557 gd->new_fdt = map_sysmem(gd->start_addr_sp, gd->fdt_size);
558 debug("Reserving %lu Bytes for FDT at: %08lx\n",
559 gd->fdt_size, gd->start_addr_sp);
566 int arch_reserve_stacks(void)
571 static int reserve_stacks(void)
573 /* make stack pointer 16-byte aligned */
574 gd->start_addr_sp -= 16;
575 gd->start_addr_sp &= ~0xf;
578 * let the architecture-specific code tailor gd->start_addr_sp and
581 return arch_reserve_stacks();
584 static int display_new_sp(void)
586 debug("New Stack Pointer is: %08lx\n", gd->start_addr_sp);
591 #if defined(CONFIG_M68K) || defined(CONFIG_MIPS) || defined(CONFIG_PPC) || \
593 static int setup_board_part1(void)
598 * Save local variables to board info struct
600 bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; /* start of memory */
601 bd->bi_memsize = gd->ram_size; /* size in bytes */
603 #ifdef CONFIG_SYS_SRAM_BASE
604 bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */
605 bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */
608 #if defined(CONFIG_8xx) || defined(CONFIG_MPC8260) || defined(CONFIG_5xx) || \
609 defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
610 bd->bi_immr_base = CONFIG_SYS_IMMR; /* base of IMMR register */
612 #if defined(CONFIG_MPC5xxx) || defined(CONFIG_M68K)
613 bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */
615 #if defined(CONFIG_MPC83xx)
616 bd->bi_immrbar = CONFIG_SYS_IMMR;
623 #if defined(CONFIG_PPC) || defined(CONFIG_M68K)
624 static int setup_board_part2(void)
628 bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */
629 bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */
630 #if defined(CONFIG_CPM2)
631 bd->bi_cpmfreq = gd->arch.cpm_clk;
632 bd->bi_brgfreq = gd->arch.brg_clk;
633 bd->bi_sccfreq = gd->arch.scc_clk;
634 bd->bi_vco = gd->arch.vco_out;
635 #endif /* CONFIG_CPM2 */
636 #if defined(CONFIG_MPC512X)
637 bd->bi_ipsfreq = gd->arch.ips_clk;
638 #endif /* CONFIG_MPC512X */
639 #if defined(CONFIG_MPC5xxx)
640 bd->bi_ipbfreq = gd->arch.ipb_clk;
641 bd->bi_pcifreq = gd->pci_clk;
642 #endif /* CONFIG_MPC5xxx */
643 #if defined(CONFIG_M68K) && defined(CONFIG_PCI)
644 bd->bi_pcifreq = gd->pci_clk;
646 #if defined(CONFIG_EXTRA_CLOCK)
647 bd->bi_inpfreq = gd->arch.inp_clk; /* input Freq in Hz */
648 bd->bi_vcofreq = gd->arch.vco_clk; /* vco Freq in Hz */
649 bd->bi_flbfreq = gd->arch.flb_clk; /* flexbus Freq in Hz */
656 #ifdef CONFIG_SYS_EXTBDINFO
657 static int setup_board_extra(void)
661 strncpy((char *) bd->bi_s_version, "1.2", sizeof(bd->bi_s_version));
662 strncpy((char *) bd->bi_r_version, U_BOOT_VERSION,
663 sizeof(bd->bi_r_version));
665 bd->bi_procfreq = gd->cpu_clk; /* Processor Speed, In Hz */
666 bd->bi_plb_busfreq = gd->bus_clk;
667 #if defined(CONFIG_405GP) || defined(CONFIG_405EP) || \
668 defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
669 defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
670 bd->bi_pci_busfreq = get_PCI_freq();
671 bd->bi_opbfreq = get_OPB_freq();
672 #elif defined(CONFIG_XILINX_405)
673 bd->bi_pci_busfreq = get_PCI_freq();
681 static int init_post(void)
683 post_bootmode_init();
684 post_run(NULL, POST_ROM | post_bootmode_get(0));
690 static int setup_dram_config(void)
692 /* Ram is board specific, so move it to board code ... */
693 dram_init_banksize();
698 static int reloc_fdt(void)
700 #ifndef CONFIG_OF_EMBED
701 if (gd->flags & GD_FLG_SKIP_RELOC)
704 memcpy(gd->new_fdt, gd->fdt_blob, gd->fdt_size);
705 gd->fdt_blob = gd->new_fdt;
712 static int setup_reloc(void)
714 if (gd->flags & GD_FLG_SKIP_RELOC) {
715 debug("Skipping relocation due to flag\n");
719 #ifdef CONFIG_SYS_TEXT_BASE
720 gd->reloc_off = gd->relocaddr - CONFIG_SYS_TEXT_BASE;
723 * On all ColdFire arch cpu, monitor code starts always
724 * just after the default vector table location, so at 0x400
726 gd->reloc_off = gd->relocaddr - (CONFIG_SYS_TEXT_BASE + 0x400);
729 memcpy(gd->new_gd, (char *)gd, sizeof(gd_t));
731 debug("Relocation Offset is: %08lx\n", gd->reloc_off);
732 debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n",
733 gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd),
739 #ifdef CONFIG_OF_BOARD_FIXUP
740 static int fix_fdt(void)
742 return board_fix_fdt((void *)gd->fdt_blob);
746 /* ARM calls relocate_code from its crt0.S */
747 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
748 !CONFIG_IS_ENABLED(X86_64)
750 static int jump_to_copy(void)
752 if (gd->flags & GD_FLG_SKIP_RELOC)
755 * x86 is special, but in a nice way. It uses a trampoline which
756 * enables the dcache if possible.
758 * For now, other archs use relocate_code(), which is implemented
759 * similarly for all archs. When we do generic relocation, hopefully
760 * we can make all archs enable the dcache prior to relocation.
762 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
764 * SDRAM and console are now initialised. The final stack can now
765 * be setup in SDRAM. Code execution will continue in Flash, but
766 * with the stack in SDRAM and Global Data in temporary memory
769 arch_setup_gd(gd->new_gd);
770 board_init_f_r_trampoline(gd->start_addr_sp);
772 relocate_code(gd->start_addr_sp, gd->new_gd, gd->relocaddr);
779 /* Record the board_init_f() bootstage (after arch_cpu_init()) */
780 static int mark_bootstage(void)
782 bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f");
787 static int initf_console_record(void)
789 #if defined(CONFIG_CONSOLE_RECORD) && defined(CONFIG_SYS_MALLOC_F_LEN)
790 return console_record_init();
796 static int initf_dm(void)
798 #if defined(CONFIG_DM) && defined(CONFIG_SYS_MALLOC_F_LEN)
801 ret = dm_init_and_scan(true);
805 #ifdef CONFIG_TIMER_EARLY
806 ret = dm_timer_init();
814 /* Architecture-specific memory reservation */
815 __weak int reserve_arch(void)
820 __weak int arch_cpu_init_dm(void)
825 static const init_fnc_t init_sequence_f[] = {
826 #ifdef CONFIG_SANDBOX
830 #ifdef CONFIG_OF_CONTROL
837 initf_console_record,
838 #if defined(CONFIG_X86) && defined(CONFIG_HAVE_FSP)
841 arch_cpu_init, /* basic arch cpu dependent setup */
842 mach_cpu_init, /* SoC/machine dependent CPU setup */
845 mark_bootstage, /* need timer, go after init dm */
846 #if defined(CONFIG_BOARD_EARLY_INIT_F)
849 /* TODO: can any of this go into arch_cpu_init()? */
850 #if defined(CONFIG_PPC) && !defined(CONFIG_8xx_CPUCLK_DEFAULT)
851 get_clocks, /* get CPU and bus clocks (etc.) */
852 #if defined(CONFIG_TQM8xxL) && !defined(CONFIG_TQM866M) \
853 && !defined(CONFIG_TQM885D)
854 adjust_sdram_tbs_8xx,
856 /* TODO: can we rename this to timer_init()? */
859 #if defined(CONFIG_ARM) || defined(CONFIG_MIPS) || \
860 defined(CONFIG_NDS32) || defined(CONFIG_SH)
861 timer_init, /* initialize timer */
863 #if defined(CONFIG_BOARD_POSTCLK_INIT)
866 #if defined(CONFIG_SYS_FSL_CLK) || defined(CONFIG_M68K)
869 env_init, /* initialize environment */
870 #if defined(CONFIG_8xx_CPUCLK_DEFAULT)
871 /* get CPU and bus clocks according to the environment variable */
873 /* adjust sdram refresh rate according to the new clock */
877 init_baud_rate, /* initialze baudrate settings */
878 serial_init, /* serial communications setup */
879 console_init_f, /* stage 1 init of console */
880 #ifdef CONFIG_SANDBOX
881 sandbox_early_getopt_check,
883 display_options, /* say that we are here */
884 display_text_info, /* show debugging info if required */
885 #if defined(CONFIG_MPC8260)
888 #endif /* CONFIG_MPC8260 */
889 #if defined(CONFIG_MPC83xx)
892 #if defined(CONFIG_PPC) || defined(CONFIG_M68K) || defined(CONFIG_SH)
895 #if defined(CONFIG_DISPLAY_CPUINFO)
896 print_cpuinfo, /* display cpu info (and speed) */
898 #if defined(CONFIG_DISPLAY_BOARDINFO)
901 INIT_FUNC_WATCHDOG_INIT
902 #if defined(CONFIG_MISC_INIT_F)
905 INIT_FUNC_WATCHDOG_RESET
906 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
909 #if defined(CONFIG_HARD_SPI)
913 /* TODO: unify all these dram functions? */
914 #if defined(CONFIG_ARM) || defined(CONFIG_X86) || defined(CONFIG_NDS32) || \
915 defined(CONFIG_MICROBLAZE) || defined(CONFIG_AVR32) || \
917 dram_init, /* configure available RAM banks */
919 #if defined(CONFIG_MIPS) || defined(CONFIG_PPC) || defined(CONFIG_M68K)
925 INIT_FUNC_WATCHDOG_RESET
926 #if defined(CONFIG_SYS_DRAM_TEST)
928 #endif /* CONFIG_SYS_DRAM_TEST */
929 INIT_FUNC_WATCHDOG_RESET
934 INIT_FUNC_WATCHDOG_RESET
936 * Now that we have DRAM mapped and working, we can
937 * relocate the code and continue running from DRAM.
939 * Reserve memory at end of RAM for (top down in that order):
940 * - area that won't get touched by U-Boot and Linux (optional)
941 * - kernel log buffer
945 * - board info struct
948 #if defined(CONFIG_XTENSA)
949 /* Blackfin u-boot monitor should be on top of the ram */
952 #if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR)
959 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \
963 #ifdef CONFIG_DM_VIDEO
969 /* TODO: Why the dependency on CONFIG_8xx? */
970 # if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) && \
971 !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \
972 !defined(CONFIG_M68K)
973 reserve_legacy_video,
975 #endif /* CONFIG_DM_VIDEO */
977 #if !defined(CONFIG_XTENSA)
980 #ifndef CONFIG_SPL_BUILD
991 #if defined(CONFIG_M68K) || defined(CONFIG_MIPS) || defined(CONFIG_PPC) || \
995 #if defined(CONFIG_PPC) || defined(CONFIG_M68K)
996 INIT_FUNC_WATCHDOG_RESET
1000 #ifdef CONFIG_SYS_EXTBDINFO
1003 #ifdef CONFIG_OF_BOARD_FIXUP
1006 INIT_FUNC_WATCHDOG_RESET
1009 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
1011 do_elf_reloc_fixups,
1014 #if defined(CONFIG_XTENSA)
1017 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
1018 !CONFIG_IS_ENABLED(X86_64)
1024 void board_init_f(ulong boot_flags)
1026 #ifdef CONFIG_SYS_GENERIC_GLOBAL_DATA
1028 * For some architectures, global data is initialized and used before
1029 * calling this function. The data should be preserved. For others,
1030 * CONFIG_SYS_GENERIC_GLOBAL_DATA should be defined and use the stack
1031 * here to host global data until relocation.
1038 * Clear global data before it is accessed at debug print
1039 * in initcall_run_list. Otherwise the debug print probably
1040 * get the wrong value of gd->have_console.
1045 gd->flags = boot_flags;
1046 gd->have_console = 0;
1048 if (initcall_run_list(init_sequence_f))
1051 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
1052 !defined(CONFIG_EFI_APP) && !CONFIG_IS_ENABLED(X86_64)
1053 /* NOTREACHED - jump_to_copy() does not return */
1058 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
1060 * For now this code is only used on x86.
1062 * init_sequence_f_r is the list of init functions which are run when
1063 * U-Boot is executing from Flash with a semi-limited 'C' environment.
1064 * The following limitations must be considered when implementing an
1066 * - 'static' variables are read-only
1067 * - Global Data (gd->xxx) is read/write
1069 * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if
1070 * supported). It _should_, if possible, copy global data to RAM and
1071 * initialise the CPU caches (to speed up the relocation process)
1073 * NOTE: At present only x86 uses this route, but it is intended that
1074 * all archs will move to this when generic relocation is implemented.
1076 static const init_fnc_t init_sequence_f_r[] = {
1077 #if !CONFIG_IS_ENABLED(X86_64)
1084 void board_init_f_r(void)
1086 if (initcall_run_list(init_sequence_f_r))
1090 * The pre-relocation drivers may be using memory that has now gone
1091 * away. Mark serial as unavailable - this will fall back to the debug
1092 * UART if available.
1094 gd->flags &= ~GD_FLG_SERIAL_READY;
1097 * U-Boot has been copied into SDRAM, the BSS has been cleared etc.
1098 * Transfer execution from Flash to RAM by calculating the address
1099 * of the in-RAM copy of board_init_r() and calling it
1101 (board_init_r + gd->reloc_off)((gd_t *)gd, gd->relocaddr);
1103 /* NOTREACHED - board_init_r() does not return */
1106 #endif /* CONFIG_X86 */