1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (c) 2011 The Chromium OS Authors.
4 * (C) Copyright 2002-2006
5 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
8 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
9 * Marius Groeger <mgroeger@sysgo.de>
14 #include <bootstage.h>
15 #include <clock_legacy.h>
21 #include <env_internal.h>
38 #include <status_led.h>
44 #include <asm/cache.h>
45 #ifdef CONFIG_MACH_TYPE
46 #include <asm/mach-types.h>
48 #if defined(CONFIG_MP) && defined(CONFIG_PPC)
52 #include <asm/sections.h>
54 #include <linux/errno.h>
57 * Pointer to initial global data area
59 * Here we initialize it if needed.
61 #ifdef XTRN_DECLARE_GLOBAL_DATA_PTR
62 #undef XTRN_DECLARE_GLOBAL_DATA_PTR
63 #define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */
64 DECLARE_GLOBAL_DATA_PTR = (gd_t *)(CONFIG_SYS_INIT_GD_ADDR);
66 DECLARE_GLOBAL_DATA_PTR;
70 * TODO(sjg@chromium.org): IMO this code should be
71 * refactored to a single function, something like:
73 * void led_set_state(enum led_colour_t colour, int on);
75 /************************************************************************
76 * Coloured LED functionality
77 ************************************************************************
78 * May be supplied by boards if desired
80 __weak void coloured_LED_init(void) {}
81 __weak void red_led_on(void) {}
82 __weak void red_led_off(void) {}
83 __weak void green_led_on(void) {}
84 __weak void green_led_off(void) {}
85 __weak void yellow_led_on(void) {}
86 __weak void yellow_led_off(void) {}
87 __weak void blue_led_on(void) {}
88 __weak void blue_led_off(void) {}
91 * Why is gd allocated a register? Prior to reloc it might be better to
92 * just pass it around to each function in this file?
94 * After reloc one could argue that it is hardly used and doesn't need
95 * to be in a register. Or if it is it should perhaps hold pointers to all
96 * global data for all modules, so that post-reloc we can avoid the massive
97 * literal pool we get on ARM. Or perhaps just encourage each module to use
101 #if defined(CONFIG_WATCHDOG) || defined(CONFIG_HW_WATCHDOG)
102 static int init_func_watchdog_init(void)
104 # if defined(CONFIG_HW_WATCHDOG) && \
105 (defined(CONFIG_M68K) || defined(CONFIG_MICROBLAZE) || \
106 defined(CONFIG_SH) || \
107 defined(CONFIG_DESIGNWARE_WATCHDOG) || \
108 defined(CONFIG_IMX_WATCHDOG))
110 puts(" Watchdog enabled\n");
117 int init_func_watchdog_reset(void)
123 #endif /* CONFIG_WATCHDOG */
125 __weak void board_add_ram_info(int use_default)
127 /* please define platform specific board_add_ram_info() */
130 static int init_baud_rate(void)
132 gd->baudrate = env_get_ulong("baudrate", 10, CONFIG_BAUDRATE);
136 static int display_text_info(void)
138 #if !defined(CONFIG_SANDBOX) && !defined(CONFIG_EFI_APP)
139 ulong bss_start, bss_end, text_base;
141 bss_start = (ulong)&__bss_start;
142 bss_end = (ulong)&__bss_end;
144 #ifdef CONFIG_SYS_TEXT_BASE
145 text_base = CONFIG_SYS_TEXT_BASE;
147 text_base = CONFIG_SYS_MONITOR_BASE;
150 debug("U-Boot code: %08lX -> %08lX BSS: -> %08lX\n",
151 text_base, bss_start, bss_end);
157 #ifdef CONFIG_SYSRESET
158 static int print_resetinfo(void)
164 ret = uclass_first_device_err(UCLASS_SYSRESET, &dev);
166 debug("%s: No sysreset device found (error: %d)\n",
168 /* Not all boards have sysreset drivers available during early
169 * boot, so don't fail if one can't be found.
174 if (!sysreset_get_status(dev, status, sizeof(status)))
175 printf("%s", status);
181 #if defined(CONFIG_DISPLAY_CPUINFO) && CONFIG_IS_ENABLED(CPU)
182 static int print_cpuinfo(void)
188 dev = cpu_get_current_dev();
190 debug("%s: Could not get CPU device\n",
195 ret = cpu_get_desc(dev, desc, sizeof(desc));
197 debug("%s: Could not get CPU description (err = %d)\n",
202 printf("CPU: %s\n", desc);
208 static int announce_dram_init(void)
214 static int show_dram_config(void)
216 unsigned long long size;
218 #ifdef CONFIG_NR_DRAM_BANKS
221 debug("\nRAM Configuration:\n");
222 for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
223 size += gd->bd->bi_dram[i].size;
224 debug("Bank #%d: %llx ", i,
225 (unsigned long long)(gd->bd->bi_dram[i].start));
227 print_size(gd->bd->bi_dram[i].size, "\n");
235 print_size(size, "");
236 board_add_ram_info(0);
242 __weak int dram_init_banksize(void)
244 #if defined(CONFIG_NR_DRAM_BANKS) && defined(CONFIG_SYS_SDRAM_BASE)
245 gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
246 gd->bd->bi_dram[0].size = get_effective_memsize();
252 #if defined(CONFIG_SYS_I2C)
253 static int init_func_i2c(void)
256 #ifdef CONFIG_SYS_I2C
259 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
266 #if defined(CONFIG_VID)
267 __weak int init_func_vid(void)
273 static int setup_mon_len(void)
275 #if defined(__ARM__) || defined(__MICROBLAZE__)
276 gd->mon_len = (ulong)&__bss_end - (ulong)_start;
277 #elif defined(CONFIG_SANDBOX) || defined(CONFIG_EFI_APP)
278 gd->mon_len = (ulong)&_end - (ulong)_init;
279 #elif defined(CONFIG_NIOS2) || defined(CONFIG_XTENSA)
280 gd->mon_len = CONFIG_SYS_MONITOR_LEN;
281 #elif defined(CONFIG_NDS32) || defined(CONFIG_SH) || defined(CONFIG_RISCV)
282 gd->mon_len = (ulong)(&__bss_end) - (ulong)(&_start);
283 #elif defined(CONFIG_SYS_MONITOR_BASE)
284 /* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */
285 gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE;
290 static int setup_spl_handoff(void)
292 #if CONFIG_IS_ENABLED(HANDOFF)
293 gd->spl_handoff = bloblist_find(BLOBLISTT_SPL_HANDOFF,
294 sizeof(struct spl_handoff));
295 debug("Found SPL hand-off info %p\n", gd->spl_handoff);
301 __weak int arch_cpu_init(void)
306 __weak int mach_cpu_init(void)
311 /* Get the top of usable RAM */
312 __weak ulong board_get_usable_ram_top(ulong total_size)
314 #if defined(CONFIG_SYS_SDRAM_BASE) && CONFIG_SYS_SDRAM_BASE > 0
316 * Detect whether we have so much RAM that it goes past the end of our
317 * 32-bit address space. If so, clip the usable RAM so it doesn't.
319 if (gd->ram_top < CONFIG_SYS_SDRAM_BASE)
321 * Will wrap back to top of 32-bit space when reservations
329 static int setup_dest_addr(void)
331 debug("Monitor len: %08lX\n", gd->mon_len);
333 * Ram is setup, size stored in gd !!
335 debug("Ram size: %08lX\n", (ulong)gd->ram_size);
336 #if defined(CONFIG_SYS_MEM_TOP_HIDE)
338 * Subtract specified amount of memory to hide so that it won't
339 * get "touched" at all by U-Boot. By fixing up gd->ram_size
340 * the Linux kernel should now get passed the now "corrected"
341 * memory size and won't touch it either. This should work
342 * for arch/ppc and arch/powerpc. Only Linux board ports in
343 * arch/powerpc with bootwrapper support, that recalculate the
344 * memory size from the SDRAM controller setup will have to
347 gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE;
349 #ifdef CONFIG_SYS_SDRAM_BASE
350 gd->ram_base = CONFIG_SYS_SDRAM_BASE;
352 gd->ram_top = gd->ram_base + get_effective_memsize();
353 gd->ram_top = board_get_usable_ram_top(gd->mon_len);
354 gd->relocaddr = gd->ram_top;
355 debug("Ram top: %08lX\n", (ulong)gd->ram_top);
356 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
358 * We need to make sure the location we intend to put secondary core
359 * boot code is reserved and not used by any part of u-boot
361 if (gd->relocaddr > determine_mp_bootpg(NULL)) {
362 gd->relocaddr = determine_mp_bootpg(NULL);
363 debug("Reserving MP boot page to %08lx\n", gd->relocaddr);
370 /* reserve protected RAM */
371 static int reserve_pram(void)
375 reg = env_get_ulong("pram", 10, CONFIG_PRAM);
376 gd->relocaddr -= (reg << 10); /* size is in kB */
377 debug("Reserving %ldk for protected RAM at %08lx\n", reg,
381 #endif /* CONFIG_PRAM */
383 /* Round memory pointer down to next 4 kB limit */
384 static int reserve_round_4k(void)
386 gd->relocaddr &= ~(4096 - 1);
390 __weak int arch_reserve_mmu(void)
395 static int reserve_video(void)
397 #ifdef CONFIG_DM_VIDEO
401 addr = gd->relocaddr;
402 ret = video_reserve(&addr);
405 gd->relocaddr = addr;
406 #elif defined(CONFIG_LCD)
407 # ifdef CONFIG_FB_ADDR
408 gd->fb_base = CONFIG_FB_ADDR;
410 /* reserve memory for LCD display (always full pages) */
411 gd->relocaddr = lcd_setmem(gd->relocaddr);
412 gd->fb_base = gd->relocaddr;
413 # endif /* CONFIG_FB_ADDR */
419 static int reserve_trace(void)
422 gd->relocaddr -= CONFIG_TRACE_BUFFER_SIZE;
423 gd->trace_buff = map_sysmem(gd->relocaddr, CONFIG_TRACE_BUFFER_SIZE);
424 debug("Reserving %luk for trace data at: %08lx\n",
425 (unsigned long)CONFIG_TRACE_BUFFER_SIZE >> 10, gd->relocaddr);
431 static int reserve_uboot(void)
433 if (!(gd->flags & GD_FLG_SKIP_RELOC)) {
435 * reserve memory for U-Boot code, data & bss
436 * round down to next 4 kB limit
438 gd->relocaddr -= gd->mon_len;
439 gd->relocaddr &= ~(4096 - 1);
440 #if defined(CONFIG_E500) || defined(CONFIG_MIPS)
441 /* round down to next 64 kB limit so that IVPR stays aligned */
442 gd->relocaddr &= ~(65536 - 1);
445 debug("Reserving %ldk for U-Boot at: %08lx\n",
446 gd->mon_len >> 10, gd->relocaddr);
449 gd->start_addr_sp = gd->relocaddr;
455 * reserve after start_addr_sp the requested size and make the stack pointer
456 * 16-byte aligned, this alignment is needed for cast on the reserved memory
457 * ref = x86_64 ABI: https://reviews.llvm.org/D30049: 16 bytes
458 * = ARMv8 Instruction Set Overview: quad word, 16 bytes
460 static unsigned long reserve_stack_aligned(size_t size)
462 return ALIGN_DOWN(gd->start_addr_sp - size, 16);
465 #ifdef CONFIG_SYS_NONCACHED_MEMORY
466 static int reserve_noncached(void)
469 * The value of gd->start_addr_sp must match the value of malloc_start
470 * calculated in boatrd_f.c:initr_malloc(), which is passed to
471 * board_r.c:mem_malloc_init() and then used by
472 * cache.c:noncached_init()
474 * These calculations must match the code in cache.c:noncached_init()
476 gd->start_addr_sp = ALIGN(gd->start_addr_sp, MMU_SECTION_SIZE) -
478 gd->start_addr_sp -= ALIGN(CONFIG_SYS_NONCACHED_MEMORY,
480 debug("Reserving %dM for noncached_alloc() at: %08lx\n",
481 CONFIG_SYS_NONCACHED_MEMORY >> 20, gd->start_addr_sp);
487 /* reserve memory for malloc() area */
488 static int reserve_malloc(void)
490 gd->start_addr_sp = reserve_stack_aligned(TOTAL_MALLOC_LEN);
491 debug("Reserving %dk for malloc() at: %08lx\n",
492 TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp);
493 #ifdef CONFIG_SYS_NONCACHED_MEMORY
500 /* (permanently) allocate a Board Info struct */
501 static int reserve_board(void)
504 gd->start_addr_sp = reserve_stack_aligned(sizeof(bd_t));
505 gd->bd = (bd_t *)map_sysmem(gd->start_addr_sp, sizeof(bd_t));
506 memset(gd->bd, '\0', sizeof(bd_t));
507 debug("Reserving %zu Bytes for Board Info at: %08lx\n",
508 sizeof(bd_t), gd->start_addr_sp);
513 static int setup_machine(void)
515 #ifdef CONFIG_MACH_TYPE
516 gd->bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */
521 static int reserve_global_data(void)
523 gd->start_addr_sp = reserve_stack_aligned(sizeof(gd_t));
524 gd->new_gd = (gd_t *)map_sysmem(gd->start_addr_sp, sizeof(gd_t));
525 debug("Reserving %zu Bytes for Global Data at: %08lx\n",
526 sizeof(gd_t), gd->start_addr_sp);
530 static int reserve_fdt(void)
532 #ifndef CONFIG_OF_EMBED
534 * If the device tree is sitting immediately above our image then we
535 * must relocate it. If it is embedded in the data section, then it
536 * will be relocated with other data.
539 gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob) + 0x1000, 32);
541 gd->start_addr_sp = reserve_stack_aligned(gd->fdt_size);
542 gd->new_fdt = map_sysmem(gd->start_addr_sp, gd->fdt_size);
543 debug("Reserving %lu Bytes for FDT at: %08lx\n",
544 gd->fdt_size, gd->start_addr_sp);
551 static int reserve_bootstage(void)
553 #ifdef CONFIG_BOOTSTAGE
554 int size = bootstage_get_size();
556 gd->start_addr_sp = reserve_stack_aligned(size);
557 gd->new_bootstage = map_sysmem(gd->start_addr_sp, size);
558 debug("Reserving %#x Bytes for bootstage at: %08lx\n", size,
565 __weak int arch_reserve_stacks(void)
570 static int reserve_stacks(void)
572 /* make stack pointer 16-byte aligned */
573 gd->start_addr_sp = reserve_stack_aligned(16);
576 * let the architecture-specific code tailor gd->start_addr_sp and
579 return arch_reserve_stacks();
582 static int reserve_bloblist(void)
584 #ifdef CONFIG_BLOBLIST
585 gd->start_addr_sp = reserve_stack_aligned(CONFIG_BLOBLIST_SIZE);
586 gd->new_bloblist = map_sysmem(gd->start_addr_sp, CONFIG_BLOBLIST_SIZE);
592 static int display_new_sp(void)
594 debug("New Stack Pointer is: %08lx\n", gd->start_addr_sp);
599 #if defined(CONFIG_M68K) || defined(CONFIG_MIPS) || defined(CONFIG_PPC) || \
601 static int setup_board_part1(void)
606 * Save local variables to board info struct
608 bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; /* start of memory */
609 bd->bi_memsize = gd->ram_size; /* size in bytes */
611 #ifdef CONFIG_SYS_SRAM_BASE
612 bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */
613 bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */
616 #if defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
617 bd->bi_immr_base = CONFIG_SYS_IMMR; /* base of IMMR register */
619 #if defined(CONFIG_M68K)
620 bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */
622 #if defined(CONFIG_MPC83xx)
623 bd->bi_immrbar = CONFIG_SYS_IMMR;
630 #if defined(CONFIG_PPC) || defined(CONFIG_M68K)
631 static int setup_board_part2(void)
635 bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */
636 bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */
637 #if defined(CONFIG_CPM2)
638 bd->bi_cpmfreq = gd->arch.cpm_clk;
639 bd->bi_brgfreq = gd->arch.brg_clk;
640 bd->bi_sccfreq = gd->arch.scc_clk;
641 bd->bi_vco = gd->arch.vco_out;
642 #endif /* CONFIG_CPM2 */
643 #if defined(CONFIG_M68K) && defined(CONFIG_PCI)
644 bd->bi_pcifreq = gd->pci_clk;
646 #if defined(CONFIG_EXTRA_CLOCK)
647 bd->bi_inpfreq = gd->arch.inp_clk; /* input Freq in Hz */
648 bd->bi_vcofreq = gd->arch.vco_clk; /* vco Freq in Hz */
649 bd->bi_flbfreq = gd->arch.flb_clk; /* flexbus Freq in Hz */
657 static int init_post(void)
659 post_bootmode_init();
660 post_run(NULL, POST_ROM | post_bootmode_get(0));
666 static int reloc_fdt(void)
668 #ifndef CONFIG_OF_EMBED
669 if (gd->flags & GD_FLG_SKIP_RELOC)
672 memcpy(gd->new_fdt, gd->fdt_blob, gd->fdt_size);
673 gd->fdt_blob = gd->new_fdt;
680 static int reloc_bootstage(void)
682 #ifdef CONFIG_BOOTSTAGE
683 if (gd->flags & GD_FLG_SKIP_RELOC)
685 if (gd->new_bootstage) {
686 int size = bootstage_get_size();
688 debug("Copying bootstage from %p to %p, size %x\n",
689 gd->bootstage, gd->new_bootstage, size);
690 memcpy(gd->new_bootstage, gd->bootstage, size);
691 gd->bootstage = gd->new_bootstage;
692 bootstage_relocate();
699 static int reloc_bloblist(void)
701 #ifdef CONFIG_BLOBLIST
702 if (gd->flags & GD_FLG_SKIP_RELOC)
704 if (gd->new_bloblist) {
705 int size = CONFIG_BLOBLIST_SIZE;
707 debug("Copying bloblist from %p to %p, size %x\n",
708 gd->bloblist, gd->new_bloblist, size);
709 memcpy(gd->new_bloblist, gd->bloblist, size);
710 gd->bloblist = gd->new_bloblist;
717 static int setup_reloc(void)
719 if (gd->flags & GD_FLG_SKIP_RELOC) {
720 debug("Skipping relocation due to flag\n");
724 #ifdef CONFIG_SYS_TEXT_BASE
726 gd->reloc_off = gd->relocaddr - (unsigned long)__image_copy_start;
727 #elif defined(CONFIG_M68K)
729 * On all ColdFire arch cpu, monitor code starts always
730 * just after the default vector table location, so at 0x400
732 gd->reloc_off = gd->relocaddr - (CONFIG_SYS_TEXT_BASE + 0x400);
733 #elif !defined(CONFIG_SANDBOX)
734 gd->reloc_off = gd->relocaddr - CONFIG_SYS_TEXT_BASE;
737 memcpy(gd->new_gd, (char *)gd, sizeof(gd_t));
739 debug("Relocation Offset is: %08lx\n", gd->reloc_off);
740 debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n",
741 gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd),
747 #ifdef CONFIG_OF_BOARD_FIXUP
748 static int fix_fdt(void)
750 return board_fix_fdt((void *)gd->fdt_blob);
754 /* ARM calls relocate_code from its crt0.S */
755 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
756 !CONFIG_IS_ENABLED(X86_64)
758 static int jump_to_copy(void)
760 if (gd->flags & GD_FLG_SKIP_RELOC)
763 * x86 is special, but in a nice way. It uses a trampoline which
764 * enables the dcache if possible.
766 * For now, other archs use relocate_code(), which is implemented
767 * similarly for all archs. When we do generic relocation, hopefully
768 * we can make all archs enable the dcache prior to relocation.
770 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
772 * SDRAM and console are now initialised. The final stack can now
773 * be setup in SDRAM. Code execution will continue in Flash, but
774 * with the stack in SDRAM and Global Data in temporary memory
777 arch_setup_gd(gd->new_gd);
778 board_init_f_r_trampoline(gd->start_addr_sp);
780 relocate_code(gd->start_addr_sp, gd->new_gd, gd->relocaddr);
787 /* Record the board_init_f() bootstage (after arch_cpu_init()) */
788 static int initf_bootstage(void)
790 bool from_spl = IS_ENABLED(CONFIG_SPL_BOOTSTAGE) &&
791 IS_ENABLED(CONFIG_BOOTSTAGE_STASH);
794 ret = bootstage_init(!from_spl);
798 const void *stash = map_sysmem(CONFIG_BOOTSTAGE_STASH_ADDR,
799 CONFIG_BOOTSTAGE_STASH_SIZE);
801 ret = bootstage_unstash(stash, CONFIG_BOOTSTAGE_STASH_SIZE);
802 if (ret && ret != -ENOENT) {
803 debug("Failed to unstash bootstage: err=%d\n", ret);
808 bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f");
813 static int initf_console_record(void)
815 #if defined(CONFIG_CONSOLE_RECORD) && CONFIG_VAL(SYS_MALLOC_F_LEN)
816 return console_record_init();
822 static int initf_dm(void)
824 #if defined(CONFIG_DM) && CONFIG_VAL(SYS_MALLOC_F_LEN)
827 bootstage_start(BOOTSTAGE_ID_ACCUM_DM_F, "dm_f");
828 ret = dm_init_and_scan(true);
829 bootstage_accum(BOOTSTAGE_ID_ACCUM_DM_F);
833 #ifdef CONFIG_TIMER_EARLY
834 ret = dm_timer_init();
842 /* Architecture-specific memory reservation */
843 __weak int reserve_arch(void)
848 __weak int arch_cpu_init_dm(void)
853 __weak int checkcpu(void)
858 __weak int clear_bss(void)
863 static const init_fnc_t init_sequence_f[] = {
865 #ifdef CONFIG_OF_CONTROL
868 #ifdef CONFIG_TRACE_EARLY
873 initf_bootstage, /* uses its own timer, so does not need DM */
874 #ifdef CONFIG_BLOBLIST
878 initf_console_record,
879 #if defined(CONFIG_HAVE_FSP)
882 arch_cpu_init, /* basic arch cpu dependent setup */
883 mach_cpu_init, /* SoC/machine dependent CPU setup */
886 #if defined(CONFIG_BOARD_EARLY_INIT_F)
889 #if defined(CONFIG_PPC) || defined(CONFIG_SYS_FSL_CLK) || defined(CONFIG_M68K)
890 /* get CPU and bus clocks according to the environment variable */
891 get_clocks, /* get CPU and bus clocks (etc.) */
893 #if !defined(CONFIG_M68K)
894 timer_init, /* initialize timer */
896 #if defined(CONFIG_BOARD_POSTCLK_INIT)
899 env_init, /* initialize environment */
900 init_baud_rate, /* initialze baudrate settings */
901 serial_init, /* serial communications setup */
902 console_init_f, /* stage 1 init of console */
903 display_options, /* say that we are here */
904 display_text_info, /* show debugging info if required */
906 #if defined(CONFIG_SYSRESET)
909 #if defined(CONFIG_DISPLAY_CPUINFO)
910 print_cpuinfo, /* display cpu info (and speed) */
912 #if defined(CONFIG_DTB_RESELECT)
915 #if defined(CONFIG_DISPLAY_BOARDINFO)
918 INIT_FUNC_WATCHDOG_INIT
919 #if defined(CONFIG_MISC_INIT_F)
922 INIT_FUNC_WATCHDOG_RESET
923 #if defined(CONFIG_SYS_I2C)
926 #if defined(CONFIG_VID) && !defined(CONFIG_SPL)
930 dram_init, /* configure available RAM banks */
934 INIT_FUNC_WATCHDOG_RESET
935 #if defined(CONFIG_SYS_DRAM_TEST)
937 #endif /* CONFIG_SYS_DRAM_TEST */
938 INIT_FUNC_WATCHDOG_RESET
943 INIT_FUNC_WATCHDOG_RESET
945 * Now that we have DRAM mapped and working, we can
946 * relocate the code and continue running from DRAM.
948 * Reserve memory at end of RAM for (top down in that order):
949 * - area that won't get touched by U-Boot and Linux (optional)
950 * - kernel log buffer
954 * - board info struct
976 #if defined(CONFIG_M68K) || defined(CONFIG_MIPS) || defined(CONFIG_PPC) || \
980 #if defined(CONFIG_PPC) || defined(CONFIG_M68K)
981 INIT_FUNC_WATCHDOG_RESET
985 #ifdef CONFIG_OF_BOARD_FIXUP
988 INIT_FUNC_WATCHDOG_RESET
993 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
998 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
999 !CONFIG_IS_ENABLED(X86_64)
1005 void board_init_f(ulong boot_flags)
1007 gd->flags = boot_flags;
1008 gd->have_console = 0;
1010 if (initcall_run_list(init_sequence_f))
1013 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
1014 !defined(CONFIG_EFI_APP) && !CONFIG_IS_ENABLED(X86_64) && \
1015 !defined(CONFIG_ARC)
1016 /* NOTREACHED - jump_to_copy() does not return */
1021 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
1023 * For now this code is only used on x86.
1025 * init_sequence_f_r is the list of init functions which are run when
1026 * U-Boot is executing from Flash with a semi-limited 'C' environment.
1027 * The following limitations must be considered when implementing an
1029 * - 'static' variables are read-only
1030 * - Global Data (gd->xxx) is read/write
1032 * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if
1033 * supported). It _should_, if possible, copy global data to RAM and
1034 * initialise the CPU caches (to speed up the relocation process)
1036 * NOTE: At present only x86 uses this route, but it is intended that
1037 * all archs will move to this when generic relocation is implemented.
1039 static const init_fnc_t init_sequence_f_r[] = {
1040 #if !CONFIG_IS_ENABLED(X86_64)
1047 void board_init_f_r(void)
1049 if (initcall_run_list(init_sequence_f_r))
1053 * The pre-relocation drivers may be using memory that has now gone
1054 * away. Mark serial as unavailable - this will fall back to the debug
1055 * UART if available.
1057 * Do the same with log drivers since the memory may not be available.
1059 gd->flags &= ~(GD_FLG_SERIAL_READY | GD_FLG_LOG_READY);
1065 * U-Boot has been copied into SDRAM, the BSS has been cleared etc.
1066 * Transfer execution from Flash to RAM by calculating the address
1067 * of the in-RAM copy of board_init_r() and calling it
1069 (board_init_r + gd->reloc_off)((gd_t *)gd, gd->relocaddr);
1071 /* NOTREACHED - board_init_r() does not return */
1074 #endif /* CONFIG_X86 */