1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (c) 2011 The Chromium OS Authors.
4 * (C) Copyright 2002-2006
5 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
8 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
9 * Marius Groeger <mgroeger@sysgo.de>
17 #include <environment.h>
31 #include <status_led.h>
37 #ifdef CONFIG_MACH_TYPE
38 #include <asm/mach-types.h>
40 #if defined(CONFIG_MP) && defined(CONFIG_PPC)
44 #include <asm/sections.h>
46 #include <linux/errno.h>
49 * Pointer to initial global data area
51 * Here we initialize it if needed.
53 #ifdef XTRN_DECLARE_GLOBAL_DATA_PTR
54 #undef XTRN_DECLARE_GLOBAL_DATA_PTR
55 #define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */
56 DECLARE_GLOBAL_DATA_PTR = (gd_t *)(CONFIG_SYS_INIT_GD_ADDR);
58 DECLARE_GLOBAL_DATA_PTR;
62 * TODO(sjg@chromium.org): IMO this code should be
63 * refactored to a single function, something like:
65 * void led_set_state(enum led_colour_t colour, int on);
67 /************************************************************************
68 * Coloured LED functionality
69 ************************************************************************
70 * May be supplied by boards if desired
72 __weak void coloured_LED_init(void) {}
73 __weak void red_led_on(void) {}
74 __weak void red_led_off(void) {}
75 __weak void green_led_on(void) {}
76 __weak void green_led_off(void) {}
77 __weak void yellow_led_on(void) {}
78 __weak void yellow_led_off(void) {}
79 __weak void blue_led_on(void) {}
80 __weak void blue_led_off(void) {}
83 * Why is gd allocated a register? Prior to reloc it might be better to
84 * just pass it around to each function in this file?
86 * After reloc one could argue that it is hardly used and doesn't need
87 * to be in a register. Or if it is it should perhaps hold pointers to all
88 * global data for all modules, so that post-reloc we can avoid the massive
89 * literal pool we get on ARM. Or perhaps just encourage each module to use
93 #if defined(CONFIG_WATCHDOG) || defined(CONFIG_HW_WATCHDOG)
94 static int init_func_watchdog_init(void)
96 # if defined(CONFIG_HW_WATCHDOG) && \
97 (defined(CONFIG_M68K) || defined(CONFIG_MICROBLAZE) || \
98 defined(CONFIG_SH) || \
99 defined(CONFIG_DESIGNWARE_WATCHDOG) || \
100 defined(CONFIG_IMX_WATCHDOG))
102 puts(" Watchdog enabled\n");
109 int init_func_watchdog_reset(void)
115 #endif /* CONFIG_WATCHDOG */
117 __weak void board_add_ram_info(int use_default)
119 /* please define platform specific board_add_ram_info() */
122 static int init_baud_rate(void)
124 gd->baudrate = env_get_ulong("baudrate", 10, CONFIG_BAUDRATE);
128 static int display_text_info(void)
130 #if !defined(CONFIG_SANDBOX) && !defined(CONFIG_EFI_APP)
131 ulong bss_start, bss_end, text_base;
133 bss_start = (ulong)&__bss_start;
134 bss_end = (ulong)&__bss_end;
136 #ifdef CONFIG_SYS_TEXT_BASE
137 text_base = CONFIG_SYS_TEXT_BASE;
139 text_base = CONFIG_SYS_MONITOR_BASE;
142 debug("U-Boot code: %08lX -> %08lX BSS: -> %08lX\n",
143 text_base, bss_start, bss_end);
149 #ifdef CONFIG_SYSRESET
150 static int print_resetinfo(void)
156 ret = uclass_first_device_err(UCLASS_SYSRESET, &dev);
158 debug("%s: No sysreset device found (error: %d)\n",
160 /* Not all boards have sysreset drivers available during early
161 * boot, so don't fail if one can't be found.
166 if (!sysreset_get_status(dev, status, sizeof(status)))
167 printf("%s", status);
173 #if defined(CONFIG_DISPLAY_CPUINFO) && CONFIG_IS_ENABLED(CPU)
174 static int print_cpuinfo(void)
180 ret = uclass_first_device_err(UCLASS_CPU, &dev);
182 debug("%s: Could not get CPU device (err = %d)\n",
187 ret = cpu_get_desc(dev, desc, sizeof(desc));
189 debug("%s: Could not get CPU description (err = %d)\n",
194 printf("CPU: %s\n", desc);
200 static int announce_dram_init(void)
206 static int show_dram_config(void)
208 unsigned long long size;
210 #ifdef CONFIG_NR_DRAM_BANKS
213 debug("\nRAM Configuration:\n");
214 for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
215 size += gd->bd->bi_dram[i].size;
216 debug("Bank #%d: %llx ", i,
217 (unsigned long long)(gd->bd->bi_dram[i].start));
219 print_size(gd->bd->bi_dram[i].size, "\n");
227 print_size(size, "");
228 board_add_ram_info(0);
234 __weak int dram_init_banksize(void)
236 #if defined(CONFIG_NR_DRAM_BANKS) && defined(CONFIG_SYS_SDRAM_BASE)
237 gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
238 gd->bd->bi_dram[0].size = get_effective_memsize();
244 #if defined(CONFIG_SYS_I2C)
245 static int init_func_i2c(void)
248 #ifdef CONFIG_SYS_I2C
251 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
258 #if defined(CONFIG_VID)
259 __weak int init_func_vid(void)
265 static int setup_mon_len(void)
267 #if defined(__ARM__) || defined(__MICROBLAZE__)
268 gd->mon_len = (ulong)&__bss_end - (ulong)_start;
269 #elif defined(CONFIG_SANDBOX) || defined(CONFIG_EFI_APP)
270 gd->mon_len = (ulong)&_end - (ulong)_init;
271 #elif defined(CONFIG_NIOS2) || defined(CONFIG_XTENSA)
272 gd->mon_len = CONFIG_SYS_MONITOR_LEN;
273 #elif defined(CONFIG_NDS32) || defined(CONFIG_SH) || defined(CONFIG_RISCV)
274 gd->mon_len = (ulong)(&__bss_end) - (ulong)(&_start);
275 #elif defined(CONFIG_SYS_MONITOR_BASE)
276 /* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */
277 gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE;
282 static int setup_spl_handoff(void)
284 #if CONFIG_IS_ENABLED(HANDOFF)
285 gd->spl_handoff = bloblist_find(BLOBLISTT_SPL_HANDOFF,
286 sizeof(struct spl_handoff));
287 debug("Found SPL hand-off info %p\n", gd->spl_handoff);
293 __weak int arch_cpu_init(void)
298 __weak int mach_cpu_init(void)
303 /* Get the top of usable RAM */
304 __weak ulong board_get_usable_ram_top(ulong total_size)
306 #ifdef CONFIG_SYS_SDRAM_BASE
308 * Detect whether we have so much RAM that it goes past the end of our
309 * 32-bit address space. If so, clip the usable RAM so it doesn't.
311 if (gd->ram_top < CONFIG_SYS_SDRAM_BASE)
313 * Will wrap back to top of 32-bit space when reservations
321 static int setup_dest_addr(void)
323 debug("Monitor len: %08lX\n", gd->mon_len);
325 * Ram is setup, size stored in gd !!
327 debug("Ram size: %08lX\n", (ulong)gd->ram_size);
328 #if defined(CONFIG_SYS_MEM_TOP_HIDE)
330 * Subtract specified amount of memory to hide so that it won't
331 * get "touched" at all by U-Boot. By fixing up gd->ram_size
332 * the Linux kernel should now get passed the now "corrected"
333 * memory size and won't touch it either. This should work
334 * for arch/ppc and arch/powerpc. Only Linux board ports in
335 * arch/powerpc with bootwrapper support, that recalculate the
336 * memory size from the SDRAM controller setup will have to
339 gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE;
341 #ifdef CONFIG_SYS_SDRAM_BASE
342 gd->ram_base = CONFIG_SYS_SDRAM_BASE;
344 gd->ram_top = gd->ram_base + get_effective_memsize();
345 gd->ram_top = board_get_usable_ram_top(gd->mon_len);
346 gd->relocaddr = gd->ram_top;
347 debug("Ram top: %08lX\n", (ulong)gd->ram_top);
348 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
350 * We need to make sure the location we intend to put secondary core
351 * boot code is reserved and not used by any part of u-boot
353 if (gd->relocaddr > determine_mp_bootpg(NULL)) {
354 gd->relocaddr = determine_mp_bootpg(NULL);
355 debug("Reserving MP boot page to %08lx\n", gd->relocaddr);
362 /* reserve protected RAM */
363 static int reserve_pram(void)
367 reg = env_get_ulong("pram", 10, CONFIG_PRAM);
368 gd->relocaddr -= (reg << 10); /* size is in kB */
369 debug("Reserving %ldk for protected RAM at %08lx\n", reg,
373 #endif /* CONFIG_PRAM */
375 /* Round memory pointer down to next 4 kB limit */
376 static int reserve_round_4k(void)
378 gd->relocaddr &= ~(4096 - 1);
383 __weak int reserve_mmu(void)
385 #if !(CONFIG_IS_ENABLED(SYS_ICACHE_OFF) && CONFIG_IS_ENABLED(SYS_DCACHE_OFF))
386 /* reserve TLB table */
387 gd->arch.tlb_size = PGTABLE_SIZE;
388 gd->relocaddr -= gd->arch.tlb_size;
390 /* round down to next 64 kB limit */
391 gd->relocaddr &= ~(0x10000 - 1);
393 gd->arch.tlb_addr = gd->relocaddr;
394 debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr,
395 gd->arch.tlb_addr + gd->arch.tlb_size);
397 #ifdef CONFIG_SYS_MEM_RESERVE_SECURE
399 * Record allocated tlb_addr in case gd->tlb_addr to be overwritten
400 * with location within secure ram.
402 gd->arch.tlb_allocated = gd->arch.tlb_addr;
410 static int reserve_video(void)
412 #ifdef CONFIG_DM_VIDEO
416 addr = gd->relocaddr;
417 ret = video_reserve(&addr);
420 gd->relocaddr = addr;
421 #elif defined(CONFIG_LCD)
422 # ifdef CONFIG_FB_ADDR
423 gd->fb_base = CONFIG_FB_ADDR;
425 /* reserve memory for LCD display (always full pages) */
426 gd->relocaddr = lcd_setmem(gd->relocaddr);
427 gd->fb_base = gd->relocaddr;
428 # endif /* CONFIG_FB_ADDR */
429 #elif defined(CONFIG_VIDEO) && \
430 (!defined(CONFIG_PPC)) && \
431 !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \
432 !defined(CONFIG_M68K)
433 /* reserve memory for video display (always full pages) */
434 gd->relocaddr = video_setmem(gd->relocaddr);
435 gd->fb_base = gd->relocaddr;
441 static int reserve_trace(void)
444 gd->relocaddr -= CONFIG_TRACE_BUFFER_SIZE;
445 gd->trace_buff = map_sysmem(gd->relocaddr, CONFIG_TRACE_BUFFER_SIZE);
446 debug("Reserving %luk for trace data at: %08lx\n",
447 (unsigned long)CONFIG_TRACE_BUFFER_SIZE >> 10, gd->relocaddr);
453 static int reserve_uboot(void)
455 if (!(gd->flags & GD_FLG_SKIP_RELOC)) {
457 * reserve memory for U-Boot code, data & bss
458 * round down to next 4 kB limit
460 gd->relocaddr -= gd->mon_len;
461 gd->relocaddr &= ~(4096 - 1);
462 #if defined(CONFIG_E500) || defined(CONFIG_MIPS)
463 /* round down to next 64 kB limit so that IVPR stays aligned */
464 gd->relocaddr &= ~(65536 - 1);
467 debug("Reserving %ldk for U-Boot at: %08lx\n",
468 gd->mon_len >> 10, gd->relocaddr);
471 gd->start_addr_sp = gd->relocaddr;
476 /* reserve memory for malloc() area */
477 static int reserve_malloc(void)
479 gd->start_addr_sp = gd->start_addr_sp - TOTAL_MALLOC_LEN;
480 debug("Reserving %dk for malloc() at: %08lx\n",
481 TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp);
485 /* (permanently) allocate a Board Info struct */
486 static int reserve_board(void)
489 gd->start_addr_sp -= sizeof(bd_t);
490 gd->bd = (bd_t *)map_sysmem(gd->start_addr_sp, sizeof(bd_t));
491 memset(gd->bd, '\0', sizeof(bd_t));
492 debug("Reserving %zu Bytes for Board Info at: %08lx\n",
493 sizeof(bd_t), gd->start_addr_sp);
498 static int setup_machine(void)
500 #ifdef CONFIG_MACH_TYPE
501 gd->bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */
506 static int reserve_global_data(void)
508 gd->start_addr_sp -= sizeof(gd_t);
509 gd->new_gd = (gd_t *)map_sysmem(gd->start_addr_sp, sizeof(gd_t));
510 debug("Reserving %zu Bytes for Global Data at: %08lx\n",
511 sizeof(gd_t), gd->start_addr_sp);
515 static int reserve_fdt(void)
517 #ifndef CONFIG_OF_EMBED
519 * If the device tree is sitting immediately above our image then we
520 * must relocate it. If it is embedded in the data section, then it
521 * will be relocated with other data.
524 gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob) + 0x1000, 32);
526 gd->start_addr_sp -= gd->fdt_size;
527 gd->new_fdt = map_sysmem(gd->start_addr_sp, gd->fdt_size);
528 debug("Reserving %lu Bytes for FDT at: %08lx\n",
529 gd->fdt_size, gd->start_addr_sp);
536 static int reserve_bootstage(void)
538 #ifdef CONFIG_BOOTSTAGE
539 int size = bootstage_get_size();
541 gd->start_addr_sp -= size;
542 gd->new_bootstage = map_sysmem(gd->start_addr_sp, size);
543 debug("Reserving %#x Bytes for bootstage at: %08lx\n", size,
550 __weak int arch_reserve_stacks(void)
555 static int reserve_stacks(void)
557 /* make stack pointer 16-byte aligned */
558 gd->start_addr_sp -= 16;
559 gd->start_addr_sp &= ~0xf;
562 * let the architecture-specific code tailor gd->start_addr_sp and
565 return arch_reserve_stacks();
568 static int reserve_bloblist(void)
570 #ifdef CONFIG_BLOBLIST
571 gd->start_addr_sp -= CONFIG_BLOBLIST_SIZE;
572 gd->new_bloblist = map_sysmem(gd->start_addr_sp, CONFIG_BLOBLIST_SIZE);
578 static int display_new_sp(void)
580 debug("New Stack Pointer is: %08lx\n", gd->start_addr_sp);
585 #if defined(CONFIG_M68K) || defined(CONFIG_MIPS) || defined(CONFIG_PPC) || \
587 static int setup_board_part1(void)
592 * Save local variables to board info struct
594 bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; /* start of memory */
595 bd->bi_memsize = gd->ram_size; /* size in bytes */
597 #ifdef CONFIG_SYS_SRAM_BASE
598 bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */
599 bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */
602 #if defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
603 bd->bi_immr_base = CONFIG_SYS_IMMR; /* base of IMMR register */
605 #if defined(CONFIG_M68K)
606 bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */
608 #if defined(CONFIG_MPC83xx)
609 bd->bi_immrbar = CONFIG_SYS_IMMR;
616 #if defined(CONFIG_PPC) || defined(CONFIG_M68K)
617 static int setup_board_part2(void)
621 bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */
622 bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */
623 #if defined(CONFIG_CPM2)
624 bd->bi_cpmfreq = gd->arch.cpm_clk;
625 bd->bi_brgfreq = gd->arch.brg_clk;
626 bd->bi_sccfreq = gd->arch.scc_clk;
627 bd->bi_vco = gd->arch.vco_out;
628 #endif /* CONFIG_CPM2 */
629 #if defined(CONFIG_M68K) && defined(CONFIG_PCI)
630 bd->bi_pcifreq = gd->pci_clk;
632 #if defined(CONFIG_EXTRA_CLOCK)
633 bd->bi_inpfreq = gd->arch.inp_clk; /* input Freq in Hz */
634 bd->bi_vcofreq = gd->arch.vco_clk; /* vco Freq in Hz */
635 bd->bi_flbfreq = gd->arch.flb_clk; /* flexbus Freq in Hz */
643 static int init_post(void)
645 post_bootmode_init();
646 post_run(NULL, POST_ROM | post_bootmode_get(0));
652 static int reloc_fdt(void)
654 #ifndef CONFIG_OF_EMBED
655 if (gd->flags & GD_FLG_SKIP_RELOC)
658 memcpy(gd->new_fdt, gd->fdt_blob, gd->fdt_size);
659 gd->fdt_blob = gd->new_fdt;
666 static int reloc_bootstage(void)
668 #ifdef CONFIG_BOOTSTAGE
669 if (gd->flags & GD_FLG_SKIP_RELOC)
671 if (gd->new_bootstage) {
672 int size = bootstage_get_size();
674 debug("Copying bootstage from %p to %p, size %x\n",
675 gd->bootstage, gd->new_bootstage, size);
676 memcpy(gd->new_bootstage, gd->bootstage, size);
677 gd->bootstage = gd->new_bootstage;
684 static int reloc_bloblist(void)
686 #ifdef CONFIG_BLOBLIST
687 if (gd->flags & GD_FLG_SKIP_RELOC)
689 if (gd->new_bloblist) {
690 int size = CONFIG_BLOBLIST_SIZE;
692 debug("Copying bloblist from %p to %p, size %x\n",
693 gd->bloblist, gd->new_bloblist, size);
694 memcpy(gd->new_bloblist, gd->bloblist, size);
695 gd->bloblist = gd->new_bloblist;
702 static int setup_reloc(void)
704 if (gd->flags & GD_FLG_SKIP_RELOC) {
705 debug("Skipping relocation due to flag\n");
709 #ifdef CONFIG_SYS_TEXT_BASE
711 gd->reloc_off = gd->relocaddr - (unsigned long)__image_copy_start;
712 #elif defined(CONFIG_M68K)
714 * On all ColdFire arch cpu, monitor code starts always
715 * just after the default vector table location, so at 0x400
717 gd->reloc_off = gd->relocaddr - (CONFIG_SYS_TEXT_BASE + 0x400);
718 #elif !defined(CONFIG_SANDBOX)
719 gd->reloc_off = gd->relocaddr - CONFIG_SYS_TEXT_BASE;
722 memcpy(gd->new_gd, (char *)gd, sizeof(gd_t));
724 debug("Relocation Offset is: %08lx\n", gd->reloc_off);
725 debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n",
726 gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd),
732 #ifdef CONFIG_OF_BOARD_FIXUP
733 static int fix_fdt(void)
735 return board_fix_fdt((void *)gd->fdt_blob);
739 /* ARM calls relocate_code from its crt0.S */
740 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
741 !CONFIG_IS_ENABLED(X86_64)
743 static int jump_to_copy(void)
745 if (gd->flags & GD_FLG_SKIP_RELOC)
748 * x86 is special, but in a nice way. It uses a trampoline which
749 * enables the dcache if possible.
751 * For now, other archs use relocate_code(), which is implemented
752 * similarly for all archs. When we do generic relocation, hopefully
753 * we can make all archs enable the dcache prior to relocation.
755 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
757 * SDRAM and console are now initialised. The final stack can now
758 * be setup in SDRAM. Code execution will continue in Flash, but
759 * with the stack in SDRAM and Global Data in temporary memory
762 arch_setup_gd(gd->new_gd);
763 board_init_f_r_trampoline(gd->start_addr_sp);
765 relocate_code(gd->start_addr_sp, gd->new_gd, gd->relocaddr);
772 /* Record the board_init_f() bootstage (after arch_cpu_init()) */
773 static int initf_bootstage(void)
775 bool from_spl = IS_ENABLED(CONFIG_SPL_BOOTSTAGE) &&
776 IS_ENABLED(CONFIG_BOOTSTAGE_STASH);
779 ret = bootstage_init(!from_spl);
783 const void *stash = map_sysmem(CONFIG_BOOTSTAGE_STASH_ADDR,
784 CONFIG_BOOTSTAGE_STASH_SIZE);
786 ret = bootstage_unstash(stash, CONFIG_BOOTSTAGE_STASH_SIZE);
787 if (ret && ret != -ENOENT) {
788 debug("Failed to unstash bootstage: err=%d\n", ret);
793 bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f");
798 static int initf_console_record(void)
800 #if defined(CONFIG_CONSOLE_RECORD) && CONFIG_VAL(SYS_MALLOC_F_LEN)
801 return console_record_init();
807 static int initf_dm(void)
809 #if defined(CONFIG_DM) && CONFIG_VAL(SYS_MALLOC_F_LEN)
812 bootstage_start(BOOTSTATE_ID_ACCUM_DM_F, "dm_f");
813 ret = dm_init_and_scan(true);
814 bootstage_accum(BOOTSTATE_ID_ACCUM_DM_F);
818 #ifdef CONFIG_TIMER_EARLY
819 ret = dm_timer_init();
827 /* Architecture-specific memory reservation */
828 __weak int reserve_arch(void)
833 __weak int arch_cpu_init_dm(void)
838 static const init_fnc_t init_sequence_f[] = {
840 #ifdef CONFIG_OF_CONTROL
843 #ifdef CONFIG_TRACE_EARLY
848 initf_bootstage, /* uses its own timer, so does not need DM */
849 #ifdef CONFIG_BLOBLIST
853 initf_console_record,
854 #if defined(CONFIG_HAVE_FSP)
857 arch_cpu_init, /* basic arch cpu dependent setup */
858 mach_cpu_init, /* SoC/machine dependent CPU setup */
861 #if defined(CONFIG_BOARD_EARLY_INIT_F)
864 #if defined(CONFIG_PPC) || defined(CONFIG_SYS_FSL_CLK) || defined(CONFIG_M68K)
865 /* get CPU and bus clocks according to the environment variable */
866 get_clocks, /* get CPU and bus clocks (etc.) */
868 #if !defined(CONFIG_M68K)
869 timer_init, /* initialize timer */
871 #if defined(CONFIG_BOARD_POSTCLK_INIT)
874 env_init, /* initialize environment */
875 init_baud_rate, /* initialze baudrate settings */
876 serial_init, /* serial communications setup */
877 console_init_f, /* stage 1 init of console */
878 display_options, /* say that we are here */
879 display_text_info, /* show debugging info if required */
880 #if defined(CONFIG_PPC) || defined(CONFIG_SH) || defined(CONFIG_X86)
883 #if defined(CONFIG_SYSRESET)
886 #if defined(CONFIG_DISPLAY_CPUINFO)
887 print_cpuinfo, /* display cpu info (and speed) */
889 #if defined(CONFIG_DTB_RESELECT)
892 #if defined(CONFIG_DISPLAY_BOARDINFO)
895 INIT_FUNC_WATCHDOG_INIT
896 #if defined(CONFIG_MISC_INIT_F)
899 INIT_FUNC_WATCHDOG_RESET
900 #if defined(CONFIG_SYS_I2C)
903 #if defined(CONFIG_VID) && !defined(CONFIG_SPL)
907 dram_init, /* configure available RAM banks */
911 INIT_FUNC_WATCHDOG_RESET
912 #if defined(CONFIG_SYS_DRAM_TEST)
914 #endif /* CONFIG_SYS_DRAM_TEST */
915 INIT_FUNC_WATCHDOG_RESET
920 INIT_FUNC_WATCHDOG_RESET
922 * Now that we have DRAM mapped and working, we can
923 * relocate the code and continue running from DRAM.
925 * Reserve memory at end of RAM for (top down in that order):
926 * - area that won't get touched by U-Boot and Linux (optional)
927 * - kernel log buffer
931 * - board info struct
955 #if defined(CONFIG_M68K) || defined(CONFIG_MIPS) || defined(CONFIG_PPC) || \
959 #if defined(CONFIG_PPC) || defined(CONFIG_M68K)
960 INIT_FUNC_WATCHDOG_RESET
964 #ifdef CONFIG_OF_BOARD_FIXUP
967 INIT_FUNC_WATCHDOG_RESET
972 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
977 #if defined(CONFIG_XTENSA)
980 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
981 !CONFIG_IS_ENABLED(X86_64)
987 void board_init_f(ulong boot_flags)
989 gd->flags = boot_flags;
990 gd->have_console = 0;
992 if (initcall_run_list(init_sequence_f))
995 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
996 !defined(CONFIG_EFI_APP) && !CONFIG_IS_ENABLED(X86_64) && \
998 /* NOTREACHED - jump_to_copy() does not return */
1003 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
1005 * For now this code is only used on x86.
1007 * init_sequence_f_r is the list of init functions which are run when
1008 * U-Boot is executing from Flash with a semi-limited 'C' environment.
1009 * The following limitations must be considered when implementing an
1011 * - 'static' variables are read-only
1012 * - Global Data (gd->xxx) is read/write
1014 * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if
1015 * supported). It _should_, if possible, copy global data to RAM and
1016 * initialise the CPU caches (to speed up the relocation process)
1018 * NOTE: At present only x86 uses this route, but it is intended that
1019 * all archs will move to this when generic relocation is implemented.
1021 static const init_fnc_t init_sequence_f_r[] = {
1022 #if !CONFIG_IS_ENABLED(X86_64)
1029 void board_init_f_r(void)
1031 if (initcall_run_list(init_sequence_f_r))
1035 * The pre-relocation drivers may be using memory that has now gone
1036 * away. Mark serial as unavailable - this will fall back to the debug
1037 * UART if available.
1039 * Do the same with log drivers since the memory may not be available.
1041 gd->flags &= ~(GD_FLG_SERIAL_READY | GD_FLG_LOG_READY);
1047 * U-Boot has been copied into SDRAM, the BSS has been cleared etc.
1048 * Transfer execution from Flash to RAM by calculating the address
1049 * of the in-RAM copy of board_init_r() and calling it
1051 (board_init_r + gd->reloc_off)((gd_t *)gd, gd->relocaddr);
1053 /* NOTREACHED - board_init_r() does not return */
1056 #endif /* CONFIG_X86 */