1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (c) 2011 The Chromium OS Authors.
4 * (C) Copyright 2002-2006
5 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
8 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
9 * Marius Groeger <mgroeger@sysgo.de>
19 #include <env_internal.h>
35 #include <status_led.h>
41 #ifdef CONFIG_MACH_TYPE
42 #include <asm/mach-types.h>
44 #if defined(CONFIG_MP) && defined(CONFIG_PPC)
48 #include <asm/sections.h>
50 #include <linux/errno.h>
53 * Pointer to initial global data area
55 * Here we initialize it if needed.
57 #ifdef XTRN_DECLARE_GLOBAL_DATA_PTR
58 #undef XTRN_DECLARE_GLOBAL_DATA_PTR
59 #define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */
60 DECLARE_GLOBAL_DATA_PTR = (gd_t *)(CONFIG_SYS_INIT_GD_ADDR);
62 DECLARE_GLOBAL_DATA_PTR;
66 * TODO(sjg@chromium.org): IMO this code should be
67 * refactored to a single function, something like:
69 * void led_set_state(enum led_colour_t colour, int on);
71 /************************************************************************
72 * Coloured LED functionality
73 ************************************************************************
74 * May be supplied by boards if desired
76 __weak void coloured_LED_init(void) {}
77 __weak void red_led_on(void) {}
78 __weak void red_led_off(void) {}
79 __weak void green_led_on(void) {}
80 __weak void green_led_off(void) {}
81 __weak void yellow_led_on(void) {}
82 __weak void yellow_led_off(void) {}
83 __weak void blue_led_on(void) {}
84 __weak void blue_led_off(void) {}
87 * Why is gd allocated a register? Prior to reloc it might be better to
88 * just pass it around to each function in this file?
90 * After reloc one could argue that it is hardly used and doesn't need
91 * to be in a register. Or if it is it should perhaps hold pointers to all
92 * global data for all modules, so that post-reloc we can avoid the massive
93 * literal pool we get on ARM. Or perhaps just encourage each module to use
97 #if defined(CONFIG_WATCHDOG) || defined(CONFIG_HW_WATCHDOG)
98 static int init_func_watchdog_init(void)
100 # if defined(CONFIG_HW_WATCHDOG) && \
101 (defined(CONFIG_M68K) || defined(CONFIG_MICROBLAZE) || \
102 defined(CONFIG_SH) || \
103 defined(CONFIG_DESIGNWARE_WATCHDOG) || \
104 defined(CONFIG_IMX_WATCHDOG))
106 puts(" Watchdog enabled\n");
113 int init_func_watchdog_reset(void)
119 #endif /* CONFIG_WATCHDOG */
121 __weak void board_add_ram_info(int use_default)
123 /* please define platform specific board_add_ram_info() */
126 static int init_baud_rate(void)
128 gd->baudrate = env_get_ulong("baudrate", 10, CONFIG_BAUDRATE);
132 static int display_text_info(void)
134 #if !defined(CONFIG_SANDBOX) && !defined(CONFIG_EFI_APP)
135 ulong bss_start, bss_end, text_base;
137 bss_start = (ulong)&__bss_start;
138 bss_end = (ulong)&__bss_end;
140 #ifdef CONFIG_SYS_TEXT_BASE
141 text_base = CONFIG_SYS_TEXT_BASE;
143 text_base = CONFIG_SYS_MONITOR_BASE;
146 debug("U-Boot code: %08lX -> %08lX BSS: -> %08lX\n",
147 text_base, bss_start, bss_end);
153 #ifdef CONFIG_SYSRESET
154 static int print_resetinfo(void)
160 ret = uclass_first_device_err(UCLASS_SYSRESET, &dev);
162 debug("%s: No sysreset device found (error: %d)\n",
164 /* Not all boards have sysreset drivers available during early
165 * boot, so don't fail if one can't be found.
170 if (!sysreset_get_status(dev, status, sizeof(status)))
171 printf("%s", status);
177 #if defined(CONFIG_DISPLAY_CPUINFO) && CONFIG_IS_ENABLED(CPU)
178 static int print_cpuinfo(void)
184 ret = uclass_first_device_err(UCLASS_CPU, &dev);
186 debug("%s: Could not get CPU device (err = %d)\n",
191 ret = cpu_get_desc(dev, desc, sizeof(desc));
193 debug("%s: Could not get CPU description (err = %d)\n",
198 printf("CPU: %s\n", desc);
204 static int announce_dram_init(void)
210 static int show_dram_config(void)
212 unsigned long long size;
214 #ifdef CONFIG_NR_DRAM_BANKS
217 debug("\nRAM Configuration:\n");
218 for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
219 size += gd->bd->bi_dram[i].size;
220 debug("Bank #%d: %llx ", i,
221 (unsigned long long)(gd->bd->bi_dram[i].start));
223 print_size(gd->bd->bi_dram[i].size, "\n");
231 print_size(size, "");
232 board_add_ram_info(0);
238 __weak int dram_init_banksize(void)
240 #if defined(CONFIG_NR_DRAM_BANKS) && defined(CONFIG_SYS_SDRAM_BASE)
241 gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
242 gd->bd->bi_dram[0].size = get_effective_memsize();
248 #if defined(CONFIG_SYS_I2C)
249 static int init_func_i2c(void)
252 #ifdef CONFIG_SYS_I2C
255 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
262 #if defined(CONFIG_VID)
263 __weak int init_func_vid(void)
269 static int setup_mon_len(void)
271 #if defined(__ARM__) || defined(__MICROBLAZE__)
272 gd->mon_len = (ulong)&__bss_end - (ulong)_start;
273 #elif defined(CONFIG_SANDBOX) || defined(CONFIG_EFI_APP)
274 gd->mon_len = (ulong)&_end - (ulong)_init;
275 #elif defined(CONFIG_NIOS2) || defined(CONFIG_XTENSA)
276 gd->mon_len = CONFIG_SYS_MONITOR_LEN;
277 #elif defined(CONFIG_NDS32) || defined(CONFIG_SH) || defined(CONFIG_RISCV)
278 gd->mon_len = (ulong)(&__bss_end) - (ulong)(&_start);
279 #elif defined(CONFIG_SYS_MONITOR_BASE)
280 /* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */
281 gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE;
286 static int setup_spl_handoff(void)
288 #if CONFIG_IS_ENABLED(HANDOFF)
289 gd->spl_handoff = bloblist_find(BLOBLISTT_SPL_HANDOFF,
290 sizeof(struct spl_handoff));
291 debug("Found SPL hand-off info %p\n", gd->spl_handoff);
297 __weak int arch_cpu_init(void)
302 __weak int mach_cpu_init(void)
307 /* Get the top of usable RAM */
308 __weak ulong board_get_usable_ram_top(ulong total_size)
310 #ifdef CONFIG_SYS_SDRAM_BASE
312 * Detect whether we have so much RAM that it goes past the end of our
313 * 32-bit address space. If so, clip the usable RAM so it doesn't.
315 if (gd->ram_top < CONFIG_SYS_SDRAM_BASE)
317 * Will wrap back to top of 32-bit space when reservations
325 static int setup_dest_addr(void)
327 debug("Monitor len: %08lX\n", gd->mon_len);
329 * Ram is setup, size stored in gd !!
331 debug("Ram size: %08lX\n", (ulong)gd->ram_size);
332 #if defined(CONFIG_SYS_MEM_TOP_HIDE)
334 * Subtract specified amount of memory to hide so that it won't
335 * get "touched" at all by U-Boot. By fixing up gd->ram_size
336 * the Linux kernel should now get passed the now "corrected"
337 * memory size and won't touch it either. This should work
338 * for arch/ppc and arch/powerpc. Only Linux board ports in
339 * arch/powerpc with bootwrapper support, that recalculate the
340 * memory size from the SDRAM controller setup will have to
343 gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE;
345 #ifdef CONFIG_SYS_SDRAM_BASE
346 gd->ram_base = CONFIG_SYS_SDRAM_BASE;
348 gd->ram_top = gd->ram_base + get_effective_memsize();
349 gd->ram_top = board_get_usable_ram_top(gd->mon_len);
350 gd->relocaddr = gd->ram_top;
351 debug("Ram top: %08lX\n", (ulong)gd->ram_top);
352 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
354 * We need to make sure the location we intend to put secondary core
355 * boot code is reserved and not used by any part of u-boot
357 if (gd->relocaddr > determine_mp_bootpg(NULL)) {
358 gd->relocaddr = determine_mp_bootpg(NULL);
359 debug("Reserving MP boot page to %08lx\n", gd->relocaddr);
366 /* reserve protected RAM */
367 static int reserve_pram(void)
371 reg = env_get_ulong("pram", 10, CONFIG_PRAM);
372 gd->relocaddr -= (reg << 10); /* size is in kB */
373 debug("Reserving %ldk for protected RAM at %08lx\n", reg,
377 #endif /* CONFIG_PRAM */
379 /* Round memory pointer down to next 4 kB limit */
380 static int reserve_round_4k(void)
382 gd->relocaddr &= ~(4096 - 1);
387 __weak int reserve_mmu(void)
389 #if !(CONFIG_IS_ENABLED(SYS_ICACHE_OFF) && CONFIG_IS_ENABLED(SYS_DCACHE_OFF))
390 /* reserve TLB table */
391 gd->arch.tlb_size = PGTABLE_SIZE;
392 gd->relocaddr -= gd->arch.tlb_size;
394 /* round down to next 64 kB limit */
395 gd->relocaddr &= ~(0x10000 - 1);
397 gd->arch.tlb_addr = gd->relocaddr;
398 debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr,
399 gd->arch.tlb_addr + gd->arch.tlb_size);
401 #ifdef CONFIG_SYS_MEM_RESERVE_SECURE
403 * Record allocated tlb_addr in case gd->tlb_addr to be overwritten
404 * with location within secure ram.
406 gd->arch.tlb_allocated = gd->arch.tlb_addr;
414 static int reserve_video(void)
416 #ifdef CONFIG_DM_VIDEO
420 addr = gd->relocaddr;
421 ret = video_reserve(&addr);
424 gd->relocaddr = addr;
425 #elif defined(CONFIG_LCD)
426 # ifdef CONFIG_FB_ADDR
427 gd->fb_base = CONFIG_FB_ADDR;
429 /* reserve memory for LCD display (always full pages) */
430 gd->relocaddr = lcd_setmem(gd->relocaddr);
431 gd->fb_base = gd->relocaddr;
432 # endif /* CONFIG_FB_ADDR */
438 static int reserve_trace(void)
441 gd->relocaddr -= CONFIG_TRACE_BUFFER_SIZE;
442 gd->trace_buff = map_sysmem(gd->relocaddr, CONFIG_TRACE_BUFFER_SIZE);
443 debug("Reserving %luk for trace data at: %08lx\n",
444 (unsigned long)CONFIG_TRACE_BUFFER_SIZE >> 10, gd->relocaddr);
450 static int reserve_uboot(void)
452 if (!(gd->flags & GD_FLG_SKIP_RELOC)) {
454 * reserve memory for U-Boot code, data & bss
455 * round down to next 4 kB limit
457 gd->relocaddr -= gd->mon_len;
458 gd->relocaddr &= ~(4096 - 1);
459 #if defined(CONFIG_E500) || defined(CONFIG_MIPS)
460 /* round down to next 64 kB limit so that IVPR stays aligned */
461 gd->relocaddr &= ~(65536 - 1);
464 debug("Reserving %ldk for U-Boot at: %08lx\n",
465 gd->mon_len >> 10, gd->relocaddr);
468 gd->start_addr_sp = gd->relocaddr;
473 #ifdef CONFIG_SYS_NONCACHED_MEMORY
474 static int reserve_noncached(void)
477 * The value of gd->start_addr_sp must match the value of malloc_start
478 * calculated in boatrd_f.c:initr_malloc(), which is passed to
479 * board_r.c:mem_malloc_init() and then used by
480 * cache.c:noncached_init()
482 * These calculations must match the code in cache.c:noncached_init()
484 gd->start_addr_sp = ALIGN(gd->start_addr_sp, MMU_SECTION_SIZE) -
486 gd->start_addr_sp -= ALIGN(CONFIG_SYS_NONCACHED_MEMORY,
488 debug("Reserving %dM for noncached_alloc() at: %08lx\n",
489 CONFIG_SYS_NONCACHED_MEMORY >> 20, gd->start_addr_sp);
495 /* reserve memory for malloc() area */
496 static int reserve_malloc(void)
498 gd->start_addr_sp = gd->start_addr_sp - TOTAL_MALLOC_LEN;
499 debug("Reserving %dk for malloc() at: %08lx\n",
500 TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp);
501 #ifdef CONFIG_SYS_NONCACHED_MEMORY
508 /* (permanently) allocate a Board Info struct */
509 static int reserve_board(void)
512 gd->start_addr_sp -= sizeof(bd_t);
513 gd->bd = (bd_t *)map_sysmem(gd->start_addr_sp, sizeof(bd_t));
514 memset(gd->bd, '\0', sizeof(bd_t));
515 debug("Reserving %zu Bytes for Board Info at: %08lx\n",
516 sizeof(bd_t), gd->start_addr_sp);
521 static int setup_machine(void)
523 #ifdef CONFIG_MACH_TYPE
524 gd->bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */
529 static int reserve_global_data(void)
531 gd->start_addr_sp -= sizeof(gd_t);
532 gd->new_gd = (gd_t *)map_sysmem(gd->start_addr_sp, sizeof(gd_t));
533 debug("Reserving %zu Bytes for Global Data at: %08lx\n",
534 sizeof(gd_t), gd->start_addr_sp);
538 static int reserve_fdt(void)
540 #ifndef CONFIG_OF_EMBED
542 * If the device tree is sitting immediately above our image then we
543 * must relocate it. If it is embedded in the data section, then it
544 * will be relocated with other data.
547 gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob) + 0x1000, 32);
549 gd->start_addr_sp -= gd->fdt_size;
550 gd->new_fdt = map_sysmem(gd->start_addr_sp, gd->fdt_size);
551 debug("Reserving %lu Bytes for FDT at: %08lx\n",
552 gd->fdt_size, gd->start_addr_sp);
559 static int reserve_bootstage(void)
561 #ifdef CONFIG_BOOTSTAGE
562 int size = bootstage_get_size();
564 gd->start_addr_sp -= size;
565 gd->new_bootstage = map_sysmem(gd->start_addr_sp, size);
566 debug("Reserving %#x Bytes for bootstage at: %08lx\n", size,
573 __weak int arch_reserve_stacks(void)
578 static int reserve_stacks(void)
580 /* make stack pointer 16-byte aligned */
581 gd->start_addr_sp -= 16;
582 gd->start_addr_sp &= ~0xf;
585 * let the architecture-specific code tailor gd->start_addr_sp and
588 return arch_reserve_stacks();
591 static int reserve_bloblist(void)
593 #ifdef CONFIG_BLOBLIST
594 gd->start_addr_sp &= ~0xf;
595 gd->start_addr_sp -= CONFIG_BLOBLIST_SIZE;
596 gd->new_bloblist = map_sysmem(gd->start_addr_sp, CONFIG_BLOBLIST_SIZE);
602 static int display_new_sp(void)
604 debug("New Stack Pointer is: %08lx\n", gd->start_addr_sp);
609 #if defined(CONFIG_M68K) || defined(CONFIG_MIPS) || defined(CONFIG_PPC) || \
611 static int setup_board_part1(void)
616 * Save local variables to board info struct
618 bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; /* start of memory */
619 bd->bi_memsize = gd->ram_size; /* size in bytes */
621 #ifdef CONFIG_SYS_SRAM_BASE
622 bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */
623 bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */
626 #if defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
627 bd->bi_immr_base = CONFIG_SYS_IMMR; /* base of IMMR register */
629 #if defined(CONFIG_M68K)
630 bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */
632 #if defined(CONFIG_MPC83xx)
633 bd->bi_immrbar = CONFIG_SYS_IMMR;
640 #if defined(CONFIG_PPC) || defined(CONFIG_M68K)
641 static int setup_board_part2(void)
645 bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */
646 bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */
647 #if defined(CONFIG_CPM2)
648 bd->bi_cpmfreq = gd->arch.cpm_clk;
649 bd->bi_brgfreq = gd->arch.brg_clk;
650 bd->bi_sccfreq = gd->arch.scc_clk;
651 bd->bi_vco = gd->arch.vco_out;
652 #endif /* CONFIG_CPM2 */
653 #if defined(CONFIG_M68K) && defined(CONFIG_PCI)
654 bd->bi_pcifreq = gd->pci_clk;
656 #if defined(CONFIG_EXTRA_CLOCK)
657 bd->bi_inpfreq = gd->arch.inp_clk; /* input Freq in Hz */
658 bd->bi_vcofreq = gd->arch.vco_clk; /* vco Freq in Hz */
659 bd->bi_flbfreq = gd->arch.flb_clk; /* flexbus Freq in Hz */
667 static int init_post(void)
669 post_bootmode_init();
670 post_run(NULL, POST_ROM | post_bootmode_get(0));
676 static int reloc_fdt(void)
678 #ifndef CONFIG_OF_EMBED
679 if (gd->flags & GD_FLG_SKIP_RELOC)
682 memcpy(gd->new_fdt, gd->fdt_blob, gd->fdt_size);
683 gd->fdt_blob = gd->new_fdt;
690 static int reloc_bootstage(void)
692 #ifdef CONFIG_BOOTSTAGE
693 if (gd->flags & GD_FLG_SKIP_RELOC)
695 if (gd->new_bootstage) {
696 int size = bootstage_get_size();
698 debug("Copying bootstage from %p to %p, size %x\n",
699 gd->bootstage, gd->new_bootstage, size);
700 memcpy(gd->new_bootstage, gd->bootstage, size);
701 gd->bootstage = gd->new_bootstage;
702 bootstage_relocate();
709 static int reloc_bloblist(void)
711 #ifdef CONFIG_BLOBLIST
712 if (gd->flags & GD_FLG_SKIP_RELOC)
714 if (gd->new_bloblist) {
715 int size = CONFIG_BLOBLIST_SIZE;
717 debug("Copying bloblist from %p to %p, size %x\n",
718 gd->bloblist, gd->new_bloblist, size);
719 memcpy(gd->new_bloblist, gd->bloblist, size);
720 gd->bloblist = gd->new_bloblist;
727 static int setup_reloc(void)
729 if (gd->flags & GD_FLG_SKIP_RELOC) {
730 debug("Skipping relocation due to flag\n");
734 #ifdef CONFIG_SYS_TEXT_BASE
736 gd->reloc_off = gd->relocaddr - (unsigned long)__image_copy_start;
737 #elif defined(CONFIG_M68K)
739 * On all ColdFire arch cpu, monitor code starts always
740 * just after the default vector table location, so at 0x400
742 gd->reloc_off = gd->relocaddr - (CONFIG_SYS_TEXT_BASE + 0x400);
743 #elif !defined(CONFIG_SANDBOX)
744 gd->reloc_off = gd->relocaddr - CONFIG_SYS_TEXT_BASE;
747 memcpy(gd->new_gd, (char *)gd, sizeof(gd_t));
749 debug("Relocation Offset is: %08lx\n", gd->reloc_off);
750 debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n",
751 gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd),
757 #ifdef CONFIG_OF_BOARD_FIXUP
758 static int fix_fdt(void)
760 return board_fix_fdt((void *)gd->fdt_blob);
764 /* ARM calls relocate_code from its crt0.S */
765 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
766 !CONFIG_IS_ENABLED(X86_64)
768 static int jump_to_copy(void)
770 if (gd->flags & GD_FLG_SKIP_RELOC)
773 * x86 is special, but in a nice way. It uses a trampoline which
774 * enables the dcache if possible.
776 * For now, other archs use relocate_code(), which is implemented
777 * similarly for all archs. When we do generic relocation, hopefully
778 * we can make all archs enable the dcache prior to relocation.
780 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
782 * SDRAM and console are now initialised. The final stack can now
783 * be setup in SDRAM. Code execution will continue in Flash, but
784 * with the stack in SDRAM and Global Data in temporary memory
787 arch_setup_gd(gd->new_gd);
788 board_init_f_r_trampoline(gd->start_addr_sp);
790 relocate_code(gd->start_addr_sp, gd->new_gd, gd->relocaddr);
797 /* Record the board_init_f() bootstage (after arch_cpu_init()) */
798 static int initf_bootstage(void)
800 bool from_spl = IS_ENABLED(CONFIG_SPL_BOOTSTAGE) &&
801 IS_ENABLED(CONFIG_BOOTSTAGE_STASH);
804 ret = bootstage_init(!from_spl);
808 const void *stash = map_sysmem(CONFIG_BOOTSTAGE_STASH_ADDR,
809 CONFIG_BOOTSTAGE_STASH_SIZE);
811 ret = bootstage_unstash(stash, CONFIG_BOOTSTAGE_STASH_SIZE);
812 if (ret && ret != -ENOENT) {
813 debug("Failed to unstash bootstage: err=%d\n", ret);
818 bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f");
823 static int initf_console_record(void)
825 #if defined(CONFIG_CONSOLE_RECORD) && CONFIG_VAL(SYS_MALLOC_F_LEN)
826 return console_record_init();
832 static int initf_dm(void)
834 #if defined(CONFIG_DM) && CONFIG_VAL(SYS_MALLOC_F_LEN)
837 bootstage_start(BOOTSTATE_ID_ACCUM_DM_F, "dm_f");
838 ret = dm_init_and_scan(true);
839 bootstage_accum(BOOTSTATE_ID_ACCUM_DM_F);
843 #ifdef CONFIG_TIMER_EARLY
844 ret = dm_timer_init();
852 /* Architecture-specific memory reservation */
853 __weak int reserve_arch(void)
858 __weak int arch_cpu_init_dm(void)
863 static const init_fnc_t init_sequence_f[] = {
865 #ifdef CONFIG_OF_CONTROL
868 #ifdef CONFIG_TRACE_EARLY
873 initf_bootstage, /* uses its own timer, so does not need DM */
874 #ifdef CONFIG_BLOBLIST
878 initf_console_record,
879 #if defined(CONFIG_HAVE_FSP)
882 arch_cpu_init, /* basic arch cpu dependent setup */
883 mach_cpu_init, /* SoC/machine dependent CPU setup */
886 #if defined(CONFIG_BOARD_EARLY_INIT_F)
889 #if defined(CONFIG_PPC) || defined(CONFIG_SYS_FSL_CLK) || defined(CONFIG_M68K)
890 /* get CPU and bus clocks according to the environment variable */
891 get_clocks, /* get CPU and bus clocks (etc.) */
893 #if !defined(CONFIG_M68K)
894 timer_init, /* initialize timer */
896 #if defined(CONFIG_BOARD_POSTCLK_INIT)
899 env_init, /* initialize environment */
900 init_baud_rate, /* initialze baudrate settings */
901 serial_init, /* serial communications setup */
902 console_init_f, /* stage 1 init of console */
903 display_options, /* say that we are here */
904 display_text_info, /* show debugging info if required */
905 #if defined(CONFIG_PPC) || defined(CONFIG_SH) || defined(CONFIG_X86)
908 #if defined(CONFIG_SYSRESET)
911 #if defined(CONFIG_DISPLAY_CPUINFO)
912 print_cpuinfo, /* display cpu info (and speed) */
914 #if defined(CONFIG_DTB_RESELECT)
917 #if defined(CONFIG_DISPLAY_BOARDINFO)
920 INIT_FUNC_WATCHDOG_INIT
921 #if defined(CONFIG_MISC_INIT_F)
924 INIT_FUNC_WATCHDOG_RESET
925 #if defined(CONFIG_SYS_I2C)
928 #if defined(CONFIG_VID) && !defined(CONFIG_SPL)
932 dram_init, /* configure available RAM banks */
936 INIT_FUNC_WATCHDOG_RESET
937 #if defined(CONFIG_SYS_DRAM_TEST)
939 #endif /* CONFIG_SYS_DRAM_TEST */
940 INIT_FUNC_WATCHDOG_RESET
945 INIT_FUNC_WATCHDOG_RESET
947 * Now that we have DRAM mapped and working, we can
948 * relocate the code and continue running from DRAM.
950 * Reserve memory at end of RAM for (top down in that order):
951 * - area that won't get touched by U-Boot and Linux (optional)
952 * - kernel log buffer
956 * - board info struct
980 #if defined(CONFIG_M68K) || defined(CONFIG_MIPS) || defined(CONFIG_PPC) || \
984 #if defined(CONFIG_PPC) || defined(CONFIG_M68K)
985 INIT_FUNC_WATCHDOG_RESET
989 #ifdef CONFIG_OF_BOARD_FIXUP
992 INIT_FUNC_WATCHDOG_RESET
997 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
1002 #if defined(CONFIG_XTENSA)
1005 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
1006 !CONFIG_IS_ENABLED(X86_64)
1012 void board_init_f(ulong boot_flags)
1014 gd->flags = boot_flags;
1015 gd->have_console = 0;
1017 if (initcall_run_list(init_sequence_f))
1020 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
1021 !defined(CONFIG_EFI_APP) && !CONFIG_IS_ENABLED(X86_64) && \
1022 !defined(CONFIG_ARC)
1023 /* NOTREACHED - jump_to_copy() does not return */
1028 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
1030 * For now this code is only used on x86.
1032 * init_sequence_f_r is the list of init functions which are run when
1033 * U-Boot is executing from Flash with a semi-limited 'C' environment.
1034 * The following limitations must be considered when implementing an
1036 * - 'static' variables are read-only
1037 * - Global Data (gd->xxx) is read/write
1039 * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if
1040 * supported). It _should_, if possible, copy global data to RAM and
1041 * initialise the CPU caches (to speed up the relocation process)
1043 * NOTE: At present only x86 uses this route, but it is intended that
1044 * all archs will move to this when generic relocation is implemented.
1046 static const init_fnc_t init_sequence_f_r[] = {
1047 #if !CONFIG_IS_ENABLED(X86_64)
1054 void board_init_f_r(void)
1056 if (initcall_run_list(init_sequence_f_r))
1060 * The pre-relocation drivers may be using memory that has now gone
1061 * away. Mark serial as unavailable - this will fall back to the debug
1062 * UART if available.
1064 * Do the same with log drivers since the memory may not be available.
1066 gd->flags &= ~(GD_FLG_SERIAL_READY | GD_FLG_LOG_READY);
1072 * U-Boot has been copied into SDRAM, the BSS has been cleared etc.
1073 * Transfer execution from Flash to RAM by calculating the address
1074 * of the in-RAM copy of board_init_r() and calling it
1076 (board_init_r + gd->reloc_off)((gd_t *)gd, gd->relocaddr);
1078 /* NOTREACHED - board_init_r() does not return */
1081 #endif /* CONFIG_X86 */