1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (c) 2011 The Chromium OS Authors.
4 * (C) Copyright 2002-2006
5 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
8 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
9 * Marius Groeger <mgroeger@sysgo.de>
15 #include <environment.h>
26 #include <status_led.h>
32 #ifdef CONFIG_MACH_TYPE
33 #include <asm/mach-types.h>
35 #if defined(CONFIG_MP) && defined(CONFIG_PPC)
39 #include <asm/sections.h>
41 #include <linux/errno.h>
44 * Pointer to initial global data area
46 * Here we initialize it if needed.
48 #ifdef XTRN_DECLARE_GLOBAL_DATA_PTR
49 #undef XTRN_DECLARE_GLOBAL_DATA_PTR
50 #define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */
51 DECLARE_GLOBAL_DATA_PTR = (gd_t *)(CONFIG_SYS_INIT_GD_ADDR);
53 DECLARE_GLOBAL_DATA_PTR;
57 * TODO(sjg@chromium.org): IMO this code should be
58 * refactored to a single function, something like:
60 * void led_set_state(enum led_colour_t colour, int on);
62 /************************************************************************
63 * Coloured LED functionality
64 ************************************************************************
65 * May be supplied by boards if desired
67 __weak void coloured_LED_init(void) {}
68 __weak void red_led_on(void) {}
69 __weak void red_led_off(void) {}
70 __weak void green_led_on(void) {}
71 __weak void green_led_off(void) {}
72 __weak void yellow_led_on(void) {}
73 __weak void yellow_led_off(void) {}
74 __weak void blue_led_on(void) {}
75 __weak void blue_led_off(void) {}
78 * Why is gd allocated a register? Prior to reloc it might be better to
79 * just pass it around to each function in this file?
81 * After reloc one could argue that it is hardly used and doesn't need
82 * to be in a register. Or if it is it should perhaps hold pointers to all
83 * global data for all modules, so that post-reloc we can avoid the massive
84 * literal pool we get on ARM. Or perhaps just encourage each module to use
88 #if defined(CONFIG_WATCHDOG) || defined(CONFIG_HW_WATCHDOG)
89 static int init_func_watchdog_init(void)
91 # if defined(CONFIG_HW_WATCHDOG) && \
92 (defined(CONFIG_M68K) || defined(CONFIG_MICROBLAZE) || \
93 defined(CONFIG_SH) || defined(CONFIG_AT91SAM9_WATCHDOG) || \
94 defined(CONFIG_DESIGNWARE_WATCHDOG) || \
95 defined(CONFIG_IMX_WATCHDOG))
97 puts(" Watchdog enabled\n");
104 int init_func_watchdog_reset(void)
110 #endif /* CONFIG_WATCHDOG */
112 __weak void board_add_ram_info(int use_default)
114 /* please define platform specific board_add_ram_info() */
117 static int init_baud_rate(void)
119 gd->baudrate = env_get_ulong("baudrate", 10, CONFIG_BAUDRATE);
123 static int display_text_info(void)
125 #if !defined(CONFIG_SANDBOX) && !defined(CONFIG_EFI_APP)
126 ulong bss_start, bss_end, text_base;
128 bss_start = (ulong)&__bss_start;
129 bss_end = (ulong)&__bss_end;
131 #ifdef CONFIG_SYS_TEXT_BASE
132 text_base = CONFIG_SYS_TEXT_BASE;
134 text_base = CONFIG_SYS_MONITOR_BASE;
137 debug("U-Boot code: %08lX -> %08lX BSS: -> %08lX\n",
138 text_base, bss_start, bss_end);
144 #ifdef CONFIG_SYSRESET
145 static int print_resetinfo(void)
151 ret = uclass_first_device_err(UCLASS_SYSRESET, &dev);
153 debug("%s: No sysreset device found (error: %d)\n",
155 /* Not all boards have sysreset drivers available during early
156 * boot, so don't fail if one can't be found.
161 if (!sysreset_get_status(dev, status, sizeof(status)))
162 printf("%s", status);
168 static int announce_dram_init(void)
174 static int show_dram_config(void)
176 unsigned long long size;
178 #ifdef CONFIG_NR_DRAM_BANKS
181 debug("\nRAM Configuration:\n");
182 for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
183 size += gd->bd->bi_dram[i].size;
184 debug("Bank #%d: %llx ", i,
185 (unsigned long long)(gd->bd->bi_dram[i].start));
187 print_size(gd->bd->bi_dram[i].size, "\n");
195 print_size(size, "");
196 board_add_ram_info(0);
202 __weak int dram_init_banksize(void)
204 #if defined(CONFIG_NR_DRAM_BANKS) && defined(CONFIG_SYS_SDRAM_BASE)
205 gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
206 gd->bd->bi_dram[0].size = get_effective_memsize();
212 #if defined(CONFIG_SYS_I2C)
213 static int init_func_i2c(void)
216 #ifdef CONFIG_SYS_I2C
219 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
226 #if defined(CONFIG_VID)
227 __weak int init_func_vid(void)
233 #if defined(CONFIG_HARD_SPI)
234 static int init_func_spi(void)
243 static int setup_mon_len(void)
245 #if defined(__ARM__) || defined(__MICROBLAZE__)
246 gd->mon_len = (ulong)&__bss_end - (ulong)_start;
247 #elif defined(CONFIG_SANDBOX) || defined(CONFIG_EFI_APP)
248 gd->mon_len = (ulong)&_end - (ulong)_init;
249 #elif defined(CONFIG_NIOS2) || defined(CONFIG_XTENSA)
250 gd->mon_len = CONFIG_SYS_MONITOR_LEN;
251 #elif defined(CONFIG_NDS32) || defined(CONFIG_SH) || defined(CONFIG_RISCV)
252 gd->mon_len = (ulong)(&__bss_end) - (ulong)(&_start);
253 #elif defined(CONFIG_SYS_MONITOR_BASE)
254 /* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */
255 gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE;
260 __weak int arch_cpu_init(void)
265 __weak int mach_cpu_init(void)
270 /* Get the top of usable RAM */
271 __weak ulong board_get_usable_ram_top(ulong total_size)
273 #ifdef CONFIG_SYS_SDRAM_BASE
275 * Detect whether we have so much RAM that it goes past the end of our
276 * 32-bit address space. If so, clip the usable RAM so it doesn't.
278 if (gd->ram_top < CONFIG_SYS_SDRAM_BASE)
280 * Will wrap back to top of 32-bit space when reservations
288 static int setup_dest_addr(void)
290 debug("Monitor len: %08lX\n", gd->mon_len);
292 * Ram is setup, size stored in gd !!
294 debug("Ram size: %08lX\n", (ulong)gd->ram_size);
295 #if defined(CONFIG_SYS_MEM_TOP_HIDE)
297 * Subtract specified amount of memory to hide so that it won't
298 * get "touched" at all by U-Boot. By fixing up gd->ram_size
299 * the Linux kernel should now get passed the now "corrected"
300 * memory size and won't touch it either. This should work
301 * for arch/ppc and arch/powerpc. Only Linux board ports in
302 * arch/powerpc with bootwrapper support, that recalculate the
303 * memory size from the SDRAM controller setup will have to
306 gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE;
308 #ifdef CONFIG_SYS_SDRAM_BASE
309 gd->ram_base = CONFIG_SYS_SDRAM_BASE;
311 gd->ram_top = gd->ram_base + get_effective_memsize();
312 gd->ram_top = board_get_usable_ram_top(gd->mon_len);
313 gd->relocaddr = gd->ram_top;
314 debug("Ram top: %08lX\n", (ulong)gd->ram_top);
315 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
317 * We need to make sure the location we intend to put secondary core
318 * boot code is reserved and not used by any part of u-boot
320 if (gd->relocaddr > determine_mp_bootpg(NULL)) {
321 gd->relocaddr = determine_mp_bootpg(NULL);
322 debug("Reserving MP boot page to %08lx\n", gd->relocaddr);
329 /* reserve protected RAM */
330 static int reserve_pram(void)
334 reg = env_get_ulong("pram", 10, CONFIG_PRAM);
335 gd->relocaddr -= (reg << 10); /* size is in kB */
336 debug("Reserving %ldk for protected RAM at %08lx\n", reg,
340 #endif /* CONFIG_PRAM */
342 /* Round memory pointer down to next 4 kB limit */
343 static int reserve_round_4k(void)
345 gd->relocaddr &= ~(4096 - 1);
350 __weak int reserve_mmu(void)
352 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF))
353 /* reserve TLB table */
354 gd->arch.tlb_size = PGTABLE_SIZE;
355 gd->relocaddr -= gd->arch.tlb_size;
357 /* round down to next 64 kB limit */
358 gd->relocaddr &= ~(0x10000 - 1);
360 gd->arch.tlb_addr = gd->relocaddr;
361 debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr,
362 gd->arch.tlb_addr + gd->arch.tlb_size);
364 #ifdef CONFIG_SYS_MEM_RESERVE_SECURE
366 * Record allocated tlb_addr in case gd->tlb_addr to be overwritten
367 * with location within secure ram.
369 gd->arch.tlb_allocated = gd->arch.tlb_addr;
377 static int reserve_video(void)
379 #ifdef CONFIG_DM_VIDEO
383 addr = gd->relocaddr;
384 ret = video_reserve(&addr);
387 gd->relocaddr = addr;
388 #elif defined(CONFIG_LCD)
389 # ifdef CONFIG_FB_ADDR
390 gd->fb_base = CONFIG_FB_ADDR;
392 /* reserve memory for LCD display (always full pages) */
393 gd->relocaddr = lcd_setmem(gd->relocaddr);
394 gd->fb_base = gd->relocaddr;
395 # endif /* CONFIG_FB_ADDR */
396 #elif defined(CONFIG_VIDEO) && \
397 (!defined(CONFIG_PPC)) && \
398 !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \
399 !defined(CONFIG_M68K)
400 /* reserve memory for video display (always full pages) */
401 gd->relocaddr = video_setmem(gd->relocaddr);
402 gd->fb_base = gd->relocaddr;
408 static int reserve_trace(void)
411 gd->relocaddr -= CONFIG_TRACE_BUFFER_SIZE;
412 gd->trace_buff = map_sysmem(gd->relocaddr, CONFIG_TRACE_BUFFER_SIZE);
413 debug("Reserving %dk for trace data at: %08lx\n",
414 CONFIG_TRACE_BUFFER_SIZE >> 10, gd->relocaddr);
420 static int reserve_uboot(void)
422 if (!(gd->flags & GD_FLG_SKIP_RELOC)) {
424 * reserve memory for U-Boot code, data & bss
425 * round down to next 4 kB limit
427 gd->relocaddr -= gd->mon_len;
428 gd->relocaddr &= ~(4096 - 1);
429 #if defined(CONFIG_E500) || defined(CONFIG_MIPS)
430 /* round down to next 64 kB limit so that IVPR stays aligned */
431 gd->relocaddr &= ~(65536 - 1);
434 debug("Reserving %ldk for U-Boot at: %08lx\n",
435 gd->mon_len >> 10, gd->relocaddr);
438 gd->start_addr_sp = gd->relocaddr;
443 /* reserve memory for malloc() area */
444 static int reserve_malloc(void)
446 gd->start_addr_sp = gd->start_addr_sp - TOTAL_MALLOC_LEN;
447 debug("Reserving %dk for malloc() at: %08lx\n",
448 TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp);
452 /* (permanently) allocate a Board Info struct */
453 static int reserve_board(void)
456 gd->start_addr_sp -= sizeof(bd_t);
457 gd->bd = (bd_t *)map_sysmem(gd->start_addr_sp, sizeof(bd_t));
458 memset(gd->bd, '\0', sizeof(bd_t));
459 debug("Reserving %zu Bytes for Board Info at: %08lx\n",
460 sizeof(bd_t), gd->start_addr_sp);
465 static int setup_machine(void)
467 #ifdef CONFIG_MACH_TYPE
468 gd->bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */
473 static int reserve_global_data(void)
475 gd->start_addr_sp -= sizeof(gd_t);
476 gd->new_gd = (gd_t *)map_sysmem(gd->start_addr_sp, sizeof(gd_t));
477 debug("Reserving %zu Bytes for Global Data at: %08lx\n",
478 sizeof(gd_t), gd->start_addr_sp);
482 static int reserve_fdt(void)
484 #ifndef CONFIG_OF_EMBED
486 * If the device tree is sitting immediately above our image then we
487 * must relocate it. If it is embedded in the data section, then it
488 * will be relocated with other data.
491 gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob) + 0x1000, 32);
493 gd->start_addr_sp -= gd->fdt_size;
494 gd->new_fdt = map_sysmem(gd->start_addr_sp, gd->fdt_size);
495 debug("Reserving %lu Bytes for FDT at: %08lx\n",
496 gd->fdt_size, gd->start_addr_sp);
503 static int reserve_bootstage(void)
505 #ifdef CONFIG_BOOTSTAGE
506 int size = bootstage_get_size();
508 gd->start_addr_sp -= size;
509 gd->new_bootstage = map_sysmem(gd->start_addr_sp, size);
510 debug("Reserving %#x Bytes for bootstage at: %08lx\n", size,
517 __weak int arch_reserve_stacks(void)
522 static int reserve_stacks(void)
524 /* make stack pointer 16-byte aligned */
525 gd->start_addr_sp -= 16;
526 gd->start_addr_sp &= ~0xf;
529 * let the architecture-specific code tailor gd->start_addr_sp and
532 return arch_reserve_stacks();
535 static int display_new_sp(void)
537 debug("New Stack Pointer is: %08lx\n", gd->start_addr_sp);
542 #if defined(CONFIG_M68K) || defined(CONFIG_MIPS) || defined(CONFIG_PPC) || \
544 static int setup_board_part1(void)
549 * Save local variables to board info struct
551 bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; /* start of memory */
552 bd->bi_memsize = gd->ram_size; /* size in bytes */
554 #ifdef CONFIG_SYS_SRAM_BASE
555 bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */
556 bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */
559 #if defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
560 bd->bi_immr_base = CONFIG_SYS_IMMR; /* base of IMMR register */
562 #if defined(CONFIG_M68K)
563 bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */
565 #if defined(CONFIG_MPC83xx)
566 bd->bi_immrbar = CONFIG_SYS_IMMR;
573 #if defined(CONFIG_PPC) || defined(CONFIG_M68K)
574 static int setup_board_part2(void)
578 bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */
579 bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */
580 #if defined(CONFIG_CPM2)
581 bd->bi_cpmfreq = gd->arch.cpm_clk;
582 bd->bi_brgfreq = gd->arch.brg_clk;
583 bd->bi_sccfreq = gd->arch.scc_clk;
584 bd->bi_vco = gd->arch.vco_out;
585 #endif /* CONFIG_CPM2 */
586 #if defined(CONFIG_M68K) && defined(CONFIG_PCI)
587 bd->bi_pcifreq = gd->pci_clk;
589 #if defined(CONFIG_EXTRA_CLOCK)
590 bd->bi_inpfreq = gd->arch.inp_clk; /* input Freq in Hz */
591 bd->bi_vcofreq = gd->arch.vco_clk; /* vco Freq in Hz */
592 bd->bi_flbfreq = gd->arch.flb_clk; /* flexbus Freq in Hz */
600 static int init_post(void)
602 post_bootmode_init();
603 post_run(NULL, POST_ROM | post_bootmode_get(0));
609 static int reloc_fdt(void)
611 #ifndef CONFIG_OF_EMBED
612 if (gd->flags & GD_FLG_SKIP_RELOC)
615 memcpy(gd->new_fdt, gd->fdt_blob, gd->fdt_size);
616 gd->fdt_blob = gd->new_fdt;
623 static int reloc_bootstage(void)
625 #ifdef CONFIG_BOOTSTAGE
626 if (gd->flags & GD_FLG_SKIP_RELOC)
628 if (gd->new_bootstage) {
629 int size = bootstage_get_size();
631 debug("Copying bootstage from %p to %p, size %x\n",
632 gd->bootstage, gd->new_bootstage, size);
633 memcpy(gd->new_bootstage, gd->bootstage, size);
634 gd->bootstage = gd->new_bootstage;
641 static int setup_reloc(void)
643 if (gd->flags & GD_FLG_SKIP_RELOC) {
644 debug("Skipping relocation due to flag\n");
648 #ifdef CONFIG_SYS_TEXT_BASE
650 gd->reloc_off = gd->relocaddr - (unsigned long)__image_copy_start;
651 #elif defined(CONFIG_M68K)
653 * On all ColdFire arch cpu, monitor code starts always
654 * just after the default vector table location, so at 0x400
656 gd->reloc_off = gd->relocaddr - (CONFIG_SYS_TEXT_BASE + 0x400);
658 gd->reloc_off = gd->relocaddr - CONFIG_SYS_TEXT_BASE;
661 memcpy(gd->new_gd, (char *)gd, sizeof(gd_t));
663 debug("Relocation Offset is: %08lx\n", gd->reloc_off);
664 debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n",
665 gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd),
671 #ifdef CONFIG_OF_BOARD_FIXUP
672 static int fix_fdt(void)
674 return board_fix_fdt((void *)gd->fdt_blob);
678 /* ARM calls relocate_code from its crt0.S */
679 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
680 !CONFIG_IS_ENABLED(X86_64)
682 static int jump_to_copy(void)
684 if (gd->flags & GD_FLG_SKIP_RELOC)
687 * x86 is special, but in a nice way. It uses a trampoline which
688 * enables the dcache if possible.
690 * For now, other archs use relocate_code(), which is implemented
691 * similarly for all archs. When we do generic relocation, hopefully
692 * we can make all archs enable the dcache prior to relocation.
694 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
696 * SDRAM and console are now initialised. The final stack can now
697 * be setup in SDRAM. Code execution will continue in Flash, but
698 * with the stack in SDRAM and Global Data in temporary memory
701 arch_setup_gd(gd->new_gd);
702 board_init_f_r_trampoline(gd->start_addr_sp);
704 relocate_code(gd->start_addr_sp, gd->new_gd, gd->relocaddr);
711 /* Record the board_init_f() bootstage (after arch_cpu_init()) */
712 static int initf_bootstage(void)
714 bool from_spl = IS_ENABLED(CONFIG_SPL_BOOTSTAGE) &&
715 IS_ENABLED(CONFIG_BOOTSTAGE_STASH);
718 ret = bootstage_init(!from_spl);
722 const void *stash = map_sysmem(CONFIG_BOOTSTAGE_STASH_ADDR,
723 CONFIG_BOOTSTAGE_STASH_SIZE);
725 ret = bootstage_unstash(stash, CONFIG_BOOTSTAGE_STASH_SIZE);
726 if (ret && ret != -ENOENT) {
727 debug("Failed to unstash bootstage: err=%d\n", ret);
732 bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f");
737 static int initf_console_record(void)
739 #if defined(CONFIG_CONSOLE_RECORD) && CONFIG_VAL(SYS_MALLOC_F_LEN)
740 return console_record_init();
746 static int initf_dm(void)
748 #if defined(CONFIG_DM) && CONFIG_VAL(SYS_MALLOC_F_LEN)
751 bootstage_start(BOOTSTATE_ID_ACCUM_DM_F, "dm_f");
752 ret = dm_init_and_scan(true);
753 bootstage_accum(BOOTSTATE_ID_ACCUM_DM_F);
757 #ifdef CONFIG_TIMER_EARLY
758 ret = dm_timer_init();
766 /* Architecture-specific memory reservation */
767 __weak int reserve_arch(void)
772 __weak int arch_cpu_init_dm(void)
777 static const init_fnc_t init_sequence_f[] = {
779 #ifdef CONFIG_OF_CONTROL
787 initf_bootstage, /* uses its own timer, so does not need DM */
788 initf_console_record,
789 #if defined(CONFIG_HAVE_FSP)
792 arch_cpu_init, /* basic arch cpu dependent setup */
793 mach_cpu_init, /* SoC/machine dependent CPU setup */
796 #if defined(CONFIG_BOARD_EARLY_INIT_F)
799 #if defined(CONFIG_PPC) || defined(CONFIG_SYS_FSL_CLK) || defined(CONFIG_M68K)
800 /* get CPU and bus clocks according to the environment variable */
801 get_clocks, /* get CPU and bus clocks (etc.) */
803 #if !defined(CONFIG_M68K)
804 timer_init, /* initialize timer */
806 #if defined(CONFIG_BOARD_POSTCLK_INIT)
809 env_init, /* initialize environment */
810 init_baud_rate, /* initialze baudrate settings */
811 serial_init, /* serial communications setup */
812 console_init_f, /* stage 1 init of console */
813 display_options, /* say that we are here */
814 display_text_info, /* show debugging info if required */
815 #if defined(CONFIG_PPC) || defined(CONFIG_SH) || defined(CONFIG_X86)
818 #if defined(CONFIG_SYSRESET)
821 #if defined(CONFIG_DISPLAY_CPUINFO)
822 print_cpuinfo, /* display cpu info (and speed) */
824 #if defined(CONFIG_DTB_RESELECT)
827 #if defined(CONFIG_DISPLAY_BOARDINFO)
830 INIT_FUNC_WATCHDOG_INIT
831 #if defined(CONFIG_MISC_INIT_F)
834 INIT_FUNC_WATCHDOG_RESET
835 #if defined(CONFIG_SYS_I2C)
838 #if defined(CONFIG_VID) && !defined(CONFIG_SPL)
841 #if defined(CONFIG_HARD_SPI)
845 dram_init, /* configure available RAM banks */
849 INIT_FUNC_WATCHDOG_RESET
850 #if defined(CONFIG_SYS_DRAM_TEST)
852 #endif /* CONFIG_SYS_DRAM_TEST */
853 INIT_FUNC_WATCHDOG_RESET
858 INIT_FUNC_WATCHDOG_RESET
860 * Now that we have DRAM mapped and working, we can
861 * relocate the code and continue running from DRAM.
863 * Reserve memory at end of RAM for (top down in that order):
864 * - area that won't get touched by U-Boot and Linux (optional)
865 * - kernel log buffer
869 * - board info struct
892 #if defined(CONFIG_M68K) || defined(CONFIG_MIPS) || defined(CONFIG_PPC) || \
896 #if defined(CONFIG_PPC) || defined(CONFIG_M68K)
897 INIT_FUNC_WATCHDOG_RESET
901 #ifdef CONFIG_OF_BOARD_FIXUP
904 INIT_FUNC_WATCHDOG_RESET
908 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
913 #if defined(CONFIG_XTENSA)
916 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
917 !CONFIG_IS_ENABLED(X86_64)
923 void board_init_f(ulong boot_flags)
925 gd->flags = boot_flags;
926 gd->have_console = 0;
928 if (initcall_run_list(init_sequence_f))
931 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
932 !defined(CONFIG_EFI_APP) && !CONFIG_IS_ENABLED(X86_64) && \
934 /* NOTREACHED - jump_to_copy() does not return */
939 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
941 * For now this code is only used on x86.
943 * init_sequence_f_r is the list of init functions which are run when
944 * U-Boot is executing from Flash with a semi-limited 'C' environment.
945 * The following limitations must be considered when implementing an
947 * - 'static' variables are read-only
948 * - Global Data (gd->xxx) is read/write
950 * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if
951 * supported). It _should_, if possible, copy global data to RAM and
952 * initialise the CPU caches (to speed up the relocation process)
954 * NOTE: At present only x86 uses this route, but it is intended that
955 * all archs will move to this when generic relocation is implemented.
957 static const init_fnc_t init_sequence_f_r[] = {
958 #if !CONFIG_IS_ENABLED(X86_64)
965 void board_init_f_r(void)
967 if (initcall_run_list(init_sequence_f_r))
971 * The pre-relocation drivers may be using memory that has now gone
972 * away. Mark serial as unavailable - this will fall back to the debug
975 * Do the same with log drivers since the memory may not be available.
977 gd->flags &= ~(GD_FLG_SERIAL_READY | GD_FLG_LOG_READY);
983 * U-Boot has been copied into SDRAM, the BSS has been cleared etc.
984 * Transfer execution from Flash to RAM by calculating the address
985 * of the in-RAM copy of board_init_r() and calling it
987 (board_init_r + gd->reloc_off)((gd_t *)gd, gd->relocaddr);
989 /* NOTREACHED - board_init_r() does not return */
992 #endif /* CONFIG_X86 */