board/zyxel/nsa310s/nsa310s.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * Copyright (C) 2015
   4  * Gerald Kerma <dreagle@doukki.net>
   5  * Tony Dinh <mibodhi@gmail.com>
   6  */
   7
   8 #include <common.h>
   9 #include <miiphy.h>
  10 #include <asm/arch/cpu.h>
  11 #include <asm/arch/soc.h>
  12 #include <asm/arch/mpp.h>
  13 #include <asm/io.h>
  14 #include "nsa310s.h"
  15
  16 DECLARE_GLOBAL_DATA_PTR;
  17
  18 int board_early_init_f(void)
  19 {
  20         /*
  21          * default gpio configuration
  22          * There are maximum 64 gpios controlled through 2 sets of registers
  23          * the below configuration configures mainly initial LED status
  24          */
  25         mvebu_config_gpio(NSA310S_VAL_LOW, NSA310S_VAL_HIGH,
  26                           NSA310S_OE_LOW, NSA310S_OE_HIGH);
  27
  28         /* (all LEDs & power off active high) */
  29         /* Multi-Purpose Pins Functionality configuration */
  30         static const u32 kwmpp_config[] = {
  31                 MPP0_NF_IO2,
  32                 MPP1_NF_IO3,
  33                 MPP2_NF_IO4,
  34                 MPP3_NF_IO5,
  35                 MPP4_NF_IO6,
  36                 MPP5_NF_IO7,
  37                 MPP6_SYSRST_OUTn,
  38                 MPP7_GPO,
  39                 MPP8_TW_SDA,
  40                 MPP9_TW_SCK,
  41                 MPP10_UART0_TXD,
  42                 MPP11_UART0_RXD,
  43                 MPP12_GPO,
  44                 MPP13_GPIO,
  45                 MPP14_GPIO,
  46                 MPP15_GPIO,
  47                 MPP16_GPIO,
  48                 MPP17_GPIO,
  49                 MPP18_NF_IO0,
  50                 MPP19_NF_IO1,
  51                 MPP20_GPIO,
  52                 MPP21_GPIO,
  53                 MPP22_GPIO,
  54                 MPP23_GPIO,
  55                 MPP24_GPIO,
  56                 MPP25_GPIO,
  57                 MPP26_GPIO,
  58                 MPP27_GPIO,
  59                 MPP28_GPIO,
  60                 MPP29_GPIO,
  61                 MPP30_GPIO,
  62                 MPP31_GPIO,
  63                 MPP32_GPIO,
  64                 MPP33_GPIO,
  65                 MPP34_GPIO,
  66                 MPP35_GPIO,
  67                 0
  68         };
  69         kirkwood_mpp_conf(kwmpp_config, NULL);
  70         return 0;
  71 }
  72
  73 int board_init(void)
  74 {
  75         /* address of boot parameters */
  76         gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100;
  77
  78         return 0;
  79 }
  80
  81 #ifdef CONFIG_RESET_PHY_R
  82 void reset_phy(void)
  83 {
  84         u16 reg;
  85         u16 phyaddr;
  86         char *name = "egiga0";
  87
  88         if (miiphy_set_current_dev(name))
  89                 return;
  90
  91         /* read PHY dev address */
  92         if (miiphy_read(name, 0xee, 0xee, (u16 *) &phyaddr)) {
  93                 printf("could not read PHY dev address\n");
  94                 return;
  95         }
  96
  97         /* set RGMII delay */
  98         miiphy_write(name, phyaddr, MV88E1318_PGADR_REG, MV88E1318_MAC_CTRL_PG);
  99         miiphy_read(name, phyaddr, MV88E1318_MAC_CTRL_REG, &reg);
 100         reg |= (MV88E1318_RGMII_RX_CTRL | MV88E1318_RGMII_TX_CTRL);
 101         miiphy_write(name, phyaddr, MV88E1318_MAC_CTRL_REG, reg);
 102         miiphy_write(name, phyaddr, MV88E1318_PGADR_REG, 0);
 103
 104         /* reset PHY */
 105         if (miiphy_reset(name, phyaddr))
 106                 return;
 107
 108         /*
 109          * ZyXEL NSA310S uses the 88E1310S Alaska (interface identical to 88E1318)
 110          * and has an MCU attached to the LED[2] via tristate interrupt
 111          */
 112
 113         /* switch to LED register page */
 114         miiphy_write(name, phyaddr, MV88E1318_PGADR_REG, MV88E1318_LED_PG);
 115         /* read out LED polarity register */
 116         miiphy_read(name, phyaddr, MV88E1318_LED_POL_REG, &reg);
 117         /* clear 4, set 5 - LED2 low, tri-state */
 118         reg &= ~(MV88E1318_LED2_4);
 119         reg |= (MV88E1318_LED2_5);
 120         /* write back LED polarity register */
 121         miiphy_write(name, phyaddr, MV88E1318_LED_POL_REG, reg);
 122         /* jump back to page 0, per the PHY chip documenation. */
 123         miiphy_write(name, phyaddr, MV88E1318_PGADR_REG, 0);
 124
 125         /* set PHY back to auto-negotiation mode */
 126         miiphy_write(name, phyaddr, 0x4, 0x1e1);
 127         miiphy_write(name, phyaddr, 0x9, 0x300);
 128         /* downshift */
 129         miiphy_write(name, phyaddr, 0x10, 0x3860);
 130         miiphy_write(name, phyaddr, 0x0, 0x9140);
 131 }
 132 #endif /* CONFIG_RESET_PHY_R */