2 * (C) Copyright 2012 Michal Simek <monstr@monstr.eu>
4 * SPDX-License-Identifier: GPL-2.0+
10 #include <asm/arch/hardware.h>
11 #include <asm/arch/sys_proto.h>
13 DECLARE_GLOBAL_DATA_PTR;
15 /* Bootmode setting values */
16 #define ZYNQ_BM_MASK 0x0F
17 #define ZYNQ_BM_NOR 0x02
18 #define ZYNQ_BM_SD 0x05
19 #define ZYNQ_BM_JTAG 0x0
24 /* It can be done differently */
25 Xilinx_desc fpga010 = XILINX_XC7Z010_DESC(0x10);
26 Xilinx_desc fpga020 = XILINX_XC7Z020_DESC(0x20);
27 Xilinx_desc fpga030 = XILINX_XC7Z030_DESC(0x30);
28 Xilinx_desc fpga045 = XILINX_XC7Z045_DESC(0x45);
29 Xilinx_desc fpga100 = XILINX_XC7Z100_DESC(0x100);
37 idcode = zynq_slcr_get_idcode();
40 case XILINX_ZYNQ_7010:
43 case XILINX_ZYNQ_7020:
46 case XILINX_ZYNQ_7030:
49 case XILINX_ZYNQ_7045:
52 case XILINX_ZYNQ_7100:
62 fpga_add(fpga_xilinx, &fpga);
68 int board_late_init(void)
70 switch ((zynq_slcr_get_boot_mode()) & ZYNQ_BM_MASK) {
72 setenv("modeboot", "norboot");
75 setenv("modeboot", "sdboot");
78 setenv("modeboot", "jtagboot");
81 setenv("modeboot", "");
89 int board_eth_init(bd_t *bis)
93 #ifdef CONFIG_XILINX_AXIEMAC
94 ret |= xilinx_axiemac_initialize(bis, XILINX_AXIEMAC_BASEADDR,
95 XILINX_AXIDMA_BASEADDR);
97 #ifdef CONFIG_XILINX_EMACLITE
100 # ifdef CONFIG_XILINX_EMACLITE_TX_PING_PONG
103 # ifdef CONFIG_XILINX_EMACLITE_RX_PING_PONG
106 ret |= xilinx_emaclite_initialize(bis, XILINX_EMACLITE_BASEADDR,
110 #if defined(CONFIG_ZYNQ_GEM)
111 # if defined(CONFIG_ZYNQ_GEM0)
112 ret |= zynq_gem_initialize(bis, ZYNQ_GEM_BASEADDR0,
113 CONFIG_ZYNQ_GEM_PHY_ADDR0, 0);
115 # if defined(CONFIG_ZYNQ_GEM1)
116 ret |= zynq_gem_initialize(bis, ZYNQ_GEM_BASEADDR1,
117 CONFIG_ZYNQ_GEM_PHY_ADDR1, 0);
124 #ifdef CONFIG_CMD_MMC
125 int board_mmc_init(bd_t *bd)
129 #if defined(CONFIG_ZYNQ_SDHCI)
130 # if defined(CONFIG_ZYNQ_SDHCI0)
131 ret = zynq_sdhci_init(ZYNQ_SDHCI_BASEADDR0);
133 # if defined(CONFIG_ZYNQ_SDHCI1)
134 ret |= zynq_sdhci_init(ZYNQ_SDHCI_BASEADDR1);
143 gd->ram_size = CONFIG_SYS_SDRAM_SIZE;