2 * (C) Copyright 2012 Michal Simek <monstr@monstr.eu>
3 * (C) Copyright 2013 - 2018 Xilinx, Inc.
5 * SPDX-License-Identifier: GPL-2.0+
13 #include <asm/arch/hardware.h>
14 #include <asm/arch/sys_proto.h>
15 #include <asm/arch/ps7_init_gpl.h>
17 DECLARE_GLOBAL_DATA_PTR;
19 #if (defined(CONFIG_FPGA) && !defined(CONFIG_SPL_BUILD)) || \
20 (defined(CONFIG_SPL_FPGA_SUPPORT) && defined(CONFIG_SPL_BUILD))
21 static xilinx_desc fpga;
23 /* It can be done differently */
24 static xilinx_desc fpga007s = XILINX_XC7Z007S_DESC(0x7);
25 static xilinx_desc fpga010 = XILINX_XC7Z010_DESC(0x10);
26 static xilinx_desc fpga012s = XILINX_XC7Z012S_DESC(0x12);
27 static xilinx_desc fpga014s = XILINX_XC7Z014S_DESC(0x14);
28 static xilinx_desc fpga015 = XILINX_XC7Z015_DESC(0x15);
29 static xilinx_desc fpga020 = XILINX_XC7Z020_DESC(0x20);
30 static xilinx_desc fpga030 = XILINX_XC7Z030_DESC(0x30);
31 static xilinx_desc fpga035 = XILINX_XC7Z035_DESC(0x35);
32 static xilinx_desc fpga045 = XILINX_XC7Z045_DESC(0x45);
33 static xilinx_desc fpga100 = XILINX_XC7Z100_DESC(0x100);
38 #if (defined(CONFIG_FPGA) && !defined(CONFIG_SPL_BUILD)) || \
39 (defined(CONFIG_SPL_FPGA_SUPPORT) && defined(CONFIG_SPL_BUILD))
42 idcode = zynq_slcr_get_idcode();
45 case XILINX_ZYNQ_7007S:
48 case XILINX_ZYNQ_7010:
51 case XILINX_ZYNQ_7012S:
54 case XILINX_ZYNQ_7014S:
57 case XILINX_ZYNQ_7015:
60 case XILINX_ZYNQ_7020:
63 case XILINX_ZYNQ_7030:
66 case XILINX_ZYNQ_7035:
69 case XILINX_ZYNQ_7045:
72 case XILINX_ZYNQ_7100:
78 #if (defined(CONFIG_FPGA) && !defined(CONFIG_SPL_BUILD)) || \
79 (defined(CONFIG_SPL_FPGA_SUPPORT) && defined(CONFIG_SPL_BUILD))
81 fpga_add(fpga_xilinx, &fpga);
87 int board_late_init(void)
89 switch ((zynq_slcr_get_boot_mode()) & ZYNQ_BM_MASK) {
91 env_set("modeboot", "qspiboot");
94 env_set("modeboot", "nandboot");
97 env_set("modeboot", "norboot");
100 env_set("modeboot", "sdboot");
103 env_set("modeboot", "jtagboot");
106 env_set("modeboot", "");
113 #ifdef CONFIG_DISPLAY_BOARDINFO
116 u32 version = zynq_get_silicon_version();
119 if (version > (PCW_SILICON_VERSION_3 << 1))
122 puts("Board: Xilinx Zynq\n");
123 printf("Silicon: v%d.%d\n", version >> 1, version & 1);
129 int zynq_board_read_rom_ethaddr(unsigned char *ethaddr)
131 #if defined(CONFIG_ZYNQ_GEM_EEPROM_ADDR) && \
132 defined(CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET)
133 if (eeprom_read(CONFIG_ZYNQ_GEM_EEPROM_ADDR,
134 CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET,
136 printf("I2C EEPROM MAC address read failed\n");
142 #if !defined(CONFIG_SYS_SDRAM_BASE) && !defined(CONFIG_SYS_SDRAM_SIZE)
143 int dram_init_banksize(void)
145 return fdtdec_setup_memory_banksize();
150 if (fdtdec_setup_memory_size() != 0)
160 gd->ram_size = CONFIG_SYS_SDRAM_SIZE;