1 /******************************************************************************
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
12 * XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" AS A
13 * COURTESY TO YOU. BY PROVIDING THIS DESIGN, CODE, OR INFORMATION AS
14 * ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, APPLICATION OR STANDARD,
15 * XILINX IS MAKING NO REPRESENTATION THAT THIS IMPLEMENTATION IS FREE
16 * FROM ANY CLAIMS OF INFRINGEMENT, AND YOU ARE RESPONSIBLE FOR OBTAINING
17 * ANY THIRD PARTY RIGHTS YOU MAY REQUIRE FOR YOUR IMPLEMENTATION.
18 * XILINX EXPRESSLY DISCLAIMS ANY WARRANTY WHATSOEVER WITH RESPECT TO
19 * THE ADEQUACY OF THE IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY
20 * WARRANTIES OR REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM
21 * CLAIMS OF INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND
22 * FITNESS FOR A PARTICULAR PURPOSE.
25 * Xilinx hardware products are not intended for use in life support
26 * appliances, devices, or systems. Use in such applications is
27 * expressly prohibited.
30 * (c) Copyright 2002-2004 Xilinx Inc.
31 * All rights reserved.
34 * You should have received a copy of the GNU General Public License along
35 * with this program; if not, write to the Free Software Foundation, Inc.,
36 * 675 Mass Ave, Cambridge, MA 02139, USA.
44 * This file contains data which is shared internal data for the DMA channel
45 * component. It is also shared with the buffer descriptor component which is
46 * very tightly coupled with the DMA channel component.
50 * The last buffer descriptor constants must be located here to prevent a
51 * circular dependency between the DMA channel component and the buffer
52 * descriptor component.
54 ******************************************************************************/
56 #ifndef XDMA_CHANNEL_I_H /* prevent circular inclusions */
57 #define XDMA_CHANNEL_I_H /* by using protection macros */
59 /***************************** Include Files *********************************/
61 #include "xbasic_types.h"
65 /************************** Constant Definitions *****************************/
67 #define XDC_DMA_CHANNEL_V1_00_A "1.00a"
69 /* the following constant provides access to the bit fields of the DMA control
70 * register (DMACR) which must be shared between the DMA channel component
71 * and the buffer descriptor component
73 #define XDC_CONTROL_LAST_BD_MASK 0x02000000UL /* last buffer descriptor */
75 /* the following constant provides access to the bit fields of the DMA status
76 * register (DMASR) which must be shared between the DMA channel component
77 * and the buffer descriptor component
79 #define XDC_STATUS_LAST_BD_MASK 0x10000000UL /* last buffer descriptor */
81 /* the following constants provide access to each of the registers of a DMA
84 #define XDC_RST_REG_OFFSET 0 /* reset register */
85 #define XDC_MI_REG_OFFSET 0 /* module information register */
86 #define XDC_DMAC_REG_OFFSET 4 /* DMA control register */
87 #define XDC_SA_REG_OFFSET 8 /* source address register */
88 #define XDC_DA_REG_OFFSET 12 /* destination address register */
89 #define XDC_LEN_REG_OFFSET 16 /* length register */
90 #define XDC_DMAS_REG_OFFSET 20 /* DMA status register */
91 #define XDC_BDA_REG_OFFSET 24 /* buffer descriptor address register */
92 #define XDC_SWCR_REG_OFFSET 28 /* software control register */
93 #define XDC_UPC_REG_OFFSET 32 /* unserviced packet count register */
94 #define XDC_PCT_REG_OFFSET 36 /* packet count threshold register */
95 #define XDC_PWB_REG_OFFSET 40 /* packet wait bound register */
96 #define XDC_IS_REG_OFFSET 44 /* interrupt status register */
97 #define XDC_IE_REG_OFFSET 48 /* interrupt enable register */
99 /* the following constant is written to the reset register to reset the
102 #define XDC_RESET_MASK 0x0000000AUL
104 /**************************** Type Definitions *******************************/
106 /***************** Macros (Inline Functions) Definitions *********************/
108 /************************** Function Prototypes ******************************/
110 #endif /* end of protection macro */